JP3628851B2 - Motor drive device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a motor drive device that drives a pulse motor in accordance with motor drive data corresponding to a cycle of a series of drive pulses applied to the pulse motor, and is particularly suitable for an image forming apparatus such as a copying machine, a printer, and a facsimile machine. The present invention relates to a motor drive device.
[0002]
[Prior art]
For example, in a digital copying machine, when a copy start key is pressed while a document is set on a contact glass, a scanner unit moves a traveling body (movable unit) having a mirror, a light source, and the like in a horizontal direction by a driving source. Thus, the image surface of the document on the contact glass is optically scanned, and the reflected image from the image surface is imaged on the light receiving surface of the CCD image sensor via the mirror and the lens including the mirror, whereby the document image Is transferred to a transfer sheet by the image forming unit.
[0003]
Incidentally, a pulse motor is generally used as a drive source for the scanner unit. As is well known, this pulse motor rotates by applying a phase excitation signal synchronized with the drive pulse to the motor drive means, and in order to rotate this pulse motor at a self-starting frequency or more, through-up control or through-down control is performed. Need. When these controls are performed by a microprocessor that controls the entire apparatus, the burden on the microprocessor increases. Especially when other control processes other than the pulse motor control of the copying machine are performed in parallel. Therefore, the frequency of the driving pulse of the pulse motor cannot be increased so much, and therefore the processing speed cannot be increased in the copying machine as described above.
[0004]
Therefore, as a conventional example, as shown in, for example, Japanese Patent Laid-Open No. 63-212580, the motor drive data is stored in a memory in advance when the pulse motor is up or down, and the microprocessor reads the data to control it. At the constant speed, a method of controlling by motor control means provided in the microprocessor has been proposed.
[0005]
[Problems to be solved by the invention]
However, in such a conventional device, the burden on the microprocessor is reduced when the pulse motor is at a constant speed, but it is not reduced when the pulse motor is up or down, especially in the vicinity of the constant speed region. There is a problem that sufficient speeding up of motor rotation cannot be expected. In addition, since it is necessary to store a lot of motor drive data in the memory in advance, there is a problem that the capacity of the memory increases.
[0006]
An object of the present invention is to provide a motor driving device capable of driving a pulse motor at high speed and high accuracy without increasing the burden on the microprocessor and the capacity of the memory.
[0007]
[Means for Solving the Problems]
In order to solve the above problem, a first means is a motor driving device for driving a pulse motor according to motor driving data corresponding to a cycle of a series of driving pulses applied to the pulse motor. When the change in the drive data is relatively large, the actual data is stored as the current motor drive data. When the change in the current and previous motor drive data is small, the data is encoded with a smaller number of bits than the actual data. Storage means for preliminarily storing a plurality of times of motor drive data with the same number of bits as the actual data, a microprocessor for sequentially reading each of the plurality of times of motor drive data stored in the storage means, and the microprocessor The motor drive data read out by is stored, and if this data is actual data, it is output as is, In the case of encoded data, the encoded data is decoded into a plurality of times of motor drive data, and the decoding means for sequentially outputting each data, and the pulse motor of the pulse motor based on the motor drive data output by the decoding means And pulse generation means for generating a drive pulse.
[0008]
The second means is that, in the first means, the encoded data is a lower bit data string of actual data, and the lower bit data strings of a plurality of times of motor drive data are collectively configured with the same number of bits as the actual data. It is characterized by.
[0009]
The third means is characterized in that in the first and second means, the circuit of the decoding means and the control circuit of the image forming apparatus are constituted by a common LSI.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a control unit of a digital copying machine as an embodiment of a motor drive apparatus according to the present invention, FIG. 2 is a block diagram showing in detail the stepping motor drive control unit of FIG. 1, and FIG. 4 is a block diagram showing the control unit in detail, FIG. 4 is an explanatory diagram showing the data structure of motor drive data between the microprocessor of FIG. 1 and the stepping motor drive control unit, and FIG. 5 is a stepping motor drive control unit of FIGS. It is a flowchart for demonstrating operation | movement of.
[0011]
As shown in FIG. 1, the control unit of this digital copying machine includes a microprocessor 1, ROM 2, RAM 3, clutches 5, motors 6, sensors 7 and other loads 8 connected to an IO port 4 and the like. 2 and 3, a stepping motor drive control unit 9, a stepping motor drive unit 10 and a stepping motor (pulse motor) 11 shown in detail in FIG. 2 and FIG. 3, and the stepping motor drive control unit 9 is common to the control circuit of this copying machine This LSI is configured.
[0012]
The copying machine has an optical system for exposing and scanning a document on the document table by moving in the sub-scanning direction of a document table (not shown), and a stepping motor 11 drives this optical system. The ROM 2 stores in advance 16-bit motor drive data corresponding to a series of pulse periods applied to the stepping motor 11 as shown in FIG. When the microprocessor 1 reads out the motor drive data from the ROM 2 and outputs it to the stepping motor drive control unit 9, the pulse generator 9b in the stepping motor drive control unit 9 generates a pulse having a cycle corresponding to the motor drive data. To do.
[0013]
Next, the stepping motor drive control unit 9 will be described with reference to FIGS. The stepping motor drive control unit 9 includes a data control unit 9a and a pulse generation unit 9b as shown in FIG. In response to the data request signal “1” from the pulse generator 9b, the data controller 9a sends 15-bit motor drive data to the pulse generator 9b. The pulse generator 9b Phase excitation signals ΦA, ΦB, ΦC, and ΦD synchronized with the drive pulse of the stepping motor 11 are sent to the stepping motor drive unit 10 shown in FIG. As a result, the stepping motor drive unit 10 rotates the stepping motor 11 based on the phase excitation signals ΦA, ΦB, ΦC, and ΦD.
[0014]
As shown in detail in FIG. 3, the data control unit 9 a receives 16-bit motor drive data, a CPU write signal, and a start signal from the microprocessor 1, and transmits a data request signal “0” to the microprocessor 1. To do. In this case, 16-bit motor drive data is written in the data register REG0 based on the CPU write signal from the microprocessor 1, and the MSB of the data in the data register REG0 is applied to the selector 21 as a selection signal. The lower 15-bit data is applied to the input terminal “0” of the selector 21 and is applied to the input terminal of the selector 22 every 3 bits. Further, the upper 12-bit data excluding the MSB is applied to the data register REG2.
[0015]
The control unit 20 receives the start signal from the microprocessor 1 and the data request signal “1” from the pulse generation unit 9b, and transmits the data request signal “0” to the microprocessor 1 and the data register REG1. The selector 22 and the data register REG2 are controlled. The upper 12-bit data excluding the MSB in the data register REG1 and the 3-bit data in the data register REG2 are applied as 15-bit data to the input terminal “1” of the selector 21, and the selector 21 is an input terminal when MSB = 0. Input data “0”, that is, actual data is selected. On the other hand, when MSB = 1, input data (decoded data described later) at the input terminal “1” is selected.
[0016]
Here, 16-bit data is often used as motor drive data applied to the pulse motor 11 that drives the document reading scanner of the copying machine in correspondence with a series of pulse periods. The difference between the nth data and the (n + 1) th data is “2” to “6” in decimal, and the upper 13 bits of 16-bit data do not change and only the lower 3 bits change. It is. Therefore, in most cases, the data change can be represented by 3 bits.
[0017]
FIG. 4 shows the format of this 16-bit data. This format is composed of encoded data or MSB indicating actual data and lower 3 bits × 5 data CODE4 to CODE1. The lower 3 bits × 5 data CODE4 to CODE1 are actual data when the MSB is “0”, and on the other hand, when the MSB is “1”, each of them is a 3-bit length encoding indicating the above data change. It is data. Therefore, at this time, this is decoded into 15-bit data by the selector 22 and the decoding units (data registers REG1, REG2) in the data control unit 9a.
[0018]
In FIG. 1, the ROM 2 stores the 16-bit motor drive data in advance. When the microprocessor 1 activates the start signal for the control unit 20 (start signal = 0), the control unit 20 activates the data request signal “0” for the microprocessor 1 (data request signal “0” = 0). To do. When the data request signal “0” becomes active, the microprocessor 1 reads 16-bit motor drive data from the ROM 2 and writes it to the data register REG1. Therefore, when the data change of the 16-bit motor driving data is 3 bits, by configuring the motor driving data in this way, one reading of the microprocessor 1 corresponds to five times of the conventional example. 1 can be reduced to 1/5, and the capacity of the ROM 2 can be reduced.
[0019]
The processing of the data control unit 9b will be described with reference to FIG. 5. First, the control unit 20 determines whether or not the start signal from the microprocessor 1 is “1” (step S1). The process proceeds to step S2 and subsequent steps. First, the control unit 20 sets the data request signal “0” for the microprocessor 1 to “1” (step S2), and then 16-bit motor drive data is set in the data register REG0 (step S3). The control unit 20 resets the data request signal “0” for the microprocessor 1 to “0” (step S4). Next, when the MSB of the data in the data register REG0 is “1”, the process proceeds from step S5 to step S6 and the following steps. On the other hand, when MSB = 0, the process branches from step S5 to step S10 and the subsequent steps.
[0020]
If MSB = 0 in step S5, the process waits for the data request signal “1” from the pulse generator 9b to become 1 (step S10), and if the data request signal “1” = 1, the MSB of the data register REG0. The upper 12 bits of motor drive data excluding are set in the data register REG1 (step S11), and then the process proceeds to step S9 described above. Therefore, this process transfers the motor drive data for one time from the data register REG0 via the selector 21 and prepares for the next input of 3-bit encoded data. .
[0021]
On the other hand, in the case of MSB = 1, in step S6 and after, first, it waits for the data request signal “1” from the pulse generator 9b to become “1” (step S6), and when the data request signal “1” = 1. The 3-bit data CODEn (n = 0, 1, 2, 3, 4) of the data register REG0 is set in the data register REG2 (step S7). Next, it is determined whether or not n <4 (step S7). If n <4 is not satisfied, the process returns to step S6 to sequentially set the 3-bit data CODEn in the second data register REG2. When n = 4, the process proceeds to step S9 to determine whether or not the start signal is “1”. If the start signal = 1, the process returns to step S2. On the other hand, if the start signal is not 1, this process is performed. Exit. Therefore, the motor drive data for five times is transferred from the data registers REG1 and REG2 via the selector 21 by this processing.
[0022]
【The invention's effect】
As described above, according to the first aspect of the present invention, when the change in the current and previous motor drive data is relatively large, the actual data is stored as the current motor drive data, and the current and previous motor drive data are stored. If the data change is small, the data is encoded to a bit number smaller than the actual data, the motor drive data for multiple times is stored in advance with the same bit number as the actual data, and this is read and decoded by the microprocessor. Thus, the pulse motor can be driven at high speed and with high accuracy without increasing the burden on the microprocessor and the capacity of the memory.
[0023]
According to the second aspect of the present invention, the encoded data is the lower bit data string of the actual data, and the lower bit data strings of the motor driving data for a plurality of times are collectively configured with the same number of bits as the actual data. The pulse motor can be driven at high speed and high accuracy without increasing the burden on the processor and the capacity of the memory.
[0024]
According to the invention described in claim 3, since the circuit of the decoding means and the control circuit of the image forming apparatus are constituted by the same LSI, the image forming apparatus such as a copying machine can be reduced in size and cost. .
[Brief description of the drawings]
FIG. 1 is a block diagram showing a control unit of a digital copying machine as an embodiment of a motor driving apparatus according to the present invention.
FIG. 2 is a block diagram illustrating in detail a stepping motor drive control unit in FIG. 1;
FIG. 3 is a block diagram illustrating in detail a data control unit in FIG. 2;
4 is an explanatory diagram showing a data structure of motor drive data between the microprocessor of FIG. 1 and a stepping motor drive control unit; FIG.
FIG. 5 is a flowchart for explaining the operation of the stepping motor drive control unit in FIGS. 2 and 3;
[Explanation of symbols]
1 Microprocessor 2 ROM
9a Data controller 9b Pulse generator 11 Stepping motor

Claims (3)

In a motor drive device that drives a pulse motor according to motor drive data corresponding to a cycle of a series of drive pulses applied to the pulse motor,
If the change in the current and previous motor drive data is relatively large, the actual data is stored as the current motor drive data. If the change in the current and previous motor drive data is small, that data is compared to the actual data. Storage means for encoding the motor driving data for a plurality of times in advance with the same number of bits as the actual data by encoding in a small number of bits;
A microprocessor for sequentially reading each of a plurality of times of motor drive data stored in the storage means;
The motor drive data read out by the microprocessor is stored. If this data is actual data, it is output as it is. If it is encoded data, the encoded data is decoded into a plurality of times of motor drive data. Decoding means for sequentially outputting each data,
Pulse generation means for generating a drive pulse of the pulse motor based on the motor drive data output by the decoding means;
A motor driving device comprising: 2. The motor drive according to claim 1, wherein the encoded data is a lower bit data string of actual data, and the lower bit data strings of a plurality of times of motor drive data are collectively configured with the same number of bits as the actual data. apparatus. 3. The motor driving apparatus according to claim 1, wherein the circuit of the decoding unit and the control circuit of the image forming apparatus are configured by a common LSI.

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