JP3771016B2 - Semiconductor device suitable for inspection by wafer batch type probe card, inspection method thereof and probe card - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device suitable for inspection by a wafer collective measurement inspection probe card, an inspection method thereof, and a probe card.
[0002]
[Prior art]
In recent years, electronic devices equipped with semiconductor integrated circuit devices (hereinafter referred to as “semiconductor devices”) have made remarkable progress in miniaturization and cost reduction. The demand is getting stronger.
[0003]
Normally, after a semiconductor chip and a lead frame are electrically connected by a bonding wire, the semiconductor device is supplied in a state where the semiconductor chip and the lead frame are sealed with resin or ceramics and mounted on a printed board. However, due to the demand for miniaturization of electronic equipment, a method for directly mounting a semiconductor device on a circuit board in a state where the semiconductor device is cut out from the semiconductor wafer (hereinafter, the semiconductor device in this state is referred to as a bare chip) has been developed. It is desired to supply a guaranteed bare chip at a low price.
[0004]
In order to perform quality assurance on a bare chip, it is necessary to inspect a semiconductor device such as burn-in in a wafer state. However, since it takes a lot of time to inspect a plurality of bare chips formed on a semiconductor wafer one by one or several times, it is realistic in terms of time and cost. is not. Therefore, it is required to perform an inspection such as burn-in on all bare chips in a wafer.
[0005]
In order to perform a batch inspection on a bare chip in a wafer state, it is necessary to simultaneously apply a power supply voltage or a signal to electrodes of a plurality of semiconductor chips formed on a semiconductor wafer to operate the plurality of semiconductor chips. . For this purpose, it is necessary to prepare a probe card having a very large number (usually several thousand or more) of probe needles. However, in order to do this, the conventional needle type probe card has a number of pins. However, it cannot respond from the point of price.
[0006]
In view of this, a probe card has been proposed that can collectively contact probe electrodes with a large number of pad electrodes on a wafer (Japanese Patent Laid-Open No. 7-231019). According to this technique, a large number of bumps are formed on the probe card, and these bumps are used as probe electrodes.
[0007]
[Problems to be solved by the invention]
The probe card has a large number of probe electrodes, and these probe electrodes need to be surely contacted with the pad electrodes of the wafer to be inspected. For accurate measurement and inspection, the pad electrode formed on the entire surface of the wafer needs to be pressed with a uniform load by the probe electrode of the probe card.
[0008]
However, the area of the wafer is increasing, and the number and density of pad electrodes formed on each chip tend to increase. For this reason, it becomes difficult for the probe electrode of the probe card to press the pad electrode of the wafer with a uniform load. If uniform weighting on the wafer by the probe card may not be achieved even in some areas of the wafer, the measurement inspection results cannot be relied upon.
[0009]
The present invention has been made in view of such a problem, and its purpose is to uniformly press each part of the wafer with the probe electrode on the probe card when performing inspection using the probe card for wafer batch type measurement inspection. It is an object of the present invention to provide a semiconductor device having a configuration capable of electrically detecting whether or not the semiconductor device is inspected, an inspection method thereof, and a probe card used in the inspection method.
[0010]
[Means for Solving the Problems]
The semiconductor device of the present invention includes an element whose electrical characteristics change according to a load applied by a probe electrode of a wafer batch type measurement / inspection probe card, and a plurality of pad electrodes connected to the element.
[0011]
The element may be a MOS transistor, and the electrical characteristic may be a current-voltage characteristic of the MOS transistor.
[0012]
The element may have a PN junction, and the electrical characteristic may be a reverse current voltage characteristic of the PN junction.
[0013]
The element may be a piezoelectric conversion element.
[0014]
The element may be disposed on a scribe lane on the wafer.
[0015]
A method for measuring a semiconductor device according to the present invention is a method for measuring the semiconductor device, comprising: a plurality of probe electrodes arranged two-dimensionally; and a multilayer wiring board electrically connected to the plurality of probe electrodes. A probe card comprising: a step of superimposing a plurality of the semiconductor devices on a wafer, thereby contacting the probe electrodes to the plurality of pads of the element; and a step of pressing the wafer with the probe card; Electrically detecting a change in electrical characteristics of the element caused by the pressing.
[0016]
Of the plurality of semiconductor devices included in the wafer, only the element in the selected semiconductor device may be directly pressed by the probe electrode of the probe card.
[0017]
Of the plurality of semiconductor devices included in the wafer, a change in electrical characteristics of the element in the selected semiconductor device is referred to an electrical characteristic of the element in a semiconductor device other than the selected semiconductor device. May be determined.
[0018]
Of the elements of the plurality of semiconductor devices included in the wafer, only selected elements are directly pressed by the probe electrode of the probe card, and the electrical characteristics of the pressed elements and the elements that do not press You may compare with an electrical property.
[0019]
The probe electrode may be a bump electrode.
[0020]
A conductive rubber for electrically connecting the probe electrode to the multilayer wiring board may be provided between the probe electrode and the multilayer wiring board.
[0021]
The probe electrode may be formed on a thin film stretched in a state where a tension is applied to the rigid ring.
[0022]
The probe electrode may be formed from at least part of the wiring of the multilayer wiring board.
[0023]
The probe card of the present invention is a probe card for performing wafer batch type measurement inspection on the semiconductor device, and is electrically connected to the plurality of probe electrodes arranged two-dimensionally and the plurality of probe electrodes. A probe comprising: a multilayer wiring board connected; and the probe electrode includes a probe electrode capable of applying a weight to the element, and a probe electrode that presses the pad electrode of the element. card.
[0024]
The probe electrode may be a bump electrode.
[0025]
A conductive rubber for electrically connecting the probe electrode to the multilayer wiring board may be provided between the probe electrode and the multilayer wiring board.
[0026]
The probe electrode may be formed on a thin film stretched in a state where a tension is applied to the rigid ring.
[0027]
The probe electrode may be formed from at least part of the wiring of the multilayer wiring board.
[0028]
DETAILED DESCRIPTION OF THE INVENTION
First, in order to facilitate understanding of the present invention, a wafer batch type measurement / inspection technique to which the present invention is applied will be described.
[0029]
FIG. 1 shows a probe card 1 that can collectively contact probe electrodes with a large number of pad electrodes on a wafer. A wafer (for example, a silicon wafer having a diameter of 200 mm) 2 on which elements and circuits to be measured and inspected are formed is placed on the wafer tray 3 as it is without being divided into chips. During measurement / inspection, the wafer 2 is sandwiched between the probe card 1 and the wafer tray 3. A small space formed between the probe card 1 and the wafer tray 3 is sealed from the atmosphere by the seal ring 4. By depressurizing the space through the vacuum valve 5 (for example, reducing the pressure by about 200 millitorr compared to the atmospheric pressure), the probe card 1 presses the wafer 2 evenly by applying the force of the atmospheric pressure. As a result, the probe electrode of the probe card 1 can press the pad electrode on the wafer 2 with a uniform force over the entire surface of the wide wafer 2. In order to make sure that a large number of bumps on the probe card 1 come into contact with a predetermined pad electrode on the wafer 2, it is necessary to perform alignment between the probe card 1 and the wafer 2 with high accuracy before the contact. is there.
[0030]
According to such a wafer batch type measurement / inspection technique, a large number of probe electrodes formed on the probe card 1 are applied to a large number of pad electrodes of thousands to tens of thousands or more formed on the entire surface of the wafer 2. At the same time, the contact can be surely made.
[0031]
FIG. 2 shows a cross-sectional configuration example of the probe card 20 of the present invention.
[0032]
The probe card 20 includes a multilayer wiring board 21 to be electrically connected to a measurement / inspection apparatus, a polyimide thin film 22 with bumps, and a localized anisotropic conductive rubber 23 provided therebetween. At least. The localized anisotropic conductive rubber 23 is an elastic member that electrically connects the electrode wiring 21b of the multilayer wiring board 21 and the bump 22b of the polyimide thin film 22 with bumps. FIG. 2 shows a state in which the three members 21 to 23 are separated in the vertical direction, but a single probe card 20 is formed by tightly fixing these members 21 to 23.
[0033]
As the multilayer wiring substrate 21, a substrate in which a multilayer wiring 21b is formed on a glass substrate 21a can be used. As the glass substrate 21a, one having high flatness over a wide area is preferable because it can be relatively easily manufactured. In addition, since the thermal expansion coefficient of glass is close to that of a silicon wafer, glass is particularly suitable as a material for a multilayer wiring board of a burn-in probe card.
[0034]
The multilayer wiring 21b can be formed using a known thin film deposition technique and patterning technique. For example, if a conductive thin film such as copper (Cu) is deposited on the glass substrate 21a by sputtering or the like and then the conductive thin film is patterned by a photolithography and etching process, a wiring 21b having an arbitrary pattern is formed. be able to. The wirings 21b at different levels are separated by the interlayer insulating film 21c. The interlayer insulating film 21c is obtained, for example, by forming a polyimide thin film on the glass substrate 21a by a method such as spin coating. The multilayer wiring 21b electrically connects a large number of bumps (probe electrodes) 22b arranged two-dimensionally in a plane to connection electrodes and connectors (not shown) provided in the peripheral region of the probe card 20, and externally. This enables the electrical connection between the inspection device or the inspection circuit and the probe electrode 22b.
[0035]
The polyimide thin film 22 with bumps is obtained, for example, as follows. First, a large number of openings (with an inner diameter of about 20 to 30 μm) are provided in a base material in which a polyimide thin film 22a having a thickness of about 18 μm and a copper thin film having a thickness of about 35 μm are formed into two layers. Each opening is filled with a metal material such as Ni using a method such as electrolytic plating to form bumps 22b. If unnecessary portions of the copper thin film are removed from the polyimide thin film 22a by etching, a polyimide thin film 22 with bumps as illustrated is obtained. As an example, the height of the bump 22b is about 20 μm. The lateral size of the bump is about 40 μm. The position where the bump 22b is formed on the polyimide thin film 22a is determined depending on the position where the pad electrode 26 is formed on the wafer 25 to be measured.
[0036]
In the localized anisotropic conductive rubber 23, conductive particles 23 b are arranged at specific positions in a silicone rubber sheet (thickness: about 200 μm) 23 a, and the conductive particles 23 b are chained in the conduction direction (thickness direction) at that position. It is connected in a shape. By interposing elastic rubber between the multilayer wiring board 21 and the bumps 22b, the bumps 22b of the probe card 20 and the wafer 25 are not affected by the steps on the wafer 25 or the warp of the wafer 25. Contact between the upper electrode 26 can be reliably realized.
[0037]
When such a probe card 20 is used for burn-in inspection, the thermal expansion coefficient of the polyimide thin film 22a (about 16 × 10 ^-6 / ° C.) and the thermal expansion coefficient of the wafer 25 (about 3 × 10 ^-6 Therefore, the position of the bump 22b on the polyimide thin film 22a is shifted laterally with respect to the position of the pad electrode 26 on the wafer 25 during heating for burn-in. This misalignment is larger at the peripheral portion than at the central portion of the wafer 25, and normal electrical contact cannot be obtained between the wafer 25 and the probe card 20. In order to solve such a problem, as disclosed in JP-A-7-231019, a polyimide thin film 22a is attached to a rigid ring (not shown) such as a ceramic ring having a thermal expansion coefficient close to that of a silicon wafer, It is effective to apply tension to the polyimide thin film 22a in advance. In this case, it is better to form the bump 22b after the polyimide thin film 22a is attached to the rigid ring. This is because the position of the bump 22b is difficult to shift.
[0038]
The wafer 25 is disposed on the wafer tray 28. After the wafer tray 28 on which the wafer 25 is mounted is disposed at an appropriate position with respect to the probe card 20, the distance between the probe card 20 and the wafer tray 28 is reduced. As a result, the pad electrode 26 on the wafer 25 and the bump 22b of the probe card 20 are in physical contact. As described above, by depressurizing the sealed space between the probe card 20 and the wafer tray 28, each bump 22b presses the pad electrode 26 on the wafer 25 with substantially equal force. Thereafter, an electrical signal and a power supply voltage from a drive circuit and an inspection circuit (not shown) are supplied to the pad electrode 26 on the wafer 25 through the bumps 22 of the probe card 20. In the case of the burn-in inspection, the probe card 20, the wafer 25, and the wafer tray 28 are integrally inserted into the burn-in apparatus and heated in a state as shown in FIG.
[0039]
The probe card 20, the wafer 25, and the wafer tray 28 are maintained in the state shown in FIG. 3 during and before and after the inspection / measurement. The wafer tray 28 in which the above-described sealed space is in a reduced pressure state does not separate from the probe card 20, and these members integrally hold the wafer.
[0040]
When the inspection and measurement of the wafer batch type is completed, the pressure in the sealed space formed between the probe card 20 and the tray 28 is increased and recovered to about atmospheric pressure. As a result, the tray 28 is separated from the probe card 20, and the wafer 25 is taken out from the inside.
[0041]
Hereinafter, embodiments of the semiconductor device according to the present invention will be described with reference to FIGS.
[0042]
The semiconductor device shown in FIG. 4 includes a weight measuring element 50 formed on a silicon substrate 49. The weight measuring element 50 is provided directly under the pad electrode 46 and is a transistor having a normal MOS structure. The pad electrode 46 may be a normal pad electrode that performs an electrical function of supplying a power supply voltage and an electrical signal necessary for various electrical measurements to the chip, and measures a weighted (pressurized) level. For this purpose, an electrode (not having an electrical function) provided specifically for the purpose may be used.
[0043]
The weight measuring element 50 has a source / drain region 40 a and a channel region 41 a in the surface region of the silicon substrate 49. Further, a gate insulating film 42a formed on the silicon substrate 49 and a gate electrode 43a provided on the gate insulating film 42a are provided, and the conductivity of the channel region 41a is controlled by them. Each of the source / drain regions 40a is connected to a wiring 44a. The element 50 is covered with an insulating film 45, and the pad electrode 46 is provided on the insulating film 45.
[0044]
Since the weight measuring element 50 is provided immediately below the pad electrode 46, when the probe electrode 48 of the probe card 47 presses the pad electrode 46, the weight is measured. Due to the weighting, the transistor characteristics (current-voltage characteristics) of the element 50 change. The state of this change is shown in FIG. FIG. 5 is a graph showing the gate voltage dependence of the drain current. Curve A shows the drain current measured in a state where no weight is applied to the device 50, and curve B shows the weight applied to the device 50. The drain current measured in the state is shown. In either case, the same voltage (for example, 5 volts) is applied to the drain electrode.
[0045]
As shown in FIG. 5, when a weight is applied to the element 50, the electrical characteristics of the element 50 change. This change occurs because the threshold voltage of element 50 is increased by the weight applied to element 50. Further, the rate of change increases depending on the magnitude of the applied weight. Accordingly, values representative of electrical characteristics in advance (for example, “the magnitude of the drain current when a predetermined gate voltage and drain voltage are applied”, “the magnitude of the threshold voltage”, etc.). It is possible to estimate the weight level from the relationship and the measured amount of change in the characteristic value.
[0046]
Refer to FIG. 4 again. In the present embodiment, the weight measuring element 50 is provided immediately below the pad electrode 46, and a reference element 51 having the same structure as the weight measuring element 50 is provided at a position away from the pad electrode 46. The reference element 51 and the weight measuring element 50 are designed to exhibit the same electrical characteristics in a state where a weight is applied. In the measurement using the wafer batch type probe card, the pad electrode 46 in FIG. 4 is pressed by the probe electrode 48 of the probe card 47, so that the element 50 under it is subjected to a load, but the element located at a position away from the pad 46. 51 receives little weight. For this reason, a change occurs between the electrical characteristics of the elements 50 and 51. If this change is detected by an external device via the probe card 47, the degree of weighting can be determined.
[0047]
In FIG. 4, transistor elements other than the weight measurement element 50 and the reference element 51 are not shown, but it is said that each transistor and other circuit elements constituting the semiconductor integrated circuit are provided on the silicon substrate 49. Not until.
[0048]
FIG. 6 is a plan layout diagram showing an arrangement example of the weight measuring element 50 and the reference element 51. The weight measuring element 50 of the present embodiment is disposed immediately below the pad electrode 46, but the reference element 51 is disposed at a position away from the pad electrode 46. FIG. 6 shows a plurality of pad electrodes in addition to the pressing pad electrode 46. The pad electrode 55 is an electrode for applying a gate potential to each gate electrode of the weight measuring element 50 and the reference element 51, and is connected to the common gate wiring 53. The pad electrode 56 is an electrode for applying a potential to the source / drain regions of the weight measuring element 50 and the reference element 51, and is connected to each of the source / drain wirings 54a and 54b.
[0049]
The electrical characteristics of both elements 50 and 51 in the wafer are measured from the wiring on the probe card through the pad electrodes 55 and 56, and the degree of weight received by the pad electrode 46 can be known from the difference in the electrical characteristics. .
[0050]
In the arrangement example shown in FIG. 6, the weight measuring element 50 and the reference element 51 do not particularly constitute a circuit, but one weight is obtained by combining these elements 50 and 51 with other circuit elements. A measurement circuit may be formed. For example, a circuit may be formed in which a voltage corresponding to the difference between the characteristic value of the weight measuring element 50 and the characteristic value of the reference element 51 is amplified and output. Further, the pad electrode 46 in FIG. 6 is not electrically connected to the circuit elements in the semiconductor device, and is formed only to receive the weight from the bump, but the normal pad electrode is weighted. It can also be used together as the measurement pad electrode 46.
[0051]
The weight measuring element 50 and the reference element 51 may be arranged in an empty area in each chip, or may be arranged on a scribe lane of a wafer located between the chips. When the elements 50 and 51 are provided in the chip, a plurality of sets of elements 50 and 51 may be provided in each chip, or more elements 50 may be provided than the elements 51.
[0052]
When the characteristics of the weight measurement element 50 and the reference element 51 are measured with the probe card, it is not necessary to measure the characteristics of all the elements 50 and 51 arranged on the wafer. For example, as shown in FIG. 7, the bumps on the probe card may be brought into contact with only the weight measurement element 50 and the reference element 51 at the five positions 71 to 75 of the wafer 70. Alternatively, while measuring the electrical characteristics of the weight measuring element 50 at five points (for example, positions 71 to 75) on one wafer, the reference element 51 is positioned at one position ( For example, the electrical characteristics may be measured only at position 73).
[0053]
Note that the weight measuring element may be provided in a region other than directly below the pad electrode. An arrangement in which the characteristic value changes most sensitively with respect to the weight (or local stress or strain caused by the weight) received by the pad electrode is preferable. For this reason, if it is more sensitive to the load when the element for weight measurement is arranged so that the center of the element is located at a position shifted by several μm from the center position of the pad electrode, the weight measurement is performed at such a position. It is preferable to arrange an element for use. Further, when the weight applied to one pad electrode is relatively small, as shown in FIG. 8, a weight measuring element may be provided between two or more pad electrodes 48 provided in proximity to each other. By doing so, there may be a case where higher sensitivity is exhibited as compared with the case where a weighted measuring element is provided directly under the pad electrode. In the above embodiment, the MOS transistor is used as the weight measurement element, but another element, for example, a diode may be used. The leakage current flowing through the PN junction may be measured as a characteristic value while applying a reverse bias to the PN junction diode having the PN junction. Since the magnitude of the leakage current changes depending on the stress generated in the PN junction, the degree of weighting can be obtained from the value of the leakage current. This utilizes the fact that the semiconductor band gap and recombination generation current change when stress is applied to the joint.
[0054]
A piezoelectric transducer (or a piezoresistive element) may be disposed under the pad electrode as the weight measurement element. High sensitivity can be obtained by using a material having a large piezoresistance coefficient such as tellurium (Te) as the material of the piezoelectric transducer. However, for ease of combination with silicon-based process technology, the piezoelectric conversion element may be formed using silicon itself. The positive / negative polarity of the elastic specific resistance of silicon is reversed depending on the conductivity type of the impurity to be doped. Using these characteristics, a highly sensitive semiconductor gauge may be formed on the wafer.
[0055]
Note that when the semiconductor device is an integrated circuit including a bipolar transistor, a bipolar transistor may be used as the weight measurement element. Bipolar transistor DC current gain h _FE Greatly varies depending on the local stress generated between the emitter and the base. If this change is used, highly sensitive weighted measurement is possible.
[0056]
BaTiO as an element for weight measurement _Three A piezoelectric element including a piezoelectric body such as may be used, but in that case, the manufacturing process becomes complicated. For this reason, it is preferable to form a weight measuring element from the above-described transistors and diodes. In that case, it becomes possible to form the weight measurement element by using the process of forming the integrated circuit inside the chip, and the necessity of adding a special process is reduced.
[0057]
According to each of the above embodiments, it is possible to electrically measure the local pressurization level by the probe electrode of the probe card. As a result of the measurement, for example, when it is detected that the pressurization level at the wafer central portion is relatively low, a configuration in which the wafer central portion can be further pressurized by auxiliary pressurizing means may be adopted. . If the auxiliary pressurization (weight correction) is performed while performing the electrical measurement of the pressurization level, the in-plane uniformity of the pressurization level can be improved with high accuracy. As a method of performing auxiliary pressurization, a rigid plate on which a plurality of piezo elements are arranged may be arranged on the probe card so that each piezo element can press the back surface of the probe card. By controlling the voltage applied to each piezo element, the degree to which the probe electrodes (bumps) on the probe card press each part of the wafer can be finely adjusted.
[0058]
In the embodiment shown in FIG. 2, the localized anisotropic conductive rubber 23 is used to electrically connect the multilayer wiring board and the bump on the multilayer wiring board. The multilayer wiring board and the bump may be brought into direct contact without using the conductive rubber 23. Conversely, if bumps are formed on the wafer to be measured, there is no need to form bumps on the probe card side. In that case, if the tip of the localized anisotropic conductive rubber 23 of the probe card is pressed against the bump on the wafer, wafer batch type measurement / inspection can be executed. Further, the wiring of the multilayer wiring board may be directly contacted with the bump on the wafer without using the localized anisotropic conductive rubber 23.
[0059]
【The invention's effect】
According to the present invention, since the semiconductor device includes the element whose electrical characteristics change according to the load applied by the probe electrode of the wafer batch type measurement / inspection probe card, the probe electrode and the pad are used for the measurement by the probe card. Whether or not the contact with the electrode is performed under a normal pressing level can be electrically detected.
[0060]
When the element is a MOS transistor, the threshold voltage fluctuates according to the degree of weighting by the probe electrode, so that the degree of weighting can be easily detected.
In the case where the element has a PN junction, the degree of weighting can also be easily detected by measuring the reverse current-voltage characteristics of the PN junction.
[0061]
When the element is a piezoelectric transducer, the weight level can be detected with high sensitivity. When the element is arranged on a scribe lane on the wafer, the wafer can be used efficiently.
[0062]
According to the probe card of the present invention, it includes a probe electrode capable of applying a weight to the element and a probe electrode that presses the pad electrode of the element. Suitable for inspection.
[Brief description of the drawings]
FIG. 1 is a perspective view for explaining a wafer batch type measurement / inspection technique.
FIG. 2 is a cross-sectional view showing a probe card and the like of the present invention.
FIG. 3 is a cross-sectional view showing the relationship between a probe card, a wafer, and a wafer tray during measurement.
FIG. 4 is a cross-sectional view showing a main part of a semiconductor device according to an embodiment of the present invention.
FIG. 5 is a graph showing the gate voltage dependence of drain current.
FIG. 6 is a plan layout view showing an arrangement example of weight measurement elements and reference elements according to the embodiment of the present invention.
FIG. 7 is a plan view of a wafer showing an example of the arrangement of measurement points.
FIG. 8 is a cross-sectional view showing a main part of a semiconductor device according to another embodiment of the present invention.
[Explanation of symbols]
1 Probe card
2 wafers (eg silicon wafers with a diameter of 200 mm)
3 Wafer tray
4 Seal ring
5 Vacuum valve
20 Probe card
21 multilayer wiring board
21a glass substrate
21b Multilayer wiring
21c Interlayer insulating film
22 Bumped polyimide thin film
22b Bump
23 Localized anisotropic conductive rubber
25 wafers
26 Pad electrodes on wafer
28 Wafer tray
40a Source / drain region of weight measuring element 50
40b Source / drain region of reference element 51
41a Channel region of weight measuring element 50
41b Channel region of reference element 51
42a Gate insulating film of weight measuring element 50
42b Gate insulating film of reference element 51
43a Gate electrode of weight measuring element 50
43b Gate electrode of the reference element 51
44a Source / drain wiring of element 50 for weight measurement
44b Source / drain wiring of the reference element 51
45 Interlayer insulation film
46 Pad electrode for weight measurement
47 Probe card
48 Probe electrode (bump)
50 Weight measuring element
51 Reference element
53 Gate wiring
54a Source / drain wiring of element 50 for weight measurement
54b Source / drain wiring of reference element 51
55 Pad electrode for gate
56 Pad electrode for source / drain
70 wafers
71-75 Measurement points on wafer

Claims (18)

An element whose electrical characteristics change according to a load applied by a probe electrode of a probe card for wafer batch type measurement inspection,
A plurality of pad electrodes connected to the element;
A semiconductor device comprising: The element is a MOS transistor;
2. The semiconductor device according to claim 1, wherein the electrical characteristic is a current-voltage characteristic of the MOS transistor. The element has a PN junction;
2. The semiconductor device according to claim 1, wherein the electrical characteristic is a reverse current voltage characteristic of the PN junction.   The semiconductor device according to claim 1, wherein the element is a piezoelectric conversion element.   The semiconductor device according to claim 1, wherein the element is disposed on a scribe lane on a wafer. An inspection method for a semiconductor device according to claim 1,
On a wafer including a plurality of the semiconductor devices, a probe card including a plurality of probe electrodes arranged two-dimensionally and a multilayer wiring board electrically connected to the plurality of probe electrodes is overlaid, Thereby contacting the probe electrode to the plurality of pads of the element;
Pressing the wafer with the probe card;
Electrically detecting a change in electrical characteristics of the element caused by the pressing;
A method for inspecting a semiconductor device, comprising: The semiconductor device inspection according to claim 6, wherein, of the plurality of semiconductor devices included in the wafer, only the element in the selected semiconductor device is directly pressed by the probe electrode of the probe card. Method. Of the plurality of semiconductor devices included in the wafer, a change in electrical characteristics of the element in the selected semiconductor device is referred to an electrical characteristic of the element in a semiconductor device other than the selected semiconductor device. 8. The method of inspecting a semiconductor device according to claim 7, wherein the method is determined as follows. Of the elements of the plurality of semiconductor devices included in the wafer, only selected elements are directly pressed by the probe electrode of the probe card, and the electrical characteristics of the pressed elements and the elements that do not press The semiconductor device inspection method according to claim 6, wherein the method is compared with electrical characteristics.   The semiconductor device inspection method according to claim 6, wherein the probe electrode is a bump electrode.   The conductive rubber for electrically connecting the probe electrode to the multilayer wiring board is provided between the probe electrode and the multilayer wiring board. The inspection method of the semiconductor device as described.   12. The method for inspecting a semiconductor device according to claim 11, wherein the probe electrode is formed on a thin film stretched in a state where a tension is applied to a rigid ring.   10. The method for inspecting a semiconductor device according to claim 6, wherein the probe electrode is formed from at least a part of the wiring of the multilayer wiring board. A probe card for performing wafer batch type measurement inspection on the semiconductor device according to claim 1,
A plurality of probe electrodes arranged two-dimensionally;
A multilayer wiring board electrically connected to the plurality of probe electrodes,
The probe card includes a probe electrode capable of applying a weight to the element and a probe electrode that presses the pad electrode of the element.   The probe card according to claim 14, wherein the probe electrode is a bump electrode.   The probe card according to claim 15, further comprising conductive rubber for electrically connecting the probe electrode to the multilayer wiring board between the probe electrode and the multilayer wiring board.   16. The probe card according to claim 15, wherein the probe electrode is formed on a thin film stretched in a state where tension is applied to the rigid ring.   15. The probe card according to claim 14, wherein the probe electrode is formed from at least part of the wiring of the multilayer wiring board.

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