JP3968946B2 - Semiconductor integrated circuit test apparatus, calibration method for semiconductor integrated circuit test apparatus, and recording medium - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of a device under test, and more particularly to calibration during testing of the device under test of a semiconductor integrated circuit test apparatus. .
[0002]
[Prior art]
Japanese Patent Application Laid-Open No. 7-280885 describes an invention relating to a method for calibrating a driver of a semiconductor integrated circuit test apparatus. In the conventional semiconductor integrated circuit test apparatus, since the device under test is separated from the semiconductor integrated circuit test device when the driver is calibrated, the load condition is detected when the device under test is connected during the test execution. In order to solve the inconvenience of being different from the calibration conditions due to the difference, the voltage level of the signal applied to the device under measurement is calibrated under the test conditions of the device under measurement.
[0003]
[Problems to be solved by the invention]
In the invention described in Japanese Patent Laid-Open No. 7-280885 described above, the accuracy of the absolute value of the signal voltage level applied to the device under measurement is a problem.
On the other hand, the accuracy of absolute values is also important during the inspection of semiconductor devices such as LSI, but the relative accuracy of the output of certain related circuit systems such as power supply units, drivers, and comparators in semiconductor integrated circuit test equipment There are cases where you want to reduce the error as much as possible.
[0004]
For example, when an LSI characterized by an analog linear circuit is a device under test, higher accuracy is achieved in DC measurement and test conditions to be set (bias voltage applied to each pin of the device under test). May be required. A case where an unacceptable relative error occurs due to an error included in a voltage applied to a device under test in a conventional semiconductor integrated circuit test apparatus will be described with reference to FIG.
[0005]
In FIG. 5, in the case where a voltage setting value (programmed value) is supplied from the tester driver channels # 1 and # 2 to the pins A and B of the device under test 100 that is an LSI characterized by an analog linear circuit, Even in a semiconductor integrated circuit test apparatus having a calibration function, the accuracy guaranteed by the semiconductor integrated circuit test apparatus is usually ± α (α = several mv˜ In the worst case, an error of + α occurs in the tester driver channel # 1 and −α occurs in the tester driver channel # 2 with respect to the set value even in the guaranteed range. The same applies to the voltage supplied to the power supply terminal Vcc.
[0006]
When the voltage level of the reference output REF OUT of the device under test 100 is determined by the relative potential difference of each signal voltage (including the voltage supplied to the power supply terminal Vcc) supplied to the device under test 100, For example, the device under measurement 100 determines the potential difference between the tester driver channel # 1 and the potential difference between the tester driver channel # 1 and the tester driver channel # 2 with respect to the power supply voltage supplied to the power supply terminal Vcc. Worst case, + 2α occurs when the reference output REF OUT is determined, but there is a problem that this error may be unacceptable in the inspection.
The present invention has been made in view of such circumstances, and a semiconductor integrated circuit test capable of suppressing the relative error of the voltage setting value supplied to each pin of the device under measurement within the resolution of the measurement system. An object of the present invention is to provide an apparatus, a semiconductor integrated circuit test apparatus calibration method, and a recording medium.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, the invention according to claim 1 is a calibration method of a semiconductor integrated circuit test apparatus for performing various tests by supplying a predetermined voltage or test signal to each pin of a device under test. In the semiconductor integrated circuit test apparatus connected to each pin of the device under test A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin from Each pin Common Voltage Measurement Part For each pin, the error is measured for each pin during the inspection of the device under test, and the error between the measured value and the preset value is determined for each pin. Feedback is performed so that a voltage value having a reverse polarity of the error is applied as a correction value to a corresponding pin of the device under measurement, and the supply voltage is set by repeating the feedback operation until the error is equal to or less than an allowable value. To do.
[0008]
According to the first aspect of the present invention, in the semiconductor integrated circuit test apparatus connected to each pin of the device under test. A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin from Each pin Common Voltage Measurement Part For each pin, the error is measured for each pin during the inspection of the device under test, and the error between the measured value and the preset value is determined for each pin. Since the voltage value having the opposite polarity of the error is fed back to the corresponding pin of the device under test as a correction value, the supply voltage is set by repeating the feedback operation until the error falls below the allowable value. The relative error of the voltage setting value supplied to each pin of the device under test can be suppressed within the resolution range of the measurement system.
[0009]
According to a second aspect of the present invention, in the calibration method for a semiconductor integrated circuit test apparatus according to the first aspect, the correction value finally determined for each pin of the device under measurement is stored as an electronic file. The calibration value is not measured from the next test, and the correction value for each pin of the device under test read from the electronic file is added to the apparent set value supplied to each pin. The setting value is supplied to each pin.
[0010]
According to the invention described in claim 2, the correction value finally determined for each pin of the device under test is stored as an electronic file, and measurement for calibration is not performed from the next test, The correction value for each pin of the device under test read from the electronic file is added to the apparent setting value supplied to each pin as a setting value to each pin, reducing the calibration time Can be planned.
[0011]
According to a third aspect of the present invention, in a semiconductor integrated circuit test apparatus for performing various tests by supplying a predetermined voltage or a test signal to each pin of the device under measurement, the device is connected to the pin of the device under measurement. In the semiconductor integrated circuit test apparatus A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin is measured for each pin during the inspection of the device under test. Each pin Common voltage measurement means, storage means for storing preset values of voltages supplied to each pin of the device under test at the time of testing, and measurement of voltage supplied to each pin measured by the voltage measurement means An error between the value and the preset value stored in the storage means is obtained for each pin, and for a pin for which the error is greater than or equal to an allowable value, the voltage value of the opposite polarity of the error is used as a correction value for the device under test. Control means for performing feedback so as to be applied to a corresponding pin and setting the supply voltage by repeating the feedback operation until the error becomes equal to or less than an allowable value.
[0012]
According to a third aspect of the present invention, in a semiconductor integrated circuit test apparatus for performing various tests by supplying a predetermined voltage or a test signal to each pin of the device under measurement, it is connected to each pin of the device under measurement. In the semiconductor integrated circuit test apparatus A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin is measured for each pin during the inspection of the device under test. Each pin Common voltage measurement means, storage means for storing preset values of voltages supplied to each pin of the device under test at the time of testing, and measurement of voltage supplied to each pin measured by the voltage measurement means An error between the value and the preset value stored in the storage means is obtained for each pin, and for a pin for which the error is greater than or equal to an allowable value, the voltage value of the opposite polarity of the error is used as a correction value for the device under test. The voltage setting value to be supplied to each pin of the device to be measured is provided with control means that feeds back the voltage to be applied to the corresponding pin and sets the supply voltage by repeating the feedback operation until the error falls below an allowable value. Can be suppressed within the range of the resolution of the measurement system.
[0013]
According to a fourth aspect of the present invention, in the semiconductor integrated circuit test apparatus according to the first aspect, the second storage for storing the correction value finally determined for each pin of the device under test as a file. The control means does not perform calibration measurement from the next test, and calculates a correction value for each pin of the device under test read from the file stored in the second storage means. A value added to the apparent set value supplied to each pin is supplied to each pin as a set value.
[0014]
According to a fourth aspect of the present invention, in the semiconductor integrated circuit test apparatus according to the first aspect, the second storage for storing the correction value finally determined for each pin of the device under test as a file. The control means does not perform calibration measurement from the next test, and calculates a correction value for each pin of the device under test read from the file stored in the second storage means. Since the value added to the apparent set value supplied to each pin is supplied to each pin as a set value, the calibration time can be shortened.
[0015]
According to the fifth aspect of the present invention, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or a test signal to each pin of the device to be measured, In the semiconductor integrated circuit test apparatus connected to each pin A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin from Each pin Common Voltage Measurement Part The first processing to be measured during the inspection of the device under test using each pin, and the error between the measured value and the preset value is obtained for each pin, and the error is greater than or equal to the allowable value. With respect to the second process, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error is less than or equal to an allowable value. The gist of the present invention is a computer-readable recording medium recording a program for causing a computer to execute a third process for setting a supply voltage.
[0016]
According to the fifth aspect of the present invention, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement, In the semiconductor integrated circuit test apparatus connected to each pin A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin from Each pin Common Voltage Measurement Part The first processing to be measured during the inspection of the device under test using each pin, and the error between the measured value and the preset value is obtained for each pin, and the error is greater than or equal to the allowable value. With respect to the second process, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error is less than or equal to an allowable value. Since the program for causing the computer to execute the third process for setting the supply voltage is recorded on a computer-readable recording medium, the program recorded on the recording medium is read into the computer system and executed. By doing so, the relative error of the voltage setting value supplied to each pin of the device under test can be suppressed within the resolution range of the measurement system. That.
[0017]
According to the sixth aspect of the present invention, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device to be measured, In the semiconductor integrated circuit test apparatus connected to each pin A voltage supply unit for supplying a preset voltage provided for each pin To the actual voltage value supplied at each pin Each pin Common Voltage Measurement Part The first processing to be measured during the inspection of the device under test using each pin, and the error between the measured value and the preset value is obtained for each pin, and the error is greater than or equal to the allowable value. With respect to the second process, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error is less than or equal to an allowable value. The third process of setting the supply voltage and the correction value finally determined for each pin of the device under test are stored as an electronic file, and calibration measurement is not performed from the next test. And a fourth process of supplying a correction value for each pin of the device under test read from the electronic file to an apparent setting value supplied to each pin as a setting value to each pin. The recording medium readable by the recording a computer program for executing the gist.
[0018]
According to the sixth aspect of the present invention, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement, In the semiconductor integrated circuit test apparatus connected to each pin A voltage supply unit for supplying a preset voltage provided for each pin To the actual voltage value supplied at each pin Each pin Common Voltage Measurement Part The first processing to be measured during the inspection of the device under test using each pin, and the error between the measured value and the preset value is obtained for each pin, and the error is greater than or equal to the allowable value. With respect to the second process, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error is less than or equal to an allowable value The third process of setting the supply voltage and the correction value finally determined for each pin of the device under test are stored as an electronic file, and calibration measurement is not performed from the next test. And a fourth process of supplying a correction value for each pin of the device under test read from the electronic file to an apparent setting value supplied to each pin as a setting value to each pin. Since the program for executing the be recorded in a recording medium readable by a computer, it can be shortened calibration time.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a schematic configuration of a semiconductor integrated circuit test apparatus according to an embodiment of the present invention. In FIG. 1, a semiconductor integrated circuit test apparatus 1 includes a CPU 10 that controls each part of a semiconductor integrated circuit device by executing a control program, a ROM 12 that stores a control program and fixed data, and data reading and writing. RAM 14, which is a storage element that can perform the above, a DC measurement unit 16, a multiplexer unit 18, and a pin electronics unit 20. A user setting data storage area and a work area for the CPU 10 are set in the RAM 14.
[0020]
The DC measuring unit 16 has three functions: a function of measuring a current by applying a constant voltage, a function of measuring a voltage by applying a constant current, and a function of measuring a voltage. It functions as a common measurement system that measures the voltage applied to or output from each pin. In the embodiment of the present invention, the set voltage applied to each pin of the device under test (DUT) 100 is measured. The DC measurement unit 16 is connected to the pin electronics unit 20 via a detection line (SNSE LINE) 30, a voltage (current) supply line (FORCE LINE) 31, and a multiplexer 18. The pin electronics unit 20 includes a driver 200, a comparator 201, and relays 202 (DRV), 203 (CMP), 204 (DCS), and 205 (DCF).
[0021]
In the above configuration, a voltage of a predetermined set value stored in the ROM 12 is supplied from the driver 200 in the pin electronics unit 20 to each pin of a device under test (DUT) (not shown) via the relay 202, The voltage output from each pin of the device under measurement is input to the comparator 201 via the relay 203 and is compared with the reference value.
Further, the DC measurement unit 16 outputs the voltage applied to each pin of the device under measurement via the detection line 30, the voltage (current) line 31, the multiplexer unit 18, and the relays 204 and 205, or is output from each pin. Measure the voltage.
[0022]
Next, FIG. 2 shows a configuration of a main part of the semiconductor integrated circuit test apparatus according to the embodiment of the present invention. In FIG. 2, during the test of the device under test 100, which is an LSI characterized by an analog linear circuit, tester driver channels # 1, # supplying a predetermined set voltage to the pins A and B of the device under test 100 2. Connected to the power supply line 101 supplying the power supply voltage to the power supply terminal Vcc of the device under test 100 and the reference output REF OUT of the device under test 100 to the comparator (built in the pin electronics section 20) side of the tester Each voltage such as a voltage output to the output line 102 is taken into the DC measurement unit 16 which is a common measurement system via relays 111, 112, 113 and 114. Other configurations are the same as those shown in FIG.
In addition, although there are many terminals, that is, pins, of the device under measurement 100, they are omitted for convenience of explanation.
[0023]
The contents of the control program executed by the CPU 10 of the semiconductor integrated circuit testing apparatus having the above configuration will be described with reference to the flowchart of FIG. When the control program stored in the ROM 12 shown in FIG. 3 is started, in step 300, the voltage values supplied from the tester driver channels # 1 and # 2 are set to the pins A and B of the device under test 100. . Similarly, the set voltage is supplied to the power supply voltage supplied to the power supply terminal VCC.
[0024]
Next, the voltage values actually applied to the respective pins such as the pin A and the pin B are taken in via the relays 111, 112, 113, and 114 by the DC measuring unit 16 which is a common measurement system, and sequentially measured (steps). 301). In step 302, the difference between the measured value and the preset value, that is, the error X is calculated. Next, it is determined whether or not the absolute value | X | of the error X is within the allowable value M (step 303). If the determination in step 303 is affirmative, that is, if it is determined that the absolute value | X | of the error X is within the allowable value M, the execution of this program is terminated.
[0025]
On the other hand, if it is determined in step 303 that the absolute value | X | of the error X is greater than or equal to the allowable value M, the error X has a polarity opposite to that of the error X so that the error X obtained in step 302 is canceled. The correction value of the value | X | is set so as to be fed back to the corresponding pin (or terminal) of the device under test 100, that is, the correction value is added to the apparent set value (step 304). This feedback process is repeated until the determination in step 303 is affirmed.
[0026]
Next, FIG. 4 shows specific contents of the control program executed by the CPU 10 of the semiconductor integrated circuit test apparatus shown in FIG. In the figure, when the control program is activated, in step 400, test conditions for the device under measurement 100 are set. For example, a power supply voltage setting value of + 5.50V is supplied to the power supply line 101, a voltage of setting value + 5.00V is supplied to the tester driver channel # 1, and a voltage of setting value + 4.50V is supplied to the tester driver channel # 2. Is set by the pin electronics unit 20 as described above.
[0027]
Next, a test of the device under test 100 by the semiconductor integrated circuit device is executed (step 401). In step 402, the common DC measurement unit 16 measures the set voltage supplied to each pin of the device under measurement 100, and obtains an error between the measured value and the set value (step 402). The potentials of the power supply line 101 and tester drive channels # 1 and # 2 are sequentially measured, and errors + α, + β, and + γ between these measured values and set values are obtained. Next, in step 403, it is determined whether or not these errors are within an allowable value.
[0028]
If the errors + α, + β, + γ are within the allowable values in step 403 and can be ignored, the execution of this program is terminated. If the errors + α, + β, and + γ are not less than allowable values in step 403 and cannot be ignored, −α is set as the set value supplied to the power supply line 101, and −− is set as the set value for the tester driver channel # 1. β is fed as a new set value so that the tester driver channel # 2 feeds back -γ to the set value (step 404), and the process returns to step 401. The processing of steps 401 to 404 is repeated until the determination of step 403 is affirmed.
[0029]
The control operation at the time of calibration of the conventional semiconductor integrated circuit test apparatus is shown in the flowchart of FIG. 6 in contrast to the control operation at the time of calibration of the semiconductor integrated circuit test apparatus according to the embodiment of the present invention described above. In the figure, test conditions for the device under measurement 100 are set in step 500. As in the case of FIG. 4, for example, a power supply voltage setting value of +5.50 V is set in the power supply line 101, a voltage of setting value +5.00 V is set in the tester driver channel # 1, and a setting value +4 is set in the tester driver channel # 2. Each of the .50V voltages is set by the pin electronics section 20 to be supplied.
[0030]
Next, a test of the device under test 100 by the semiconductor integrated circuit device is executed (step 501). Further, in step 502, the DC measurement unit 16 measures the set voltage of the reference output REF OUT in the device under measurement 100 to make a determination. Here, in the conventional calibration method of the semiconductor integrated circuit test apparatus, since the relative error is not corrected, the voltage value supplied to each pin of the device under test 100, that is, the power supply line 101 for supplying power to the power supply terminal Vcc. Therefore, measurement is performed in a state in which the guaranteed accuracy error ± α of the semiconductor integrated circuit test apparatus is included for each set value in the tester driver channels # 1 and # 2.
[0031]
Therefore, in the worst case, the errors β and γ of the set values of the tester driver channels # 1 and # 2 are β = + α and γ = −α, that is, the measured values of the set values in the tester driver channel # 1 are + 5.00 + α. (V) The measured value of the set value in the tester driver channel # 2 is + 4.50−α (V), which is between the tester driver channels # 1 and # 2. In this case, as described above, since the determination output of the reference output REF OUT is determined by the set values of the tester driver channels # 1 and # 2, the relative error includes an error of + 2α, which may hinder the determination. There is.
[0032]
On the other hand, in the semiconductor integrated circuit test apparatus according to the embodiment of the present invention, the set voltage at each pin of the device under measurement 100 is measured by the DC measurement unit 16 which is a common measurement system. The relative error of the voltage setting value supplied to each pin of the measuring device can be suppressed within the resolution range of the DC measuring unit 16.
[0033]
When each pin of the device under test 100 has the same error as the error and the correction value of the reverse polarity is added to the apparent set value and fed back to set the corresponding pin, The correction values determined in advance are stored as electronic files, and the calibration measurement is not performed from the next test, and the correction values for each pin of the device under test read from the electronic file are stored in each pin. A value added to the apparent set value to be supplied may be supplied to each pin as a set value. With this configuration, the calibration time of the semiconductor integrated circuit test apparatus can be shortened.
[0034]
As described above, according to the calibration method of the semiconductor integrated circuit test apparatus according to the embodiment of the present invention, the specific related circuit in the semiconductor integrated circuit test apparatus connected to each pin of the device under measurement is The actual voltage value supplied to each pin is measured for each pin during the inspection of the device under test using a DC measurement unit which is a common measurement system, and the error between the measured value and the preset value For each pin whose error is equal to or greater than the allowable value, feedback is performed so that the voltage value of the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under test. Since the supply voltage is set by repeating the feedback operation until the value becomes less than the value, the relative error of the voltage setting value supplied to each pin of the device under test is within the resolution range of the measurement system. It is possible to win.
[0035]
Further, according to the calibration method of the semiconductor integrated circuit test apparatus according to the embodiment of the present invention, the correction value finally determined for each pin of the device under test is stored as an electronic file, and the next test From time to time, no calibration measurement is performed, and the correction value for each pin of the device under test read from the electronic file is added to the apparent setting value supplied to each pin as a setting value for each pin. Since it is supplied, the calibration time can be shortened.
[0036]
In addition, according to the semiconductor integrated circuit test apparatus of the embodiment of the present invention, in the semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement. An actual voltage value supplied to each pin from a specific related circuit in the semiconductor integrated circuit test apparatus connected to each pin of the measuring device is measured for each pin during the inspection of the device under test. DC measurement unit 16 as a common voltage measurement unit, ROM 12 as a storage unit in which preset values of voltages supplied to each pin of the device under test at the time of testing are stored, and DC measurement unit 16 The error between the measured value of the voltage supplied to each pin and the preset value stored in the ROM 12 is obtained for each pin, and the error is greater than the allowable value. Thus, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the supply voltage is set by repeating the feedback operation until the error becomes equal to or less than an allowable value. Since the CPU 10 as the control means is included, the relative error of the voltage setting value supplied to each pin of the device under measurement can be suppressed within the range of the resolution of the measurement system.
[0037]
Further, according to the semiconductor integrated circuit testing apparatus according to the embodiment of the present invention, the RAM 14 as the second storage means for storing the correction value finally determined for each pin of the device under measurement as a file is provided. The CP 10 as a control means does not perform calibration measurement from the next test, and supplies a correction value for each pin of the device under test read from the file stored in the RAM 14 to each pin. Since the value added to the apparent set value is supplied to each pin as the set value, the calibration time can be shortened.
[0038]
Further, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement, the semiconductor connected to the pin of the device under measurement A first process of measuring an actual voltage value supplied to each pin from a specific related circuit in an integrated circuit test apparatus for each pin during the inspection of the device under test using a common measurement system The error between the measured value and the preset value is obtained for each pin. Causing the computer to execute a second process for feeding back the voltage to be applied and a third process for setting the supply voltage by repeating the feedback operation until the error falls below an allowable value. The a program recorded on a computer-readable recording medium, to read the program recorded in this recording medium into a computer system, may be performed to calibrate the semiconductor integrated circuit testing apparatus by executing.
[0039]
By causing the computer system to read and execute the program recorded on the recording medium, the relative error of the voltage setting value supplied to each pin of the device under test can be suppressed within the resolution range of the measurement system. .
[0040]
Further, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement, the semiconductor connected to the pin of the device under measurement A first process for measuring an actual voltage value supplied at each pin from a specific related circuit in an integrated circuit test apparatus for each pin during an inspection of the device under test using a common measurement system The error between the measured value and the preset value is obtained for each pin. A second process for feedback so as to apply, a third process for setting the supply voltage by repeating the feedback operation until the error falls below an allowable value, and each pin of the device under test The correction value finally determined is stored as an electronic file, the calibration measurement is not performed from the next test, and the correction value for each pin of the device under test read from the electronic file is stored in each electronic file. A program for causing a computer to execute a fourth process for supplying each pin with a value added to the apparent set value supplied to the pin as a set value is recorded on a computer-readable recording medium. The program recorded on the recording medium may be read into the computer system and executed to calibrate the semiconductor integrated circuit testing apparatus.
[0041]
Since the program recorded on the recording medium is read by the computer system and executed, it is recorded, so that the calibration time can be shortened.
[0042]
Here, the “computer system” includes an OS and hardware such as peripheral devices.
Further, the “computer system” includes a homepage providing environment (or display environment) if the WWW system is used.
[0043]
The “computer-readable recording medium” refers to a storage medium such as a floppy disk, a magneto-optical disk, a general medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system.
Furthermore, the “computer-readable recording medium” dynamically holds a program for a short time like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line. It also includes a device (transmission medium or transmission wave) and a device that holds a program for a certain period of time, such as a volatile memory inside a computer system serving as a server or client in that case.
[0044]
The program may be for realizing a part of the functions described above. Furthermore, what can implement | achieve the function mentioned above in combination with the program already recorded on the computer system, what is called a difference file (difference program) may be sufficient.
[0045]
【The invention's effect】
According to the first aspect of the present invention, in the semiconductor integrated circuit test apparatus connected to each pin of the device under test. A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin from Each pin Common Voltage Measurement Part For each pin, the error is measured for each pin during the inspection of the device under test, and the error between the measured value and the preset value is determined for each pin. Since the voltage value having the opposite polarity of the error is fed back to the corresponding pin of the device under test as a correction value, the supply voltage is set by repeating the feedback operation until the error falls below the allowable value. The relative error of the voltage setting value supplied to each pin of the device under test can be suppressed within the resolution range of the measurement system.
[0046]
According to the invention described in claim 2, the correction value finally determined for each pin of the device under test is stored as an electronic file, and measurement for calibration is not performed from the next test, The correction value for each pin of the device under test read from the electronic file is added to the apparent setting value supplied to each pin as a setting value to each pin, reducing the calibration time Can be planned.
[0047]
According to a third aspect of the present invention, in a semiconductor integrated circuit test apparatus for performing various tests by supplying a predetermined voltage or a test signal to each pin of the device under measurement, it is connected to each pin of the device under measurement. In the semiconductor integrated circuit test apparatus A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin is measured for each pin during the inspection of the device under test. Each pin Common voltage measurement means, storage means for storing preset values of voltages supplied to each pin of the device under test at the time of testing, and measurement of voltage supplied to each pin measured by the voltage measurement means An error between the value and the preset value stored in the storage means is obtained for each pin, and for a pin for which the error is greater than or equal to an allowable value, the voltage value of the opposite polarity of the error is used as a correction value for the device under test. The voltage setting value to be supplied to each pin of the device to be measured is provided with control means that feeds back the voltage to be applied to the corresponding pin and sets the supply voltage by repeating the feedback operation until the error falls below an allowable value. Can be suppressed within the range of the resolution of the measurement system.
[0048]
According to a fourth aspect of the present invention, in the semiconductor integrated circuit test apparatus according to the first aspect, the second storage for storing the correction value finally determined for each pin of the device under test as a file. The control means does not perform calibration measurement from the next test, and calculates a correction value for each pin of the device under test read from the file stored in the second storage means. Since the value added to the apparent set value supplied to each pin is supplied to each pin as a set value, the calibration time can be shortened.
[0049]
According to the fifth aspect of the present invention, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement, In the semiconductor integrated circuit test apparatus connected to each pin A voltage supply unit for supplying a preset voltage provided for each pin The actual voltage value supplied to each pin from Each pin Common Voltage Measurement Part The first processing to be measured during the inspection of the device under test using each pin, and the error between the measured value and the preset value is obtained for each pin, and the error is greater than or equal to the allowable value. With respect to the second process, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error is less than or equal to an allowable value. Since the program for causing the computer to execute the third process for setting the supply voltage is recorded on a computer-readable recording medium, the program recorded on the recording medium is read into the computer system and executed. By doing so, the relative error of the voltage setting value supplied to each pin of the device under test can be suppressed within the resolution range of the measurement system. That.
[0050]
According to the sixth aspect of the present invention, when calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under measurement, In the semiconductor integrated circuit test apparatus connected to each pin A voltage supply unit for supplying a preset voltage provided for each pin To the actual voltage value supplied at each pin Each pin Common Voltage Measurement Part The first processing to be measured during the inspection of the device under test using each pin, and the error between the measured value and the preset value is obtained for each pin, and the error is greater than or equal to the allowable value. With respect to the second process, feedback is performed so that a voltage value having the opposite polarity of the error is applied as a correction value to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error is less than or equal to an allowable value The third process of setting the supply voltage and the correction value finally determined for each pin of the device under test are stored as an electronic file, and calibration measurement is not performed from the next test. And a fourth process of supplying a correction value for each pin of the device under test read from the electronic file to an apparent setting value supplied to each pin as a setting value to each pin. Since the program for executing the be recorded in a recording medium readable by a computer, to read the program recorded in this recording medium into a computer system, by executing, it can be shortened calibration time.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration of a semiconductor integrated circuit test apparatus according to an embodiment of the present invention.
FIG. 2 is a block diagram showing a configuration of a main part of the semiconductor integrated circuit test apparatus according to the embodiment of the present invention.
FIG. 3 is a flowchart showing a control operation of the semiconductor integrated circuit test apparatus shown in FIG. 2;
4 is a flowchart showing a more specific control operation of the semiconductor integrated circuit test apparatus shown in FIG. 2;
FIG. 5 is a block diagram showing a configuration of a main part of a conventional semiconductor integrated circuit testing apparatus.
6 is a flowchart showing a control operation of the conventional semiconductor integrated circuit test apparatus shown in FIG.
[Explanation of symbols]
1 ... Semiconductor integrated circuit test equipment
10 ... CPU
12 ... ROM
14 ... RAM
16 ... DC measurement section
100: Device to be measured
101 ... Power line
102 ... Output line
111, 112, 113, 114 ... Relay

Claims (6)

In a semiconductor integrated circuit testing apparatus calibration method for performing various tests by supplying a predetermined voltage or test signal to each pin of a device under test,
An actual voltage value supplied to each pin from a voltage supply unit that supplies a preset value voltage provided for each pin to the semiconductor integrated circuit test apparatus connected to each pin of the device to be measured. the measured during inspection execution of the device under test for each pin using each pin common voltage measuring unit, and obtains an error between the measured value and the preset value for each pin, said error is larger than the allowable value For the pin, the voltage value of the opposite polarity of the error is fed back as a correction value to be applied to the corresponding pin of the device under measurement, and the feedback operation is repeated until the error becomes less than the allowable value to supply voltage. A calibration method for a semiconductor integrated circuit test apparatus, characterized in that   The correction value finally determined for each pin of the device under test is stored as an electronic file, and the measurement for calibration is not performed from the next test, and the device under test read out from the electronic file is stored. 2. The method of calibrating a semiconductor integrated circuit test apparatus according to claim 1, wherein a value obtained by adding a correction value for each pin to an apparent set value supplied to each pin is supplied to each pin as a set value. . In a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of a device under test.
An actual voltage value supplied to each pin from a voltage supply unit that supplies a preset value voltage provided for each pin to the semiconductor integrated circuit test apparatus connected to each pin of the device to be measured. Voltage measuring means common to each pin to be measured during the inspection of the device under test for each pin ;
Storage means for storing preset values of voltages supplied to the pins of the device under test during testing;
For each pin, an error between the measured value of the voltage supplied to each pin measured by the voltage measuring unit and the preset value stored in the storage unit is obtained for each pin. A control means for feeding back a voltage value having a reverse polarity of the error as a correction value to be applied to a corresponding pin of the device under measurement, and setting the supply voltage by repeating the feedback operation until the error becomes equal to or less than an allowable value. When,
A semiconductor integrated circuit testing apparatus comprising: A second storage means for storing the correction value finally determined for each pin of the device under measurement as a file;
The control means does not perform calibration measurement from the next test, and the correction value for each pin of the device under test read from the file stored in the second storage means is supplied to each pin. 4. The semiconductor integrated circuit test apparatus according to claim 3 , wherein a value added to the apparent set value is supplied to each pin as a set value. When calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under test,
An actual voltage value supplied to each pin from a voltage supply unit that supplies a preset value voltage provided for each pin to the semiconductor integrated circuit test apparatus connected to each pin of the device to be measured. A first process for measuring each of the pins during the inspection of the device under test using a voltage measurement unit common to the pins ;
An error between the measured value and the preset value is obtained for each pin, and for a pin whose error is greater than or equal to an allowable value, a voltage value having the opposite polarity of the error is applied to the corresponding pin of the device under test as a correction value. A second process that feeds back,
A computer-readable recording medium storing a program for causing a computer to execute the third process of setting the supply voltage by repeating the feedback operation until the error becomes equal to or less than an allowable value. When calibrating a semiconductor integrated circuit test apparatus that performs various tests by supplying a predetermined voltage or test signal to each pin of the device under test,
The actual voltage value supplied to the voltage of the preset value the provided for each pin in said semiconductor integrated circuit testing device connected to the respective pins of該被measuring device from the voltage supply unit for supplying at each pin A first process for measuring each of the pins during the inspection of the device under test using a voltage measurement unit common to the pins ;
An error between the measured value and the preset value is obtained for each pin, and for a pin whose error is greater than or equal to an allowable value, a voltage value having the opposite polarity of the error is applied to the corresponding pin of the device under test as a correction value. A second process that feeds back,
A third process of setting the supply voltage by repeating the feedback operation until the error is less than or equal to an allowable value;
The correction value finally determined for each pin of the device under test is stored as an electronic file, and the calibration measurement is not performed from the next test, and the device under test read from the electronic file is stored. A fourth process of supplying each pin as a set value by adding a correction value for each pin to the apparent set value supplied to each pin;
A computer-readable recording medium having recorded thereon a program for causing the computer to execute.

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