JP4618112B2 - Multiprocessor system - Google Patents

Description

  The present invention relates to a multiprocessor system including a plurality of processors.

  In order to perform high-speed data processing, a multiprocessor system is considered that includes a plurality of processors and each processor shares and executes various processes (see, for example, Patent Documents 1 to 3).

JP 2004-199149 A JP 2002-175288 A JP 2001-125875 A

  However, in the conventional multiprocessor system, when the first processing function operating on a certain processor requests the second processing function operating on another processor to execute the processing, The second processing function cannot execute another request until the requested processing is completed and a response is returned. For this reason, the first processing function cannot make the next request to the second processing function, and must wait until the processing executed by the second processing function is completed. Become. Note that the second processing function can accept a plurality of requests in advance. However, even in this case, the second processing function sequentially executes the processing for the received requests, so that the request generated later is processed before the request generated earlier. This is substantially the same as when the first processing function cannot make the next request to the second processing function.

  Therefore, even when it is desired to cancel the request for the second processing function, the cancellation request is transmitted to the second processing function as a request for processing from the first processing function to the second processing function. Therefore, it cannot be canceled immediately, and it is necessary to wait for completion of the processing requested for the second processing function. This is inconvenient in the case described below.

  For example, when executing print control using a multiprocessor system, consider a case where a selected image is laid out on a print medium and printing is executed after confirming the layout result.

  As a premise, the main processor of the multiprocessor system operates as an image processing function for controlling various image processing in order to display the selected image at a corresponding position on the print medium displayed on the screen. Shall. In addition, a sub processor of the multiprocessor system performs processing of reading out and developing image data representing a selected image from an image file that is compressed and saved, for example, image data in JPEG format. It is assumed that it operates as a decoding processing function that executes in response to an instruction from the image processing function.

  In this case, when the user selects an image, lays it out on the print medium, and instructs the display of the layout result, the image processing function of the main processor performs the decoding process for the decoding processing function of the sub processor Request. The decoding processing function of the sub processor starts execution of the requested decoding processing.

  Here, there is a case where the user wants to change the image during the execution of the decoding process. For example, there is a case where the selected image is wrong and it is desired to change to a correct image. Normally, when the size of the image to be displayed is large, the processing is executed in units of blocks called bands, and the images are displayed in order for each executed block, so that a part of the image is displayed. Sometimes you want to cancel. In such a case, it is preferable that processing for a request instructed to the decoding processing function of the sub processor can be stopped immediately.

  However, as described above, in the case of a conventional multiprocessor system, a cancellation request may be issued from the image processing function to the decoding processing function until the processing already requested for the decoding processing function is completed. Therefore, even if the next image can be selected by the image processing function of the main processor, the image data representing the next selected image is decoded by the decoding processing function of the sub processor. The process cannot be started. As a result, the waiting time for the cancellation process becomes longer, and the time until the next selected image is displayed becomes longer, so the user may feel stress.

  Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a multiprocessor system that enables high-speed cancellation processing.

In order to solve at least a part of the problems described above, an aspect of the present invention provides
A multiprocessor system comprising a plurality of processors,
Between a first processor and at least one second processor of the plurality of processors,
A first processing request signal is transmitted from the first processor to the second processor, and a first processing response signal is transmitted from the second processor to the first processor in response to the first processing request. A first communication path provided for, and
A dedicated first interrupt signal path provided for transmitting a first interrupt signal indicating suspension of processing executed by the second processor in accordance with the first processing request,
The first processor outputs the first interrupt signal to the second processor when the cancel signal indicating cancellation of processing executed by the second processor is input to the second processor. Send via the interrupt signal path of
When the second processor receives the first interrupt signal, the second processor stops the process being executed according to the first process request, and indicates the end of the process being executed. 1 processing response signal is transmitted via the first communication path;
It is characterized by that.

  According to the multiprocessor system configured as described above, the first processor receives the first signal dedicated to the second processor when a cancel signal indicating cancellation of the process executed by the second processor is input. The first interrupt signal can be transmitted via the interrupt signal path. When the second processor receives the first interrupt signal, the second processor stops the process being executed according to the first process request, and indicates the end of the process being executed. Can be transmitted via the first communication path. Thereby, a high-speed cancellation process can be realized.

  When the second processor receives the first interrupt signal in a state where a plurality of the first processing requests are generated from the first processor to the second processor. The first process response signal indicating the end of the process being executed is canceled by canceling the process being executed in accordance with the first process request. It is transmitted through the first communication path, discards the unexecuted process to be executed in accordance with the second and subsequent first process requests, and indicates that the process to be executed has ended unprocessed. It is preferable that the second and subsequent first processing response signals are transmitted via the first communication path.

  According to the above configuration, when the first interrupt signal is received in a state where a plurality of first processing requests are generated, the first processing response to each first processing request is sent to the first communication path. Thus, even when a plurality of first processing requests are generated, high-speed cancellation processing can be realized.

The multiprocessor system further includes:
Between the second processor and the at least one third processor of the plurality of processors,
A second processing request signal is transmitted from the second processor to the third processor, and a second processing response signal for the second processing request is transmitted from the third processor to the second processor. A second communication path provided for, and
A dedicated second interrupt signal path provided for transmitting a second interrupt signal indicating suspension of processing executed by the third processor in accordance with the second processing request,
When the first processor receives a cancel signal indicating cancellation of processing executed by the second processor and the third processor, the first processor sends the first interrupt signal to the second processor. Is transmitted through the first interrupt signal path, and the second interrupt signal is transmitted to the third processor through the second interrupt signal path.
When the third processor receives the second interrupt signal, the third processor stops the process being executed according to the second process request, and indicates the end of the process being executed. 2 processing response signals are transmitted via the second communication path,
When the second processor receives the first interrupt signal and receives the second processing response signal from the third processor, the second processor is executing in accordance with the first processing request. Aborting the process and transmitting the first process response signal indicating the end of the process being executed via the first communication path;
It is preferable.

  According to the multiprocessor system configured as described above, when a cancel signal indicating cancellation of processing executed by the second processor and the third processor is input to the first processor, the first processor The first interrupt signal can be transmitted via the dedicated first interrupt signal path, and the second interrupt signal can be transmitted to the third processor via the dedicated second interrupt signal path. When the third processor receives the second interrupt signal, the third processor stops the process being executed in accordance with the second process request, and the second process response signal indicates the end of the process being executed. Is transmitted via the second communication path, and the second processor receives the first interrupt signal and executes the second processing response signal from the third processor according to the first processing request. The currently executed process can be canceled and a first process response signal indicating the end of the currently executed process can be transmitted via the first communication path. Accordingly, the second processor executes a corresponding process in response to the first processing request from the first processor, and the third processor receives the second processing request from the second processor. Even when the corresponding process is executed, a high-speed cancel process can be realized.

  When the third processor receives the second interrupt signal in a state where a plurality of the second processing requests are generated from the second processor to the first processor. The first process response signal indicating the end of the process being executed is canceled by stopping the process being executed in accordance with the first second process request. It is transmitted through the second communication path, discards the unexecuted process to be executed in accordance with the second and subsequent second processing requests, and indicates that the process to be executed has ended unprocessed. It is preferable that the second and subsequent second response processing signals are transmitted via the second communication path.

  According to the above, when the second interrupt signal is received in a state where a plurality of second processing requests are generated, the second processing response to each second processing request is sent to the second communication path. Thus, even when a plurality of second processing requests are generated, it is possible to realize high-speed cancellation processing.

  Note that the multiprocessor system of the above aspect is more effective if it is integrated on one semiconductor substrate.

Hereinafter, embodiments of the present invention will be described in the following order based on examples.
A. Example:
A1. Multiprocessor system configuration:
A2. Multiprocessor system functions during print image processing:
A2.1. Print image processing control function:
A2.2. Image processing proxy control function:
A2.3. Decode function:
A2.4. Image correction function:
A2.5. Print image image data generation function:
A3. Print image processing:
A3.1. Normal operation:
A3.2. Cancel end action:
A4. effect:
B. Variations:

A. Example:
A1. Multiprocessor system configuration:
FIG. 1 is an explanatory diagram showing a part of a multiprocessor system 10 of the present invention. The multiprocessor system 10 is a microprocessor in which a plurality of processors are integrated on one semiconductor substrate. Each processor means a unit including peripheral circuits such as a CPU, a memory, and a bus controller. FIG. 1 shows only one main processor 100 and three sub-processors 200A to 200C and a memory controller 300 among a plurality of processors constituting the multiprocessor system, and other configurations are omitted. .

  The main processor 100 is connected to an input device 30 such as an operation panel, a display device 40 such as a liquid crystal panel, and a storage device 50 such as a portable storage device that can be read via a reader.

  The main processor 100 is connected to each of the sub-processors 200A to 200C via first communication paths NES1 to NES3 provided individually, and the main processor 100 and each of the sub-processors 200A to 200C are connected to each other. , A message for processing requests and responses to the requests can be individually communicated via the first communication paths NES1 to NES3. Each of the communication paths NES1 to NES3 is composed of a set of paths including a path from the main processor to the sub processor and a path from the sub processor to the main processor. Hereinafter, the first communication paths NESS1 to NES3 may be collectively referred to as the first communication path NES.

  The sub processors 200A to 200C are connected to each other through a second communication path NIO provided in a loop by connecting the sub processors 200A to 200C in order. A request for processing and a response to the request can be communicated with each other via the communication path NIO.

  The memory controller 300 is connected to the main processor 100 and each of the sub processors 200A to 200C via third communication paths NEM0 to NEM3 provided individually, and the main processor 100 and each of the sub processors 200A to 200A. The 200C can access the RAM 20 connected to the outside via the memory controller 300. Similarly to the first communication paths NES1 to NES3, the third communication paths NEM0 to NEM3 are configured by a set of paths from the processor to the memory controller and from the memory controller to the processor. . Hereinafter, the third communication paths NEM0 to NEM3 may be collectively referred to as a third communication path NEM.

  Here, as a feature of the multiprocessor system 10 of this embodiment, the main processor 100 is connected to the sub-processors 200A to 200C via the interrupt signal paths INT1 to INT3 provided individually, As will be described later, an interrupt signal can be individually transmitted from the main processor 100 to each of the sub-processors 200A to 200C via the interrupt signal paths INT1 to INT3.

  Note that the interrupt signal path INT1 connected to the first sub-processor 200A corresponds to the first interrupt signal path of the present invention, and the interrupt signal path INT2, connected to the second and third sub-processors 200B and 200C. INT3 corresponds to the second interrupt signal path of the present invention. Hereinafter, the interrupt signal paths INT1 to INT3 may be collectively referred to as an interrupt signal path INT.

  As described above, the feature of this embodiment is that an interrupt signal is individually sent from the main processor 100 to each of the sub processors 200A to 200C via the interrupt signal paths INT1 to INT3, as will be described below. It is in the point which can be transmitted.

  In the following, the print control for selecting an image file of an image to be printed from the image files stored in the storage device 50 and printing the image at a desired position on the print medium with the desired size will be described. In the process of executing using the processor system 10, a print image image showing a state in which the selected image is arranged at a desired position on the print medium with a desired size is displayed on the display device 40. The above features will be described by taking as an example a case where a print image processing operation for generating data is executed by the multiprocessor system 10.

A2. Multiprocessor system functions during print image processing:
First, each function realized by the main processor 100 and the sub processors 200A to 200C when the print image processing operation is executed in the multiprocessor system 10 will be described.

  When the print image processing operation is executed by the multiprocessor system 10, the main processor 100 reads and executes a predetermined program stored in a memory (not shown) that is a component of the processor, so that FIG. As shown in FIG. 4, a print image processing control function for controlling the print image processing operation as a whole is realized. Specifically, the user interface (also referred to as “UI”) 10 that mainly operates as a print image processing control unit that controls the entire print image processing operation, and image processing and layout processing that constitute the print image processing. An image processing unit (also referred to as “DFT”) 120 for sharing image processing, a layout processing unit (also referred to as “OMT”) 130 for sharing layout processing, and a display control unit (“DPC”) for controlling the operation of the display device 40. 140, an interrupt generation unit (also referred to as an “INT generation unit”) 150 that generates an interrupt signal to be transmitted via the interrupt signal path INT, and NES communication that controls communication performed through the first communication path NES Unit 160 and each functional block of the NEM communication unit 170 that controls communication executed through the third communication path NEM. To operate as.

  As shown in FIG. 1, the first sub-processor 200A reads and executes a predetermined program stored in a memory (not shown) that is a component of the processor. In place of 120, print image image data that realizes an image processing proxy control function that controls the operation of the image processing execution function executed by the second and third sub-processors 200B and 200C and generates print image image data Realize the generation function. Specifically, an interrupt processing unit (also referred to as an “INT processing unit”) 210A that receives an interrupt signal via the interrupt signal path INT1, a NES communication unit 220A, and a communication that is executed via the second communication path NIO. NIO communication unit 230A for controlling the image processing, NEM communication unit 240A, an image processing control unit (also referred to as “IMGC”) 250A corresponding to the image processing proxy control function, a decoding control unit (also referred to as “IDECC”) 260A, and The image correction control unit (also referred to as “APFC”) 270A and the layout execution unit 280A corresponding to the print image generation function operate as functional blocks to realize an image processing proxy control function and a print image image data generation function.

  As shown in FIG. 1, the second sub-processor 200B reads and executes a predetermined program stored in a memory (not shown) that is a component of the processor, thereby generating an image file of the selected image. When the included image data is, for example, image data in JPEG format, a decoding function for developing the image data and converting it into image data based on the RGB color space (also referred to as “RGB image data”) is provided. Realize. Specifically, each function of the interrupt processing unit 210B, the NES communication unit 220B, the NIO communication unit 230B, the NEM communication unit 240B, and the decode execution unit (also referred to as “IDEC”) 280B that actually executes the decoding process. Operates as a block.

  As shown in FIG. 1, the third sub-processor 200C reads and executes a predetermined program stored in a memory (not shown) that is a component of the processor. An image correction function that automatically corrects image quality such as color correction processing, sharpness processing, and noise removal processing of the image to be expressed is realized. Specifically, the interrupt processing unit 210C, the NES communication unit 220C, the NIO communication unit 230C, the NEM communication unit 240C, and the image correction execution unit (also referred to as “APF”) 280C that actually executes the image correction process. Operates as each functional block.

  Hereinafter, the operation of each functional block will be described in more detail.

A2.1. Print image processing control function:
(1) User interface (UI)
FIG. 2 is an explanatory diagram showing print image processing control executed by the user interface 110. When the print image processing control is started, first, occurrence of some event is monitored (step S102). As an event, for example, the print image processing is executed in the order of image processing by the image processing unit 120 and layout processing by the layout processing unit 130. There is a response from the processing unit 120 and the layout processing unit 130 or a cancel instruction input by the user using the input device 30.

  If any event occurs (step S102: YES), it is determined whether or not the event is a cancel instruction (step S104).

  If the generated event is not a cancel instruction (step S104: NO), processing corresponding to the generated event is executed (step S106). For example, in the case of an event instructing execution of image processing executed by the image processing unit 120, execution of image processing is instructed to the image processing unit 120 and execution of layout processing executed by the layout processing unit 130 is executed. Is instructed to execute layout processing, the layout processing unit 130 is instructed to execute layout processing.

  Then, the process from step S102 to step S106 is repeatedly executed until the end of the print image process control being executed is instructed (step S108: NO).

  If it is determined in step S104 that the event that has occurred is a cancel instruction (step S104: YES), a request to cancel the process instructing execution is made (step S150). For example, if the image processing unit 120 is instructed to execute image processing, the image processing unit 120 is requested to cancel the processing instructed to execute. At this time, the image processing unit 120 transmits an interrupt signal from the interrupt generation unit 150 to each of the sub processors 200A to 200C via the interrupt signal paths INT1 to INT3, as will be described later.

  Then, a response (response) to the process instructed to be executed is monitored from the first sub-processor 200A via the first communication path NES1 (step S112).

  If there is a response to the process that has been instructed to execute (step S112: YES), a request to close (end) the process that has been instructed to execute (step S114). For example, if execution of image processing by the image processing unit 120 has been instructed, the image processing unit 120 is instructed to close the processing.

  Then, in response to the close request of the process that has been instructed to execute, a response (response) of completion of the close process is monitored (step S116).

  If there is a response to end the close process (step S116: YES), the image processing control operation that has been executed is ended.

(2) Image processing unit (DFT)
FIG. 3 is an explanatory diagram showing image processing executed by the image processing unit 120. When image processing is started in response to an instruction from the user interface 110, first, occurrence of some event is monitored (step S122). As an event, for example, in the actual image processing, the image processing control unit 250A of the first sub-processor 200A replaces the image processing unit 120 of the main processor 100, and the decoding function of the second sub-processor 200B and the second processing. 3 is executed by controlling the image correction function of the sub-processor 200C, the image processing execution instruction (request) from the user interface 110, the close processing execution instruction, and the execution instruction are sent to the first communication path NES1. Is transmitted to the image processing control unit 250A via the first communication path NES1, and then a response transmitted from the image processing control unit 250A or a cancel instruction from the user interface 110 is provided.

  If any event occurs (step S122: YES), it is determined whether or not the event is a cancel instruction (step S124).

  When the generated event is not a cancel instruction (step S124: NO), processing corresponding to the generated event is executed (step S126). For example, in the case of an event instructing execution of image processing from the user interface 110, execution of image processing is performed on the image processing control unit 250A of the first sub-processor 200A via the first communication path NES1. Instruct.

  When the generated event is a cancel instruction (step S124: YES), an interrupt signal is sent to each of the sub processors 200A to 200C via the interrupt signal paths INT1 to INT3 to the interrupt generation unit 150. It is instructed to transmit (step S128). At this time, the interrupt generation unit 150 transmits an interrupt signal to each of the sub processors 200A to 200C via the interrupt signal paths INT1 to INT3.

  Then, the image processing unit 120 repeats the processing from step S122 to step S128 until the processing started in response to the instruction from the user interface 110 is completed (step S130: NO).

(3) Layout processing unit (OMT)
FIG. 4 is an explanatory diagram showing layout processing executed by the layout processing unit 130. When layout processing is started in response to an instruction from the user interface 110, first, occurrence of some event is monitored (step S142). As an event, for example, the actual layout processing is executed by the layout execution unit 280A of the first sub-processor 200A in place of the layout processing unit 130 of the main processor 100, so the execution of the layout processing from the user interface 110 is executed. An instruction, an execution instruction for a close process, and a response transmitted from the layout execution unit 280A via the first communication path NES1 after the execution instruction is transmitted to the layout execution unit 280A via the first communication path NES1; Alternatively, there is a cancel instruction from the user interface 110.

  If any event occurs (step S142: YES), it is determined whether or not the event is a cancel instruction (step S144).

  When the generated event is not a cancel instruction (step S144: NO), processing corresponding to the generated event is executed (step S146). For example, in the case of an event instructing execution of layout processing from the user interface 110, execution of layout processing is performed on the layout execution unit 280A of the first sub-processor 200A via the first communication path NES1. Instruct.

  When the generated event is a cancel instruction (step S144: YES), an interrupt signal is sent to each of the sub processors 200A to 200C via the interrupt signal paths INT1 to INT3 to the interrupt generation unit 150. An instruction to transmit is given (step S148). At this time, the interrupt generation unit 150 transmits an interrupt signal to each of the sub processors 200A to 200C via the interrupt signal paths INT1 to INT3.

  The layout processing unit 130 repeats the processing from step S142 to step S148 until the processing started in response to the instruction from the user interface 110 is completed (step S150: NO).

A2.2. Image processing proxy control function:
(1) Interrupt Processing Unit FIG. 5 is an explanatory diagram showing interrupt processing executed by the interrupt processing unit 210A. The interrupt processor 210A monitors reception of an interrupt signal transmitted from the interrupt generator 150 of the main processor 100 via the interrupt signal path INT1 (step S202). When the interrupt signal is received (step S202: YES), the cancel flag is set on (step S204). Then, the process returns to step S202, and the monitoring of reception of the interrupt signal is repeated.

(2) Image processing control unit (IMGC)
FIG. 6 is an explanatory diagram showing image processing control executed by the image processing control unit 250A. When image processing control is started in response to an instruction from the image processing unit 120 of the main processor 100, first, occurrence of some event is monitored (step S212). Note that as the event, for example, the image processing control is executed in the order of decoding control by the decoding control unit 260A and image correction control by the image correction control unit 270A. Execution instruction, a response transmitted from the decoding control unit 260A and the image correction control unit 270A, an instruction transmitted from the image processing unit 120 via the first communication path NES1, and the like.

  If any event occurs (step S212: YES), it is determined whether or not the cancel flag is on (step S214).

  First, when the cancel flag is off (step S214: NO), processing corresponding to the generated event is executed. For example, in the case of an instruction from the image processing unit 120 or an instruction to the decode control unit 260A or the image correction control unit 270A, execution of the corresponding process is instructed, and from the decode control unit 260A or the image correction control unit 270A In the case of the response, the image processing unit 120 is responded.

  Then, the image processing control unit 250A determines whether or not to end the process started in response to the instruction from the image processing unit 120 (step S218). If not (step S218: NO), the process proceeds to step S212. Go back and monitor the occurrence of the event again.

  On the other hand, if the cancel flag is on in step S214 (step S214: YES), it is determined whether the generated event is an instruction to close the image processing instructed from the image processing unit (DFT) 120. (Step S224).

  If the event that has occurred is an instruction to execute the close process for ending the image processing (step S224: YES), the decode control unit (IDECC) 260A or the image correction control unit (APFC) 270A instructing the execution Is instructed to execute the close process (step S226), the process returns to step S212, and the occurrence of the event is monitored again.

  On the other hand, if the event that has occurred is not an instruction to execute the close process (step S224: NO), execution of the close process from the decode control unit 260A or the image correction control unit 270A in which the event that has occurred instructs the execution of the process. It is determined whether or not the response is for (step S232).

  When the generated event is a response to the execution of the close process (step S232: YES), it is determined whether or not there is a response from all the functional blocks instructing the execution (step S234).

  If there is a response from all the functional blocks (step S234: YES), the cancel flag is turned off (step S236), and the image processing unit 120 is instructed via the first communication path NES1. A response indicating the end of the current image processing is returned (step S238). Then, the process returns to step S212 to monitor the occurrence of the event. On the other hand, if there is no response (step S234: NO), the process returns to step S212 and the occurrence of the event is monitored.

  In step S232, if the event that has occurred is not a response to the execution of the close process (step S232: NO), it is determined whether or not it is an execution instruction from the image processing unit (DFT) 120 (step S240).

  If the generated event is an execution instruction from the image processing unit 120 (step S240: YES), the instruction is discarded and unprocessed (step S242), and the image processing unit 120 is also processed. Then, a response indicating that the processing has been completed without processing is returned via the first communication path NES1 (step S244). Then, returning to step S212, the occurrence of the event is monitored again.

  On the other hand, when the generated event is not an execution instruction from the image processing unit 120 (step S240: NO), the generated event is further transmitted from the decode control unit (IDECC) 260A or the image correction control unit (APFC) 270A. It is determined whether or not the response is (step S246).

  When the generated event is a response from the decode control unit 260A or the image correction control unit 270A (step S246: YES), the response is sent to the image processing unit 120 via the first communication path NES1. A response indicating that there is a response is returned (step S248), the process returns to step S212, and the occurrence of the event is monitored again.

  On the other hand, when the generated event is not a response from the decode control unit 260A or the image correction control unit 270A (step S246: NO), the process returns to step S212 and the occurrence of the event is monitored again.

(3) Decode control unit (IDECC)
The decode control unit 260A transmits the instruction from the image processing control unit 250A to the decode execution unit 280B of the second sub processor 200B via the second communication path NIO, and the response transmitted from the decode execution unit 280B. Then, the image data is transferred to the image processing control unit 250A.

(4) Image correction controller (APFC)
Similarly to the decode control unit 260A, the image correction control unit 270A also transmits an instruction from the image processing control unit 250A to the image correction execution unit 280C of the third sub-processor 200C via the second communication path NIO. The response transmitted from the image correction execution unit 280C is transferred to the image processing control unit 250A.

A2.3. Decode function:
(1) Interrupt processing unit The interrupt processing unit 210B monitors the reception of an interrupt signal transmitted from the interrupt generation unit 150 of the main processor 100 via the interrupt signal path INT2 in the same manner as the interrupt processing unit 210A. When received, the cancel flag is set to on.

(2) Decode execution unit (IDEC):
FIG. 7 is an explanatory diagram showing the decoding process executed by the decoding execution unit 280B. When the decoding process is started, first, occurrence of some event is monitored (step S252). The event includes an execution instruction transmitted from the decode control unit 260A via the second communication path NIO, an execution instruction for a close process, and the like.

  If any event occurs (step S252: YES), it is determined whether or not the cancel flag is on (step S254).

  First, when the cancel flag is off (step S254: NO), the decoding process is actually executed (step S256).

  FIG. 8 is an explanatory diagram showing the decoding execution process. When the decode execution process is started, the decode process is executed for each unit process (step S256a). Then, it is determined whether or not the cancel flag is turned on (step S256b).

  If the cancel flag is not on (step S256b: NO), the decoding process of step S256a is repeated until all decoding processes are completed (step S256c: NO). If all the decoding processes have been completed (step S256c: YES), the decoding execution process is terminated and the process proceeds to step S258 in FIG.

  On the other hand, if the cancel flag is on in step S256b (step S256b: YES), the decoding execution process is stopped and the process proceeds to step S258 in FIG.

  In step S258, a response indicating the end of the instructed image decoding process is returned to the decoding control unit 260A via the second communication path NIO.

  If it is determined in step S254 that the cancel flag is on (step S254: YES), it is further determined whether or not the event that has occurred is an instruction to execute a close process from the decode control unit 260A ( Step S262).

  If the event that has occurred is not an execution instruction for the close process (step S260: NO), it is determined that the event is an unprocessed execution instruction that has not yet been executed, and the execution instruction is ended unprocessed (step S264). As a response to the execution instruction, a response indicating an unprocessed end is returned to the decode control unit 260A via the second communication path NIO (step S266).

  If the generated event is an instruction to execute the close process (step S262: YES), the close process is executed (step S272), and the cancel flag is turned off (step S274). Then, a response indicating the end of the closing process is returned to the decode control unit 260A via the second communication path NIO (step S268).

  Next, the decoding execution unit 280B determines whether or not to end the process started in response to the instruction from the decoding control unit 260A (step S280). If not (step S280: NO), the process proceeds to step S212. Go back and monitor the occurrence of the event again.

A2.4. Image correction function:
(1) Interrupt processing unit The interrupt processing unit 210C also monitors the reception of an interrupt signal transmitted from the interrupt generation unit 150 of the main processor 100 via the interrupt signal path INT3 in the same manner as the interrupt processing unit 210A. When received, the cancel flag is set to on.

(2) Image Correction Execution Unit The image correction process executed by the image correction execution unit 280C is the actual decoding process (step S256 in FIG. 7) of the decoding processes in the decode execution unit 280B. An execution instruction is transmitted from the image correction control unit 270A via the second communication path NIO in that the actual image correction execution process is executed, and the image correction control unit 270A receives the second instruction. The processing procedure is the same as that of the decoding execution unit 280B except that a response is transmitted via the communication path NIO.

A2.5. Print image image data generation function:
The print image image data generation function is realized by the layout execution unit 280A of the first sub-processor 200A. The layout process executed by the layout execution unit 280A is the actual decoding of the decoding processes in the decode execution unit 280B. The process (step S256 in FIG. 7) is replaced with the actual layout process to be executed, and the layout processing unit 130 transmits an execution instruction via the first communication path NES1, and the layout processing unit. 130 is the same as the processing procedure of the decoding execution unit 280B except that a response is transmitted to the terminal 130 via the first communication path NES1.

A3. Print image processing:
Next, print image processing operations executed by the functions realized by the main processor 100 and the sub processors 200A to 200C of the multiprocessor system 10 will be described in the order of normal operation and cancel operation.

  In the following description of the operation, for ease of explanation, as shown in FIG. 9, a print image in which images A and B are arranged on the print medium PB is displayed on the display device 40. Assuming

  The image processing of the image A and the image B is performed in units of bands obtained by dividing each image into two. Specifically, as shown in FIG. 9, the image A is divided into two band images A-1 and A-2, and the image B is divided into two band images B-1 and B-2.

A3.1. Normal operation:
10 and 11 are explanatory diagrams showing a normal print image processing operation.

  First, the user interface (UI) 110 of the main processor 100 instructs the image processing unit (DFT) 120 to execute image processing of the image A, and then instructs execution of image processing of the image B.

  Upon receiving an instruction from the user interface 110, the image processing unit 120 first performs image processing of the first band image A-1 of the image A on the image processing control unit (IMGC) 250A of the first sub-processor 200A. Next, the execution of the image processing of the first band image B-1 of the image B is instructed.

  Receiving the instruction from the image processing unit 120, the image processing control unit 250A instructs the decoding control unit (IDECC) 260A to execute the decoding process of the first band image A-1 of the image A, and then continues. Instruct to execute the decoding process of the first band image B-1 of the image B.

  Upon receiving the instruction from the image processing control unit 250A, the decoding control unit 260A instructs the decoding execution unit (IDEC) 280B of the second sub processor 200B to execute the decoding process of the band image A-1, and continues. The execution of the decoding process of the band image B-1 is instructed.

  Receiving the instruction from the decoding control unit 260A, the decoding execution unit 280B executes the decoding process in the order in which the instructions are received. Here, since instructions for decoding processing are received in the order of band image A-1 and band image B-1, first, decoding processing of band image A-1 is started, and after finishing this processing, band image B- 1 decoding process is started.

  When the decoding process of the band image A-1 executed first is completed, the decoding execution unit 280B responds the end of the process to the decoding control unit 260A, and decodes the band image B-1 that has been waiting. Start processing.

  At this time, the decoding control unit 260A that has received the decoding end response of the band image A-1 similarly responds the end of the decoding process of the band image A-1 to the image processing control unit 250A.

  The image processing control unit 250A that has received the response to end the decoding process for the band image A-1 instructs the image correction control unit (APFC) 270A to execute the image correction process for the band image A-1.

  In response to the instruction from the image processing control unit 250A, the image correction control unit 270A instructs the image correction execution unit (APF) 280C of the third sub-processor 200C to execute the image correction process for the band image A-1. To do.

  In response to the instruction from the image correction control unit 270A, the image correction execution unit 280C starts the image correction process for the band image A-1 that has received the instruction.

  Further, when the decoding execution unit 280B executing the decoding process of the band image B-1 ends the processing, the decoding execution unit 280B responds to the decoding control unit 260A of the end of the decoding process of the band image B-1.

  At this time, the decode control unit 260A that has received the decode end response of the band image B-1 similarly responds to the end of the decode process of the band image B-1 to the image processing control unit 250A.

  Receiving the decoding end response of the band image B-1, the image processing control unit 250A instructs the image correction control unit 270A to execute the image correction process of the band image B-1.

  In response to the instruction from the image processing control unit 250A, the image correction control unit 270A instructs the image correction execution unit 280C to execute the image correction process for the band image B-1.

  At this time, the image correction execution unit 280C that has received an instruction from the image correction control unit 270A is still executing the image correction process for the band image A-1, and thus the image correction process for the band image B-1 Is not started and is in a waiting state.

  Then, when the image correction execution unit 280C completes the image correction process of the first performed band image A-1, the image correction control unit 270A responds the end of the process to the image correction control unit 270A and waits for the band image that has been in a waiting state. The image correction process of B-1 is started.

  The image correction control unit 270A that has received the response to end the image correction process for the band image A-1 responds to the image processing control unit 250A that the image correction process for the band image A-1 has ended.

  The image processing control unit 250A that has received the response to end the image correction processing of the band image A-1 responds to the image processing unit 120 that the image processing of the band image A-1 that has received the execution instruction has ended.

  Upon receiving the processing end response of the band image A-1, the image processing unit 120 performs image processing on the first band image A-1 among the images A that have received an instruction to execute image processing on the user interface 110. Responds to the end of.

  Upon receiving the processing end response of the band image A-1, the user interface 110 instructs the layout processing unit (OMT) 130 to execute the layout of the band image A-1 that has completed the image processing.

  Upon receiving the layout execution instruction, the layout processing unit 130 instructs the layout execution unit 280A of the first sub-processor 200A to execute the layout of the band image A-1.

  At this time, the layout execution unit 280A that has received the instruction starts layout processing of the band image A-1.

  On the other hand, when the image correction execution unit 280C that has executed the image correction process for the band image B-1 ends the process, the end of the process is returned to the image correction control unit 270A.

  The image correction control unit 270A that has received the image correction processing end response of the band image B-1 responds to the image processing control unit 250A of the end of the image correction processing of the band image B-1.

  The image processing control unit 250A that has received the response to end the image correction processing of the band image B-1 responds to the image processing unit 120 that the image processing of the band image B-1 that has received the execution instruction has ended.

  Upon receiving the processing end response of the band image B-1, the image processing unit 120 performs image processing of the first band image B-1 among the images B that have received an instruction to perform image processing on the user interface 110. Responds to the end of.

  When the user interface 110 receives a response to end the image processing of the first band image A-1 and the band image B-1, the user interface 110 further executes the image processing of the image A to the image processing unit 120. And instruct to continue image processing of image B.

  Upon receiving the instruction from the user interface 110, the image processing unit 120 instructs the image processing control unit 250A to execute the image processing of the second band image A-2 of the image A, and the second of the image B. Instructs execution of image processing of the band image B-2.

  In response to the instruction from the image processing unit 120, the image processing control unit 250A instructs the decoding control unit 260A to execute the image processing of the second band image A-2 of the image A, and the second of the image B. Is instructed to execute image processing of the band image B-2.

  Upon receiving the instruction from the image processing control unit 250A, the decoding control unit 260A instructs the decoding execution unit 280B to execute the decoding process of the band image A-2, and executes the decoding process of the band image B-2. Instruct.

  Receiving the instruction from the decoding control unit 260A, the decoding execution unit 280B first starts the decoding process of the band image A-2, and after completing this process, starts the decoding process of the band image B-2.

  When the layout execution unit 280B finishes the layout process of the band image A-1 performed by the layout execution unit 280A while the decoding process is being performed, the layout execution unit 280A The end of the layout of the band image A-1 is returned.

  Upon receiving the layout end response of the band image A-1, the layout processing unit 130 responds to the user interface 110 with the end of the layout processing of the band image A-1 that has received the layout processing execution instruction.

  The user interface 110 that has received the response to end the layout processing of the band image A-1 instructs the layout processing unit 130 to execute the layout of the band image B-1 that has completed the image processing.

  Receiving the layout execution instruction, the layout processing unit 130 instructs the layout execution unit 280A to execute the layout of the band image B-1.

  At this time, the layout execution unit 280A that has received the instruction starts layout processing of the band image B-1.

  Then, when the layout processing of the band image B-1 that has been executed is completed, the layout execution unit 280A responds to the layout processing unit 130 that the layout of the band image B-1 has been completed.

  Upon receiving the layout end response of the band image B-1, the layout processing unit 130 responds to the user interface 110 with the end of processing of the band image B-1 that has received the layout processing execution instruction.

  When the decoding processing of the second band image A-2 of the image A that has been executed by the decoding execution unit 280B is completed while the layout execution unit 280A is executing the layout processing, the decoding execution unit 280B The end of the process is responded to the unit 260A, and the decoding process of the second band image B-2 of the image B that has been in a waiting state is started.

  At this time, the decoding control unit 260A that has received the decoding end response of the band image A-2 responds to the image processing control unit 250A of the end of the decoding process of the band image A-2.

  The image processing control unit 250A that has received the decoding end response of the band image A-2 instructs the image correction control unit 270A to execute the image correction process of the band image A-2.

  Receiving the instruction from the image processing control unit 250A, the image correction control unit 270A instructs the image correction execution unit 280C to execute the image correction process for the band image A-2.

  In response to the instruction from the image correction control unit 270A, the image correction execution unit 280C starts the image correction process for the band image A-2 that has received the instruction.

  When the image correction execution unit 280C completes the performed image correction process for the band image A-2, the image correction control unit 270A responds to the image correction control unit 270A that the band image B-2 has been in a waiting state. The image correction process is started.

  The image correction control unit 270A that has received the response to end the image correction process for the band image A-2 responds to the image processing control unit 250A that the image correction process for the band image A-2 has ended.

  The image processing control unit 250A that has received the response to end the image correction process for the band image A-2 responds to the image processing unit 120 with the end of the image processing for the band image A-2 that has received the execution instruction.

  Upon receiving the processing end response of the band image A-2, the image processing unit 120 performs image processing on the second band image A-2 of the images A that have received an instruction to perform image processing on the user interface 110. Responds to the end of.

  Upon receiving the processing end response of the band image A-2, the user interface 110 instructs the layout processing unit 130 to execute the layout of the band image A-2 that has finished the image processing.

  Receiving the layout execution instruction, the layout processing unit 130 instructs the layout execution unit 280A to execute the layout of the band image A-2.

  At this time, the layout execution unit 280A that has received the instruction starts the layout process of the band image A-2.

  When the layout processing of the band image A-2 is completed, the layout execution unit 280A responds to the layout processing unit 130 that the layout of the band image A-2 is completed.

  Upon receiving the layout end response of the band image A-2, the layout processing unit 130 responds to the user interface 110 with the end of processing of the band image A-2 that has received the layout processing execution instruction.

  On the other hand, when the decoding execution unit 280B executing the decoding process of the band image B-2 ends the process during this period, the end of the process is returned to the decoding control unit 260A.

  At this time, the decoding control unit 260A that has received the decoding end response of the band image B-2 returns the response to the image processing control unit 250A.

  The image processing control unit 250A that has received the decoding end response for the band image B-2 instructs the image correction control unit 270A to execute the image correction process for the band image B-2.

  In response to the instruction from the image processing control unit 250A, the image correction control unit 270A instructs the image correction execution unit 280C to execute the image correction process for the band image B-2.

  Receiving the execution instruction, the image correction execution unit 280C starts image correction processing of the band image B-2. When the image correction execution unit 280C completes the image correction process for the band image B-2 that has been executed, the image correction execution unit 280C responds to the image correction control unit 270A that the process has been completed.

  The image correction control unit 270A that has received the image correction processing end response of the band image B-2 responds to the image processing control unit 250A of the end of the image correction processing of the band image B-2.

  The image processing control unit 250A that has received the response to end the image correction process for the band image B-2 responds to the image processing unit 120 with the end of the image processing for the band image B-2 that has received the execution instruction.

  Upon receiving the image processing end response of the band image B-2, the image processing unit 120 receives the image processing execution instruction to the user interface 110 and is the second band image B-2 image. Returns the end of processing.

  Upon receiving the image processing end response of the band image B-2, the user interface 110 instructs the layout processing unit 130 to execute the layout of the band image B-2 that has completed the image processing.

  Receiving the layout execution instruction, the layout processing unit 130 instructs the layout execution unit 280A to execute the layout of the band image B-2.

  At this time, the layout execution unit 280A that has received the instruction starts layout processing of the band image B-2.

  When the layout processing of the band image B-2 that has been executed is completed, the layout execution unit 280A responds to the layout processing unit 130 that the layout of the band image B-2 has been completed.

  Upon receiving the layout end response of the band image B-2, the layout processing unit 130 responds to the user interface 110 with the end of processing of the band image B-2 that has received the layout processing execution instruction.

  As described above, the print image processing for generating the print image image data indicating the state in which the image A and the image B are arranged on the print medium PB is executed. In the above description, the order of instructions and responses to processing executed in different functional blocks is an example shown for convenience of description, and is not limited to this. Depending on the processing capability of the above, it will change appropriately.

A3.2. Cancel end action:
12 and 13 are explanatory diagrams showing the cancel end operation. In the normal operation shown in FIG. 11, the user interface 110 instructs the image processing unit 120 to execute image processing subsequent to the images A and B as an example of the cancel end operation. A case where an instruction to cancel processing is given from the input device 30 is shown.

  When cancellation is instructed by the user, the user interface (UI) 110 instructs the image processing unit (DFT) 120 and the layout processing unit (OMT) 130 to cancel the processing executed in each.

  The image processing unit 120 and the layout processing unit 130 that have received the cancel instruction instruct each of the corresponding functional blocks to cancel, when instructing the execution of the corresponding processing. Specifically, as described above, the cancellation instruction is transmitted by transmitting an interrupt signal indicating cancellation to the sub-processors including the corresponding functional blocks. Here, as shown in FIG. 11, the layout processing of the first band image A-1 of the image A and the decoding processing of the second band image A-2 are performed, and the second band image of the image B is performed. The decoding process of B-2 is in a waiting state. In this case, the interrupt processing unit 210A of the first sub-processor 200A, the interrupt processing unit 210B of the second sub-processor 200B, and the interrupt processing of the third sub-processor 200C via the interrupt signal paths INT1 to INT3. When the interrupt signal is transmitted to the unit 210C, each cancel flag is turned on, and the image processing control unit (IMGC) 250A, the decode control unit (IDECC) 260A, and the image correction control of the first sub processor 200A. Section (APFC) 270A, layout execution section (LAYOUT) 280A, decode execution section (IDEC) 280B of the second sub processor 200B, and image correction execution section (APF) 280C of the third sub processor 200C, Each has a cancellation instruction Erareru.

  Then, the user interface 110 instructs the image processing unit 120 to execute the close processing of the image processing that has been instructed to be executed. Upon receiving the instruction, the image processing unit 120 instructs the image processing control unit 250A to execute a closing process of the image processing.

  Here, when the cancel flag is turned on, the decoding execution unit 280B stops the decoding process of the second band image A-2 of the image A that has been executed, and sends the band image A− to the decoding control unit 260A. Response of the end of the decoding process 2 is returned. In addition, the decoding execution unit 280B discards the decoding processing of the second band image B-2 of the image B that has been in the waiting state, ends the processing without being processed, and instructs the decoding control unit 260A to perform the band image B- It responds that the decoding process of 2 has been completed without processing.

  Then, the decoding control unit 260A that has received the decoding processing end response for the band image A-2 and the band image B-2 returns the response to the image processing control unit 250A as it is.

  The image processing control unit 250A that has received the response to end the decoding processing of the band image A-2 and the band image B-2 instructs the image processing unit 120 to end the image processing of the band image A-2 and the band image B-2. In addition to responding, the decode control unit 260A is instructed to execute a close process for ending the process being executed.

  The image processing unit 120 that has received the image processing end response of the band image A-2 and the band image B-2 responds to the user interface with the end of the image processing of the image A and the image B instructed to be executed.

  The decode control unit 260A that has received the close process execution instruction from the image processing control unit 250A similarly instructs the decode execution unit 280B to execute the close process for ending the process being executed. Receiving the close process execution instruction, the decode execution unit 280B turns off the cancel flag and responds to the decode control unit 260A with the end of the close process. Receiving the close response of the close process, the decode control unit 260A responds the end of the close process to the image processing control unit 250A.

  The image processing control unit 250A that has received the close response of the close process from the decode control unit 260A turns off the cancel flag and responds to the image processing unit 120 that the close process of the image process has ended. The image processing unit 120 that has received the end response of the image processing close process responds to the user interface 110 with the end of the image processing close process.

  In addition, the user interface 110 instructs the layout processing unit 130 to execute a close process for ending the layout process that has been instructed to be executed. Receiving the instruction, the layout processing unit 130 instructs the layout execution unit 280A to execute the layout processing close process.

  Here, since the cancel flag is on, the layout execution unit 280A stops the layout processing of the first band image A-1 of the image A that has been executed, and the layout processing unit 130 is informed of the band image. In response to the end of the layout process of A-1, the cancel flag is turned off, and the end of the close process is responded to the layout processing unit 130.

  The layout processing unit 130 that has received the end response of the layout process of the band image A-1 responds to the user interface 110 with the end of the layout process of the band image A-1 instructed to be executed. The layout processing unit 130 that has received the response to end the layout processing close process responds to the user interface 110 with the end of the layout processing close process.

  As described above, the cancel operation is executed during execution of the print image processing. In the above description, the order of instructions and responses to processing executed in different functional blocks is an example shown for convenience of description, and is not limited to this. Depending on the processing capability of the above, it will change appropriately.

A4. effect:
As described above, in the multiprocessor of the above embodiment, an interrupt signal path is provided between the main processor and the sub processor, and when an instruction to cancel the processing being performed is given, the interrupt is performed. An interrupt signal can be transmitted through the signal path. The sub-processor that has received the interrupt signal can stop the processing being executed in response to the instruction and return a response to the instruction. In addition, it is possible to discard the instruction in the waiting state, end the process with the process, and return a response to the instruction.

  Therefore, the multiprocessor of the above embodiment can realize high-speed cancellation processing.

B. Variations:
As mentioned above, although embodiment of this invention was described, this invention is not limited to such embodiment at all, In the range which does not deviate from the summary, it is possible to implement in various aspects. . For example, the following modifications are possible.

B1. Modification 1:
In the above-described embodiment, only one main processor 100 and three sub-processors 200A to 200C are shown as the plurality of processors constituting the multiprocessor. However, the present invention is not limited to this, and the multiprocessor includes a plurality of processors. It is applicable to.

B2. Modification 2:
In the above embodiment, the case where the three sub-processors 200A to 200C are connected via the second communication path NIO formed in a loop shape is shown as an example, but the first sub-processor 200A is shown. And the second sub-processor 200B, and the first sub-processor 200A and the third sub-processor 200C may be connected by dedicated communication paths provided individually. Further, the second sub-processor 200B and the third sub-processor 200C may be connected by a dedicated communication path.

  Further, the three sub-processors 200A to 200C may be connected by a common bus type communication path.

  Further, the case where the main processor 100 and the three sub-processors 200A to 200C are connected by the dedicated first communication paths NES1 to NES3 provided individually is shown as an example. You may make it connect by the communication path of a common bus form.

  Further, an example is shown in which the memory controller 300 and the main processor 100 and the three sub processors 200A to 200C are respectively connected by dedicated third communication paths NEM0 to NME3 provided individually. However, they may be connected by a communication path of a common bus type.

  In other words, the configuration of the communication path that connects the processors and the memory controller may be in any form as long as they can connect each other and communicate their requests and responses. Good.

It is explanatory drawing which shows a part of multiprocessor system 10 of this invention. 6 is an explanatory diagram illustrating print image processing control executed by a user interface 110. FIG. It is explanatory drawing shown about the image process performed by the image process part. It is explanatory drawing shown about the layout process performed in the layout process part. It is explanatory drawing shown about the interrupt process performed by the interrupt process part 210A. It is explanatory drawing shown about the image processing control performed by the image processing control part 250A. It is explanatory drawing shown about the decoding process performed in the decoding execution part 280B. It is explanatory drawing shown about a decoding execution process. It is explanatory drawing shown about an example of the print image image data produced | generated by the print image processing operation. FIG. 6 is an explanatory diagram illustrating a normal print image processing operation. FIG. 6 is an explanatory diagram illustrating a normal print image processing operation. It is explanatory drawing shown about cancellation completion | finish operation | movement. It is explanatory drawing shown about cancellation completion | finish operation | movement.

Explanation of symbols

10 ... multiprocessor system 20 ... RAM
30 ... Input device 40 ... Display device 50 ... Storage device 100 ... Main processor 110 ... User interface 120 ... Image processing unit 130 ... Layout processing unit 150 ... Interrupt occurrence Unit 160 ... NES communication unit 170 ... NEM communication unit 200A ... first sub processor 200B ... second sub processor 200C ... third sub processor 210A ... interrupt processing unit 210B ... Interrupt processing unit 210C ... Interrupt processing unit 220A ... NES communication unit 220B ... NES communication unit 220C ... NES communication unit 230A ... NIO communication unit 230B ... NIO communication unit 230C. ..NIO communication unit 240A ... NEM communication unit 240B ... NEM communication unit 240C ... NEM communication unit 250A ... image processing control unit 260A ... decode control unit 270A ... image correction control unit 280A ... layout 280B ... decode execution unit 280C ... image correction execution unit 300 ... memory controller INT ... interrupt signal path INT1-INT3 ... interrupt signal path NES ... first communication path NES1 -NES3 ... first communication path NIO ... second communication path NEM ... third communication path NEM0-NEM3 ... third communication path

Claims (5)

A multiprocessor system comprising a plurality of processors,
Between a first processor and at least one second processor of the plurality of processors,
A first processing request signal is transmitted from the first processor to the second processor, and a first processing response signal is transmitted from the second processor to the first processor in response to the first processing request. A first communication path provided for, and
A dedicated first interrupt signal path provided for transmitting a first interrupt signal indicating suspension of processing executed by the second processor in accordance with the first processing request,
The first processor is executed in accordance with the first processing request to the second processor when a cancel signal indicating cancellation of the processing executed by the second processor is input . Sending the first interrupt signal indicating cancellation of the process being executed via the first interrupt signal path;
When the second processor receives the first interrupt signal, the second processor stops the process being executed according to the first process request, and indicates the end of the process being executed. 1 processing response signal is transmitted via the first communication path;
A multiprocessor system characterized by that. A multiprocessor system according to claim 1, wherein
When the second processor receives the first interrupt signal in a state where a plurality of the first processing requests are generated from the first processor to the second processor. The first process response signal indicating the end of the process being executed is canceled by stopping the process being executed being executed according to the first process request. 2 indicating that the unexecuted process to be executed in accordance with the second and subsequent first process requests is discarded and the process to be executed is terminated unprocessed. The first processing response signal after the th is transmitted via the first communication path,
A multiprocessor system characterized by that. The multiprocessor system according to claim 1 or 2, further comprising:
Between the second processor and the at least one third processor of the plurality of processors,
A second processing request signal is transmitted from the second processor to the third processor, and a second processing response signal for the second processing request is transmitted from the third processor to the second processor. A second communication path provided for, and
A dedicated second interrupt provided between the first processor and the second processor for transmitting a second interrupt signal indicating suspension of processing executed by the third processor in accordance with the second processing request. A signal path,
When the first processor receives a cancel signal indicating cancellation of processing executed by the second processor and the third processor, the first processor sends the first interrupt signal to the second processor. Is transmitted through the first interrupt signal path, and the second interrupt signal is transmitted to the third processor through the second interrupt signal path.
When the third processor receives the second interrupt signal, the third processor stops the process being executed according to the second process request, and indicates the end of the process being executed. 2 processing response signals are transmitted via the second communication path,
When the second processor receives the first interrupt signal and receives the second processing response signal from the third processor, the second processor is executing in accordance with the first processing request. Aborting the process and transmitting the first process response signal indicating the end of the process being executed via the first communication path;
A multiprocessor system characterized by that. The multiprocessor system according to claim 3, wherein
When the third processor receives the second interrupt signal in a state where a plurality of the second processing requests are generated from the second processor to the first processor, , The processing being executed being executed in accordance with the first processing request of the first is stopped, and the second processing response signal indicating the end of the processing being executed is sent to the second processing response signal. 2 indicating that the process to be executed has been terminated unprocessed by discarding the unexecuted process to be executed in accordance with the second and subsequent second processing requests. The second response processing signal after the th is transmitted via the second communication path,
A multiprocessor system characterized by that. A multiprocessor system according to any one of claims 1 to 4, wherein
The multiprocessor system is integrated on one semiconductor substrate;
A multiprocessor system characterized by that.

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