JP4827010B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko machine.

Conventionally, various gaming machines including a symbol display device provided in a game area and displaying a plurality of identification symbols have been proposed.
For example, a gaming machine main body provided with a symbol display device and capable of switching between at least a special profit state and a normal state, a main controller for switching the gaming machine main body between a special profit state and a normal state, and a plurality of Storage means for storing the symbol information, selection means for selecting at least two of the plurality of symbol information, and synthesis means for synthesizing the symbol information selected by the selection means, A graphic controller for controlling the display device, wherein the graphic controller selects symbol information from the storage means based on a gaming state signal sent from the main controller, and the combining means is selected. A game configured to synthesize the symbol information and display it on the symbol display device based on the synthesized image information. There has been proposed (e.g., see Patent Document 1.).
JP-A-8-131627 (paragraphs (0023) to (0142), FIGS. 1 to 28)

  However, in the configuration of the gaming machine described above, when a display failure occurs in the symbol display device, it is necessary to check whether or not a bug is included in the display control program of the graphic controller. The production display pattern is composed in a complicated manner, and various production control commands and production display patterns are set, so a long inspection is required to confirm all the control commands for each production display pattern. There is a problem that quick response is difficult.

  Therefore, the present invention has been made to solve the above-described problems, and when a display failure occurs in the symbol display device, it is quickly confirmed whether or not a bug is included in the display control program or the like. An object of the present invention is to provide a gaming machine that can be used at an early stage.

  In order to achieve the above object, a gaming machine according to claim 1 is provided based on a control signal from a symbol display device that is provided in a gaming area and displays a plurality of identification symbols, and a gaming machine control device that controls the gaming machine. Display control means for driving and controlling the symbol display device, and the display control means stores image pattern storage means for storing a plurality of image patterns each having a predetermined identification code corresponding to each control signal. An image pattern creating means for creating an image pattern to which a predetermined identification code is attached based on the control signal; an image data storing means for storing image forming data for displaying various image patterns; and the image pattern Based on the image pattern created by the creating means, image formation data is arranged in a frame buffer and output as a video signal to the symbol display device. A signal output means; an extraction means for extracting an identification video signal corresponding to the predetermined identification code from the video signal output from the video signal output means; the identification video signal extracted by the extraction means; and the image pattern creation The first determination unit that determines whether or not the predetermined identification code attached to the image pattern created by the unit matches the first determination unit and the first determination unit that does not match the first determination unit When the inspection control signal is input via the inspection output terminal and the mismatch information storage means for storing the mismatch information indicating the fact, the mismatch information stored in the mismatch information storage means is transmitted via the inspection output terminal. Output control means for controlling to output.

  Accordingly, when the identification video signal corresponding to the predetermined identification code extracted from the video signal output from the video signal output means does not match the predetermined identification code attached to the image pattern created by the image pattern creation means Is stored in the mismatch information storage means. When an inspection control signal is input via the inspection output terminal, the mismatch information stored in the mismatch information storage means is output via the inspection output terminal. As a result, when a display failure occurs in the symbol display device, whether or not a bug is included in the display control program or the like by inputting an inspection control signal via the inspection output terminal and checking the inconsistency information Can be detected quickly, and an early response becomes possible.

Further, in the gaming machine according to claim 2, in the gaming machine according to claim 1, when the display control means determines that they do not match by the first determination means, a symbol display indicating that they do not match. It has comprised so that it might have a notification control means which controls to notify via a device.
Thereby, the identification video signal corresponding to the predetermined identification code extracted from the video signal output from the video signal output means does not match the predetermined identification code attached to the image pattern created by the image pattern creation means. Since the fact is notified through the symbol display device, it is possible to easily confirm that a bug is included in the display control program and the like, and it is possible to cope with the problem at an earlier stage.

  According to a third aspect of the present invention, there is provided a gaming machine comprising: a symbol display device provided in a gaming area for displaying a plurality of identification symbols; and the symbol display device based on a control signal from a gaming machine control device for controlling the gaming machine. Display control means for driving control, wherein the display control means is based on the control signal and image pattern storage means for storing an image pattern with a predetermined identification code corresponding to each control signal. Image pattern creating means for creating an image pattern with a predetermined identification code, image data storage means for storing image forming data for displaying various image patterns, and the image pattern creating means. Video signal output means for arranging image formation data in a frame buffer based on an image pattern and outputting the data as a video signal to the symbol display device; and The image formation data corresponding to the predetermined identification code is read from the frame buffer, and whether or not the image formation data matches the predetermined identification code attached to the image pattern created by the image pattern creation means When it is determined by the second determination means that the second determination means does not match, a mismatch information storage means for storing mismatch information indicating that they do not match, and an inspection control signal via the inspection output terminal Output control means for controlling to output the mismatch information stored in the mismatch information storage means via the inspection output terminal.

  Accordingly, when the image formation data corresponding to the predetermined identification code read from the frame buffer and the predetermined identification code attached to the image pattern created by the image pattern creation means do not match, this means that they do not match. The mismatch information is stored in the mismatch information storage means. When an inspection control signal is input via the inspection output terminal, the mismatch information stored in the mismatch information storage means is output via the inspection output terminal. As a result, when a display failure occurs in the symbol display device, whether or not a bug is included in the display control program or the like by inputting an inspection control signal via the inspection output terminal and checking the inconsistency information Can be detected quickly, and an early response becomes possible.

Further, in the gaming machine according to claim 4, in the gaming machine according to claim 3, when the display control means determines that they do not match by the second determination means, a symbol display indicating that they do not match. It has comprised so that it might have a notification control means which controls to notify via a device.
As a result, the fact that the image formation data corresponding to the predetermined identification code read from the frame buffer and the predetermined identification code attached to the image pattern created by the image pattern creation means do not match is notified via the symbol display device. Therefore, it is possible to easily confirm that a bug is included in the display control program or the like, and it is possible to take an earlier action.

Furthermore, in the gaming machine according to claim 5, in the gaming machine according to any one of claims 1 to 4, the virtual screen display area in which the image formation data of the frame buffer can be arranged is that of the symbol display device. The image forming data displayed on the display screen is formed wider than the actual screen display area where the image forming data is arranged, and the image forming data corresponding to the predetermined identification code is in a portion outside the actual screen display area of the virtual screen display area. Configured to be placed.
As a result, the image forming data corresponding to the predetermined identification code is arranged outside the actual screen display area of the virtual screen display area. Therefore, the image forming data corresponding to the predetermined identification code is stored in the symbol display device. The quality of the effect display can be improved without being normally displayed.

  Embodiments 1 to 4 in which a gaming machine according to the present invention is embodied in a pachinko machine will be described in detail below with reference to the drawings.

First, a schematic configuration of the pachinko machine 1 according to the first embodiment will be described with reference to FIGS. 1 and 2.
As shown in FIGS. 1 and 2, the pachinko machine 1 includes an upper hinge 3 </ b> A in which an inner frame 3 made of synthetic resin forms a hinge for attaching an inner frame to a wooden outer frame 2 formed in a rectangular shape in front view. The opening of the outer frame 2 is attached to the outer frame 2 so as to be openable and closable via the lower hinge 3B. A front cover member 4 made of synthetic resin is attached to the front side of the upper half of the inner frame 3 so as to be freely opened and closed by being pivotally supported at the upper and lower sides of the left end edge portion. In addition, a substantially circular window 5 is opened at a substantially central portion of the front cover member 4, and the game board 41 is passed through two glasses attached to a glass holding frame formed on the outer peripheral edge of the window 5. The gaming area 42 (see FIG. 3) on the upper side (see FIG. 3) can be seen. Further, a full-color light emitting diode is built in the upper left edge of the window portion 5 of the front cover member 4 to constitute an error display illumination lamp 6 for displaying an error during the game. In addition, speakers 7 are arranged at four corners of the front cover member 4 as viewed from the front. Further, the front portion of the front cover member 4 is covered with a synthetic resin front member 4A made of an opaque synthetic resin, and a full-color light emitting diode (not shown) is built in along the outer periphery of the window portion 5. And light effects are performed during the game.

A key insertion portion 4B for operating a locking device (not shown) for locking the inner frame 3 and the front cover member 4 is provided at the right edge of the front cover member 4. In order to open the front cover member 4, if a predetermined key is inserted into the key insertion portion 4B and rotated in a predetermined direction, the locked state of the locking device is released and only the front cover member 4 is opened.
In addition, an upper plate 8 that receives a prize ball to be paid out via a prize ball payout device 22 is disposed below the front cover member 4. The upper plate 8 is pivotally supported on the upper and lower sides of the left edge, and is attached so that it can be opened by lowering a lever (not shown) provided inside after opening the front cover member 4. Further, a ball lending operation unit 8B for operating a card-type ball lending machine (not shown) is provided on the central front portion of the upper plate 8, and operation buttons 8C and 8D are arranged. A lower plate 9 is disposed under the upper plate 8. Further, on the left of the upper end surface of the lower plate 9, switch buttons 9A and 9B that can be used for effect display and the like are arranged.

In addition, the pachinko ball of the upper plate 8 is sent to a launching device (not shown) in which the firing force of the pachinko ball is adjusted by the operation handle 10 via a ball feed mechanism (not shown) communicating with the upper plate 8. Yes. This launching device is composed of a launching solenoid (not shown) for continuously hitting a supplied pachinko ball, a launching control board disposed in a launching control board case 30 that functions as a launching device, and the like. The control board is configured so that the power supplied to the firing solenoid is adjusted via a variable resistor (not shown) attached to the inside of the operation handle 10 so that the firing force of the pachinko ball can be increased or decreased. It is configured. Thereby, when the player adjusts the amount of rotation of the rotation operation member 10A in the operation handle 10, the resistance value of the variable resistor attached in the operation handle 10 is increased or decreased, and the pachinko ball is fired by the firing solenoid. It is configured so that the force can be appropriately adjusted.
In addition, a speaker housing 11 is provided so as to cover the front surface portion of the outer frame 2 below the inner frame 3 over the entire width in the left-right direction and the up-down direction.
Further, when the inner frame 3 is closed, the lower end portion of the inner frame 3 is in contact with the upper end surface portion of the speaker housing 11 by its own weight. Further, a rib portion (not shown) is provided on the front end edge of the bottom surface of the speaker housing 11 so as to project downward to a position facing the lower end surface of the outer frame 2 over the entire width in the left-right direction.

In addition, a game board 41 is attached to a mechanism board 18 made of a metal such as an iron plate or a synthetic resin so that the game board 41 can be attached to and detached from almost the center of the inner frame 3. A mechanism set board 20 made of synthetic resin is attached to the back side of the mechanism board 18 with a hinge so as to be freely opened and closed.
In addition, a prize ball tank 21 opened upward is fixed to the mechanism set board 20 at the uppermost back side of the pachinko machine 1. The prize ball tank 21 has a communication hole formed in an inclined bottom surface, and a tank rail 23 that forms a passage for the pachinko balls to flow out in two rows under the communication hole to send the pachinko balls to the prize ball dispensing device 22. Is attached. Also, in the prize ball payout device 22, a ball presence detection switch (not shown) for confirming a pachinko ball passing through the prize ball passage in the prize ball guide unit 24 and a payout stepping motor (not shown) for adjusting the payout of the pachinko ball. The interior is shown. These prize ball tank 21, tank rail 23, prize ball guide unit 24, prize ball payout device 22 and the like constitute a prize ball payout system.

  In addition, an effect display board case 26 in which an effect display board 260 (see FIG. 4) for controlling a liquid crystal display (LCD) 52 (see FIG. 3) and the like is incorporated is disposed below the tank rail 23. . Further, on the side of the effect display board case 26, an accessory driving control board case 27 in which an accessory driving control board for driving and controlling ordinary accessories is provided. Further, on the lower side of the effect display substrate case 26, while driving and controlling each speaker 7, the speaker built in the speaker case 11, and the full color diode such as the error display illumination lamp 6, the effect display substrate 260 is controlled. A sub-integrated control board case 28 in which a sub-integrated control board 280 (see FIG. 4) for performing a causal relationship between display control and sound control related to a speaker or the like is provided. Further, a main control board case 29 in which a main control board 290 (see FIG. 4) for controlling the gaming operation of the pachinko machine 1 is provided is disposed below the sub integrated control board case 28. On the player side front portion of the main control board case 29, a launch control board case 30 in which a launch control board that drives and controls the launch device by operating the operation handle 10 is provided. Further, a payout control board case 31 in which a payout control board for driving and controlling the prize ball payout device 22 is provided is located on the side of the main control board case 29. Further, a power supply board case 32 in which a power supply board for generating and supplying various drive power sources such as DC5V and DC12V from an AC24V supply power source is provided below the payout control board case 31.

Next, the configuration of the game area 42 on the game board 41 will be described with reference to FIG.
As shown in FIG. 3, in this game area 42, each structure such as a prize opening is arranged on a game board 41 made of a plate material of a predetermined thickness, and an annular rail 43 is erected so as to surround it. Has been configured. This rail 43 constitutes an overlapping guide path 44 that guides the launched pachinko ball into the game area 42, and restricts the progress of the pachinko ball driven along the rail 43 on the right shoulder. Step portion 45.
An opening is established in the approximate center of the game area 42, and a special symbol display device 48 is disposed on the front side of the opening. The special symbol display device 48 includes a liquid crystal display (LCD) 52 and the like attached to the back surface portion. The liquid crystal display 52 displays three rows of changing symbols that fluctuate in the vertical direction on the left, middle, and right, and a normal symbol display unit 50 that displays a normal symbol divided into left and right at the lower left corner. Is configured.

On the other hand, a gate 54 is disposed on the left side of the special symbol display device 48. The gate 54 is provided with a gate switch 54A (see FIG. 4) for detecting the passage of the pachinko sphere. Further, outside the left and right lower corners of the special symbol display device 48, normal windmills 55 and 56 are provided.
In addition, a start port 57 is disposed immediately below the special symbol display device 48. The starting port 57 is provided with a starting port switch 57A (see FIG. 4) for detecting the winning of the pachinko ball, and the three rows of changing symbols displayed on the liquid crystal display 52 by detecting the winning of the pachinko ball. The fluctuation starts. If the winning symbol is won in the starting slot 57 while the changing symbol is changing, up to four winnings are stored in the RAM provided on the main control board 290 (see FIG. 4), and are held as the number of changes in the changing symbol. The

  Further, the normal symbol of the normal symbol display unit 50 is changed by detecting the passage of the pachinko ball through the gate 54. Then, when a pachinko ball enters the gate 54 and the normal symbol on the normal symbol display unit 50 changes and then stops in a predetermined display mode (for example, “11”, “77”, etc.) The tulip-type accessory 57B provided at the upper part of the start port 57 is opened for a predetermined time (about 1 second in the first embodiment), and the probability that a pachinko ball wins the start port 57 increases. Further, when the pachinko ball passes through the gate 54 while the normal symbol is changing, the number of passages is stored in the RAM provided on the main control board 290 up to four, and is held as the fixed number of changes of the normal symbol.

A special winning device 61 is provided below the starting port 57. The special winning device 61 is formed with a large winning port 60 whose front surface is covered with an open / close door 59 having a wide lateral opening. In addition, a so-called V port is formed in the center of the big winning port 60, and a V switch 60B (see FIG. 4) for detecting a winning in the V port is provided. Also, in the special winning opening 60, there is provided a special winning opening switch 60A (see FIG. 4) for counting the number of pachinko balls won when the open / close door 59 is opened.
In addition, on each of the left and right sides of the grand prize winning opening 60, winning openings 62, 63 that are open upward are arranged and communicated with a prize ball bowl (not shown) on the back of the game board 41. Each winning opening switch (not shown) for detecting the winnings is provided. In addition, each of the illumination lamps 62A and 63A is incorporated below the winning prize openings 62 and 63.
In addition, an out port 65 is opened along the rail 43 directly under the special winning device 61. Further, in such a game area 42 surrounded by the rails 43, a plurality of nails are driven together with the respective components to constitute a complicated flow path of the pachinko ball.

Next, the configuration of the control system related to the drive control of the pachinko machine 1 configured as described above will be described with reference to FIGS. 4 and 5.
As shown in FIG. 4, the control system related to the drive control of the pachinko machine 1 includes a main control board 290, a sub-integrated control board 280, an effect display board 260, and the like.
First, the main control board 290 includes a CPU 291, ROM 292, RAM 293, an input / output circuit (I / O) 294, etc., and the CPU 291, ROM 292, RAM 293, and input / output circuit 294 are connected to each other by a bus line. Has been. A clock circuit 295 is connected to the CPU 291 and a predetermined clock signal is input. The input / output circuit 294 is connected to a gate switch 54A, a start port switch 57A, a big prize port switch 60A, a V switch 60B, and the like. The input / output circuit 294 is connected to an opening / closing solenoid 59A for opening / closing the opening / closing door 59 and a solenoid 57C for opening / closing the tulip-type accessory 57B.

  In addition, the sub-integrated control board 280 has a CPU 281, a ROM 282 that stores a drive control program for the speaker 7, the illumination lamp 6, and the like, a RAM 283 that stores various control signals from the main control board 290, and is sent from the main control board 290. An input / output circuit 284 for receiving various control signals, a drive circuit 71 for driving and controlling the speaker 7, a drive circuit 72 for driving and controlling the error display lighting lamp 6 and the like are provided. The CPU 281, ROM 282, RAM 283, and input / output circuit 284 are mutually connected by a bus line. A clock circuit 285 is connected to the CPU 281 and a predetermined clock signal is input. The input / output circuit 284 is connected to the input / output circuit 294 of the main control board 290 and the input / output circuit 264 of the effect display board 260. Further, the input / output circuit 284 is connected to the drive circuits 71 and 72 and the switch buttons 9A and 9B.

  As shown in FIG. 5, the effect display board 260 is connected to the CPU 261, the program ROM 262 and RAM 263 connected to the CPU 261, the input / output circuit 264, the VDP (Video Digital Processor) 265, and the VDP 265. The image data ROM 266 and the RAM 267, an extraction circuit 268, and an output circuit 270 connected to the extraction circuit 268 are provided. The extraction circuit 268 is connected to the CPU 261 via the ID code storage register 269. The CPU 261 is connected to an inspection output terminal 271 so that it can be connected to an external inspection machine (not shown). A clock circuit 272 is connected to the CPU 261 and a predetermined clock signal is input. A liquid crystal display (LCD) 52 is connected to the output circuit 270.

  Then, the CPU 261 temporarily stores various signal data in the RAM 263 in accordance with various control signals sent from the sub-integrated control board 280, and displays a control program for displaying the fluctuation symbols and the like stored in the program ROM 262. Based on the control data or the like, data of predetermined image patterns (hereinafter referred to as “sprites”) constituting various effect patterns (scenes) is created at a rate of about once every 32 milliseconds, for example, to the VDP 265. Output. The VDP 265 temporarily stores the received sprite data in the sprite buffer 267B, and then reads out the image data in accordance with the sprite data received from the image data ROM 266, and arranges and stores it in the frame buffer 267A as will be described later for editing. These image data are output to the output circuit 270 via the extraction circuit 268 (see FIG. 9), and a video signal is output from the output circuit 270 to the liquid crystal display (LCD) 52. Accordingly, video signals are output from the output circuit 270 to the liquid crystal display 52 at intervals of about 32 milliseconds, that is, at intervals at which about 30 frames (image data) per second are displayed on the liquid crystal display 52. A movie of the pattern is displayed.

Here, the frame buffer 267A will be described with reference to FIG.
As shown in FIG. 9, the frame buffer 267A constitutes a virtual screen display area 72 of an image coordinate system (PX, PY) of 1024 × 1024 dots. The actual screen display area 73 displayed on the display screen of the liquid crystal display 52 is 640 × 480 dots. Also, the VDP 265 outputs each image data arranged and stored in the virtual screen display area 72 as image data for one frame to the output circuit 270 via the extraction circuit 268, and the liquid crystal display (LCD) from the output circuit 270. 52, the video signal corresponding to the real screen display area 73 is output, and the image coordinate PX = 640-1024 dot area and the image coordinate PY = 480-1024 dot area in the virtual screen display area 72 are overscan display areas 74. Thus, it is not displayed on the display screen of the liquid crystal display 52.

Further, the extraction circuit 268 corresponds to the image coordinates of the virtual screen display area 72 determined in advance as described later from the image data output from the VDP 265 (in the first embodiment, the image coordinates (640, 0)). The image data of the ID character to be extracted is extracted as an “ID code”, output to the ID code storage register 269, and the ID code stored in the ID code storage register 269 is rewritten with the newly extracted ID code. Therefore, the CPU 261 reads the ID code stored in the ID code storage register 269 after a predetermined time has elapsed (eg, after about 30 milliseconds to about 32 milliseconds have elapsed) after outputting sprite data to the VDP 265. The ID code included in the image data output from the VDP 265 to the output circuit 270 can be confirmed.
Also, in the RAM 263, as will be described later, the ID code corresponding to the ID character of the sprite data output from the CPU 261 to the VDP 265 does not match the ID code included in the image data output from the VDP 265 to the output circuit 270. In this case, an error data storage area 263A is provided in which the CPU 261 stores the output sprite data, a control command corresponding to the output sprite, and the like.

  Here, the effect pattern (scene) is, for example, three rows of identification symbols that are scroll-displayed (variable display), and after a predetermined effect display is performed, the three rows of identification determined by the CPU 291 of the main control board 290. This refers to a certain unit of scene and background, such as when the symbol is displayed in a stopped state, and hitting or losing is determined. It consists of about 150 to 500 still image patterns (sprites) in advance. It is. In addition, since a large number of sprites are stored in advance in the program ROM 262, and an effect pattern (scene) is created in response to various control signals sent from the sub-integrated control board 280, the total number of combinations is large. Become.

  Next, a control process executed by the CPU 261 of the effect display board 260 configured as described above will be described with reference to FIGS.

  First, “display processing 1” executed when the CPU 261 of the effect display board 260 receives a control signal instructing the effect display from the CPU 281 of the sub-integrated control board 280 will be described with reference to FIGS. FIG. 6 is a flowchart of “display processing 1” executed by the CPU 261 of the effect display board 260. The program shown in the flowchart in FIG. 6 is stored in the program ROM 262 of the effect display board 260 and is executed by the CPU 261. Here, the program shown in the flowchart of FIG. 6 operates at regular intervals (for example, every 4 msec) after the power is turned on.

As shown in FIG. 6, first, in step (hereinafter referred to as S) 11, the CPU 261 determines whether or not a control signal such as an effect pattern command is input from the CPU 281 of the sub-integrated control board 280 via the input / output circuit 264. A determination process for determining If a control signal such as an effect pattern command is not input via the input / output circuit 264 (S11: NO), the CPU 261 ends the process.
On the other hand, when a control signal such as an effect pattern command is input via the input / output circuit 264 (S11: YES), in S12, the CPU 261 displays the effect pattern command and the final stop symbol constituting the control signal. Data is extracted and stored in the RAM 263. Further, the CPU 261 analyzes whether the production pattern command is a complete loss production pattern, a reach loss production pattern, or a win production pattern.

In S <b> 13, the CPU 261 reads out the first image pattern corresponding to the effect pattern specified in S <b> 12, that is, sprite data from the program ROM 262 and stores it in the RAM 263.
Here, an example of the data structure of the sprite will be described with reference to FIG.
As shown in FIG. 7, the configuration of the sprite data 71 includes image coordinates (PX, PY) representing the arrangement position of the character frame buffer 267A, a display range of the character (SX, SY), and the character. The data composed of (Char) representing the storage address of the image data ROM 266 in which the image data is stored is sequentially arranged for every four characters, and finally “END” representing the end of the data is arranged. Yes.

  For example, in the case where the sprite data “PX, PY, SX, SY, Char” is “160, 240, 160, 160, 0x00000”, the character 266A in which the address of the image data ROM 266 is stored in “0x00000” 8) is arranged at an image coordinate position of (160, 240) in the frame buffer 267A with a size of 160 × 160 dots. Accordingly, the character 266A is displayed on the liquid crystal display 52. When the sprite data “PX, PY, SX, SY, Char” is “640, 0, 1, 1, 0xc0000”, the ID character 266D (the address of the image data ROM 266 is stored in “0xc0000” ( 8) is arranged at the image coordinate position of (640, 0) in the frame buffer 267A with a size of 1 × 1 dot. Therefore, the ID character 266D is not displayed on the display screen of the liquid crystal display 52. The program ROM 262 stores image data of each ID character corresponding to the address of the image data ROM 266.

Subsequently, in S <b> 14, the CPU 261 reads the sprite data again from the RAM 263 and outputs it to the VDP 265.
As a result, the VDP 265 creates image data in the virtual screen display area 72 of the frame buffer 267A as described above based on the sprite data, and then stores each image data arranged and stored in the virtual screen display area 72 by one frame. Is output to the output circuit 270 via the extraction circuit 268 as image data for the minute. Further, as described above, the extraction circuit 268 outputs image data for one dot corresponding to the image coordinates (640, 0) of the virtual screen display area 72 from the input image data for one frame, that is, ID. Character image data is extracted as an “ID code”, and the ID code stored in the ID code storage register 269 is rewritten with the newly extracted ID code.

Here, an example of image data corresponding to each character (Char) of the sprite data 71 shown in FIG. 7 will be described with reference to FIG.
As shown in FIG. 8, the image data ROM 266 stores image data of various characters. For example, with respect to “0x00000” of (Char) of the sprite data 71, the storage address “0x00000” of the image data ROM 266 stores the image data of the character 266A indicated by the bold line “◯”. The image data of the character 266A corresponds to (160, 160) of (SX, SY) of the sprite data 71, the size in the virtual screen display area 72 is 160 × 160 dots, red for each dot. (R), green (G), blue (B), and other (α) data configurations of 8 bits each, that is, a data configuration of 4 bytes per dot.
Further, in contrast to “0x40000” and “0x80000” of (Char) of the sprite data 71, the storage addresses “0x40000” and “0x80000” of the image data ROM 266 have image data 266B having the same configuration as the character 266A, respectively. 266C is stored.
Further, the image data of the ID character 266D is stored in the storage address “0xc0000” of the image data ROM 266 with respect to “0xc0000” of (Char) of the sprite data 71. The image data of the ID character 266D corresponds to “1, 1” of (SX, SY) of the sprite data 71, the size in the virtual screen display area 72 is 1 × 1 dot, A 32-bit “ID code”, that is, an “ID code” of 4 bytes per dot is stored.

As a result, as shown in FIG. 9, when the sprite data 71 (see FIG. 7) is input to the VDP 265, the VDP 265 transfers the image data of each character 266A to 266D (see FIG. 8) from the image data ROM 266. The data are sequentially read and stored in the virtual screen display area 72 configured in the frame buffer 267A.
For example, when the sprite data “PX, PY, SX, SY, Char” is “160, 240, 160, 160, 0x00000”, the character 266A in which the address of the image data ROM 266 is stored in “0x00000” The frame buffer 267A is arranged and stored at the image coordinate position (160, 240) of 160 × 160 dots.
If the sprite data “PX, PY, SX, SY, Char” is “640, 0, 1, 1, 0xc0000”, the ID character 266D stored in the address “0xc0000” of the image data ROM 266 is stored. The frame buffer 267A is arranged at the image coordinate position (640, 0) with a size of 1 × 1 dot.
Accordingly, the characters 266A to 266C are arranged and stored in the real screen display area 73, so that they are displayed in color on the liquid crystal display 52. On the other hand, the ID character 266D is not displayed on the liquid crystal display 52 because it is stored in the overscan display area 74.

In S <b> 15, the CPU 261 extracts image data for one dot corresponding to the image coordinates (640, 0) of the virtual screen display area 72 as “ID code” from the image data output from the VDP 265 by the extraction circuit 268. Then, it waits for a predetermined time (for example, approximately 30 milliseconds to 32 milliseconds) to rewrite the ID code stored in the ID code storage register 269 with the newly extracted ID code.
Subsequently, in S <b> 16, the CPU 261 reads the ID code stored in the ID code storage register 269 as the “video ID code” of the video signal output to the liquid crystal display 52 and stores it in the RAM 263.

Thereafter, in S17, the CPU 261 reads “0xc0000” of (Char) corresponding to “640, 0” of (PX, PY) of the sprite data 71 stored in the RAM 263. Then, the ID character image data having “0xc0000” as the address of the image data ROM 266 is read from the program ROM 262 and stored in the RAM 263 as an “output ID code” corresponding to the control command input from the CPU 281 of the sub-integrated control board 280. Remember. Further, the “output ID code” and the “video ID code” are read again from the RAM 263, and a determination process for determining whether or not they match is executed.
If the “output ID code” does not match the “video ID code” (S17: NO), in S18, the CPU 261 displays the data 71 of the sprite, the control command corresponding to the output sprite, and the like. Is stored in the error data storage area 263A, and then the process proceeds to S19.
On the other hand, when the “output ID code” matches the “video ID code” (S17: YES), the CPU 261 proceeds to the process of S19.

In S <b> 19, the CPU 261 has processed all the number of frames specified by the effect pattern specified in S <b> 12, that is, whether the next sprite data corresponding to the specified effect pattern remains in the program ROM 262. A determination process for determining whether or not is executed.
If the next sprite data corresponding to the effect pattern specified in S12 remains in the program ROM 262 (S19: NO), the CPU 261 proceeds to the process in S13 and then the next sprite data. Are read out from the program ROM 262 and stored in the RAM 263, and then the processing from S14 is executed.
On the other hand, if the next sprite data corresponding to the effect pattern specified in S12 does not remain in the program ROM 262 (S19: YES), the CPU 261 ends the process.

  Next, the “error” executed when the CPU 261 of the effect display board 260 receives a control signal instructing output of data stored in the error data storage area 263A from the inspection machine (not shown) via the inspection output terminal 271. The “data output process” will be described with reference to FIG. FIG. 10 is a flowchart of “error data output processing” executed by the CPU 261 of the effect display board 260. Note that the program shown in the flowchart in FIG. 10 is stored in the program ROM 262 of the effect display board 260 and is executed by the CPU 261. Here, the program shown in the flowchart of FIG. 10 operates at regular intervals (for example, every 4 msec) after the power is turned on.

As shown in FIG. 10, first, in S <b> 25, the CPU 261 executes a determination process for determining whether or not a signal is input via the inspection output terminal 271. If no signal is input via the inspection output terminal 271 (S25: NO), the CPU 261 ends the process.
On the other hand, when a signal is input via the inspection output terminal 271 (S25: YES), the CPU 261 proceeds to the process of S26. In S <b> 26, the CPU 261 executes determination processing for determining whether or not the signal input via the inspection output terminal 271 is an error data output request signal. If the signal input via the inspection output terminal 271 is not an error data output request signal (S26: NO), the CPU 261 ends the process.

  On the other hand, when the signal input via the inspection output terminal 271 is an error data output request signal (S26: YES), the CPU 261 proceeds to the process of S27. In S27, the CPU 261 sequentially reads out the sprite data stored in the error data storage area 263A, the control command corresponding to the output sprite, etc., and outputs it to the outside via the inspection output terminal 271, and then performs the processing. finish.

As described above, in the pachinko machine 1 according to the first embodiment, the CPU 261 specifies an effect pattern when a control signal such as an effect pattern command is input from the CPU 281 via the input / output circuit 264 (S11 to S11). S12). Then, each image pattern corresponding to the specified effect pattern, that is, sprite data is read from the program ROM 262 and output to the VDP 265 (S13 to S14). Further, the CPU 261 reads the ID code stored in the ID code storage register 269 as the “video ID code” of the video signal output to the liquid crystal display 52, and the image data of the ID character of the sprite data as the program ROM 262. Is read out as an “output ID code”, and it is determined whether or not the “output ID code” matches the “video ID code” (S15 to S17). If the “output ID code” does not match the “video ID code” (S17: NO), the CPU 261 stores the data 71 of the sprite, the control command corresponding to the output sprite, and the like as error data. After storing in the area 263A, the process proceeds to S13, the next sprite data is read from the program ROM 262, stored in the RAM 263, and the processes after S14 are executed again.
On the other hand, when an error data output request signal is input via the inspection output terminal 271, the CPU 261 sends sprite data stored in the error data storage area 263A, a control command corresponding to the output sprite, and the like. The data are sequentially read out and output to the outside via the inspection output terminal 271 (S25 to S27).

  As a result, when a display failure occurs in the liquid crystal display 52, an inspection machine (not shown) gives an error data output request signal for instructing output of data stored in the error data storage area 263A via the inspection output terminal 271. Can be sequentially received and confirmed via the test output terminal 271 for sprite data stored in the error data storage area 263A, control commands corresponding to the output sprites, and the like. 10), it is possible to quickly detect whether or not a bug is included in the display control program or the like, and an early response is possible.

Next, a pachinko machine according to a second embodiment will be described with reference to FIG. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment in FIGS. 1 to 10 indicate the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .
The schematic configuration of the pachinko machine according to the second embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment. Various control processes are substantially the same as the pachinko machine 1 according to the first embodiment.
However, in the pachinko machine according to the second embodiment, when the CPU 261 of the effect display board 260 receives a control signal instructing the effect display from the CPU 281 of the sub-integrated control board 280, the above-described “display process 1” is changed. The difference is that “display process 2” is executed.

  Here, “display processing 2” executed when the CPU 261 of the effect display board 260 of the pachinko machine according to the second embodiment receives a control signal instructing effect display from the CPU 281 of the sub-integrated control board 280 is shown in FIG. Based on FIG. 11 is a flowchart of “display processing 2” executed by the CPU 261 of the effect display board 260 of the pachinko machine according to the second embodiment. Note that the program shown in the flowchart of FIG. 11 is stored in the program ROM 262 of the effect display board 260 and executed by the CPU 261. Here, the program shown in the flowchart of FIG. 11 operates at regular intervals (for example, every 4 msec) after the power is turned on.

As shown in FIG. 11, first, in S31 to S37, the CPU 261 executes the processes of S11 to S17 of “Display Process 1” according to the first embodiment.
If the “output ID code” does not match the “video ID code” (S37 (S17): NO), the CPU 261 proceeds to the process of S39 after executing the process of S18 in S38.
In S <b> 39, the CPU 261 reads sprite data indicating that the display control program has a bug or the like from the program ROM 262, and outputs the sprite data to the VDP 265. As a result, the VDP 265 arranges and stores image data indicating that the display control program has a bug or the like on the liquid crystal display 52 based on the sprite data, and stores it in the frame buffer 267A as image data for one frame. The data is output to the output circuit 270 via the extraction circuit 268. The sprite video signal is output from the output circuit 270 to the liquid crystal display 52 and displayed in color.
In S <b> 40, the CPU 261 outputs an instruction signal for generating a warning sound to the CPU 281 of the sub-integrated control board 280. As a result, the CPU 281 issues a warning sound indicating that the display control program has a bug or the like via the drive circuit 71 and the speaker 7 to call attention. In addition, you may perform voice guidance to the effect that there is a bug etc. in the display control program.

  Subsequently, in S41, the CPU 261 provides the VDP 265 with sprite data indicating that there is a bug in the display control program for a predetermined number of frames (for example, about 150 frames. A color display indicating that there is a bug in the program is displayed for about 5 seconds.) A determination process is performed to determine whether or not the program has been repeatedly output. If the sprite data indicating that there is a bug or the like in the display control program has not been repeatedly output for a predetermined number of frames (S41: NO), the CPU 261 executes the processing from S39 onward again.

On the other hand, when sprite data indicating that there is a bug or the like in the display control program is repeatedly output for a predetermined number of frames (S41: YES), the CPU 261 proceeds to the process of S42. In S42, the CPU 261 executes the process of S19 according to the first embodiment.
If the next sprite data corresponding to the effect pattern specified in S32 (S12) does not remain in the program ROM 262 (S42 (S19): YES), the CPU 261 ends the process.

  If the sprite data indicating that there is a bug in the display control program is repeatedly output for a predetermined number of frames in S41 (S41: YES), the CPU 261 may end the process. Thereby, since the effect display of the pachinko machine 1 is stopped in the middle, it is possible to more easily confirm that there is a bug or the like in the display control program.

  Therefore, in the pachinko machine according to the second embodiment, when the “output ID code” does not match the “video ID code” (S37 (S17): NO), the sprite data indicating that the display control program has a bug. Is repeatedly output to the VDP 265 for a predetermined number of frames and a warning sound is generated by the CPU 281 of the sub-integrated control board 280 (S39, S40), so it is easy to confirm that a bug or the like is included in the display control program can do. Further, an error data output request signal instructing output of data to be stored in the error data storage area 263A is input via an inspection output terminal 271 by an inspection machine (not shown), whereby an error is output via the inspection output terminal 271. It is possible to sequentially receive and check sprite data stored in the data storage area 263A and control commands corresponding to the output sprite (see FIG. 10), bugs included in the display control program, etc. Can be corrected at an early stage.

Next, a pachinko machine according to a third embodiment will be described with reference to FIGS. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment in FIGS. 1 to 10 indicate the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .
The schematic configuration of the pachinko machine according to the third embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment. Various control processes are substantially the same as the pachinko machine 1 according to the first embodiment.
However, as shown in FIG. 12, the pachinko machine according to the third embodiment differs from the effect display board 260 according to the pachinko machine 1 according to the first embodiment in the configuration of the effect display board 260, and the extraction circuit 268 and the ID code The storage register 269 is not provided, and the CPU 261 and the output circuit 265 according to the third embodiment are directly connected. Further, the CPU 261 according to the third embodiment is directly connected to the frame buffer 267A, and is configured to check image data at an arbitrary address stored in the frame buffer 267A.

Further, due to such a difference in configuration, the CPU 261 of the effect display board 260 according to the third embodiment receives the above-described “display process 1” when a control signal instructing the effect display is input from the CPU 281 of the sub-integrated control board 280. "Display process 3" is executed instead of "".
Here, “display processing 3” executed when the CPU 261 of the effect display board 260 of the pachinko machine according to the third embodiment receives a control signal instructing effect display from the CPU 281 of the sub-integrated control board 280 is shown in FIG. Based on FIG. 13 is a flowchart of “display processing 3” executed by the CPU 261 of the effect display board 260 of the pachinko machine according to the third embodiment. The program shown in the flowchart in FIG. 13 is stored in the program ROM 262 of the effect display board 260 and executed by the CPU 261. Here, the program shown in the flowchart of FIG. 13 operates at regular intervals (for example, every 4 msec) after the power is turned on.

As illustrated in FIG. 13, first, in S61 to S64, the CPU 261 executes the processes of S11 to S14 of “Display Process 1” according to the first embodiment.
In S65, the CPU 261 reads (640, 0) (see FIG. 7) from (PX, PY) from the sprite data 71 stored in the RAM 263, and displays this “640, 0” on the virtual screen of the frame buffer 267A. As the image coordinates (640, 0) of the area 72 (see FIG. 9), image data for one dot corresponding to the image coordinates (640, 0) is read and stored in the RAM 263 as a “video ID code”.

Subsequently, in S66, the CPU 261 executes the process of S17 of the “display process 1” according to the first embodiment.
If the “output ID code” does not match the “video ID code” (S66 (S17): NO), the CPU 261 proceeds to the process of S68 after executing the process of S18 in S67.
In S <b> 68, the CPU 261 reads sprite data indicating that the display control program has a bug or the like from the program ROM 262, and outputs the sprite data to the VDP 265 as still image data. As a result, the VDP 265 arranges and stores image data indicating that there is a bug in the display control program on the liquid crystal display 52 on the basis of the sprite data, and then stores the still image data for one frame in the frame buffer 267A. Is output to the output circuit 270 via the extraction circuit 268. The video signal of the sprite is output from the output circuit 270 to the liquid crystal display 52, and a still image indicating that the display control program has a bug or the like is displayed in color.

In S69, the CPU 261 outputs an instruction signal for generating a warning sound to the CPU 281 of the sub-integrated control board 280, and then ends the process. As a result, the CPU 281 issues a warning sound indicating that the display control program has a bug or the like via the drive circuit 71 and the speaker 7 to call attention. In addition, you may perform voice guidance to the effect that there is a bug etc. in the display control program.
On the other hand, when the “output ID code” matches the “video ID code” in S66 (S66 (S17): YES), the CPU 261 proceeds to the process of S70. In S70, the CPU 261 executes the process of S19 according to the first embodiment.
If the next sprite data corresponding to the effect pattern specified in S62 (S12) does not remain in the program ROM 262 (S70 (S19): YES), the CPU 261 ends the process.

  Note that after the process of S69 is finished, the process is finished, but a still image indicating that the display control program has a bug or the like is displayed for a predetermined time (for example, about 5 seconds), and a warning is given. After the sound is generated, the processing after S70 may be executed. Thereby, bugs and the like included in the display control program can be sequentially confirmed.

  Therefore, in the pachinko machine according to the third embodiment, when the “output ID code” and the “video ID code” do not match (S66 (S17): NO), a still image indicating that there is a bug in the display control program is displayed. In addition to being displayed in color, a warning sound is generated by the CPU 281 of the sub-integrated control board 280 (S68, S69), it can be easily confirmed that a bug or the like is included in the display control program. Further, an error data output request signal instructing output of data to be stored in the error data storage area 263A is input via an inspection output terminal 271 by an inspection machine (not shown), whereby an error is output via the inspection output terminal 271. It is possible to sequentially receive and check sprite data stored in the data storage area 263A and control commands corresponding to the output sprite (see FIG. 10), bugs included in the display control program, etc. Can be corrected at an early stage.

Next, a pachinko machine according to Embodiment 4 will be described with reference to FIGS. In the following description, the same reference numerals as those of the pachinko machine 1 according to the first embodiment in FIGS. 1 to 10 indicate the same or corresponding parts as those of the pachinko machine 1 according to the first embodiment. .
The schematic configuration of the pachinko machine according to the fourth embodiment is substantially the same as that of the pachinko machine 1 according to the first embodiment. Various control processes are substantially the same as the pachinko machine 1 according to the first embodiment.

However, as shown in FIG. 15, the pachinko machine according to the fourth embodiment is different from the effect display board 260 according to the pachinko machine 1 according to the first embodiment in the configuration of the effect display board 260. The extraction circuit 268, the ID code storage register 269, and the inspection output terminal 271 are not provided, and the CPU 261 according to the fourth embodiment is directly connected to the VDP 265.
Further, at the normal time, the effect display board 260 input / output circuit 264 and the input / output circuit 284 of the sub integrated control board 280 are directly connected. In addition, a liquid crystal display (LCD) 52 is directly connected to the effect display substrate 260 output circuit 270 to display moving images of various effect patterns.

  On the other hand, as shown in FIG. 14, in the case of examining bugs and the like included in the display control program stored in the program ROM 262 and the image data ROM 266 of the effect display board 260, the effect display board 260 input / output circuit 264 is provided. Are connected to the input / output circuit 284 of the sub-integrated control board 280 via the inspection apparatus 300. The liquid crystal display (LCD) 52 is connected to the effect display substrate 260 output circuit 270 via the inspection device 300.

Here, a schematic configuration of the inspection apparatus 300 will be described with reference to FIG.
As shown in FIG. 15, the inspection apparatus 300 includes an inspection control board 300A, and a liquid crystal display (LCD) 305 and an alarm transmitter 306 connected to the inspection control board 300A.
The inspection control board 300A includes a determination CPU 301 composed of a one-chip microcomputer or the like having a ROM or RAM (not shown), a control command distribution circuit 302 connected to the determination CPU 301, and the determination control board. An extraction circuit 303 connected to the CPU 301 via an ID code storage buffer 304 is provided.

Further, the control command distribution circuit 302 is connected to the input / output circuit 284 of the sub integrated control board 280 and the input / output circuit 264 of the effect display board 260, and the control signal input from the CPU 281 of the sub integrated control board 280. (Control command) is output by the control command distribution circuit 302 to the determination CPU 301 and the input / output circuit 264 of the effect display board 260, respectively.
The extraction circuit 303 of the inspection control board 300A is connected to the output circuit 270 of the effect display board 260 and the liquid crystal display (LCD) 52, and the video signal from the output circuit 270 passes through the extraction circuit 303. It is output to a liquid crystal display (LCD) 52, and moving images of various effect patterns are displayed.

  Further, the extraction circuit 303 has image coordinates (image coordinates (640, 0 in the fourth embodiment)) of the virtual screen display area 72 (see FIG. 9) determined in advance from the video signal output from the output circuit 270. ) Is extracted as a “video ID code” and output to the ID code storage buffer 304, and the video ID code stored in the ID code storage buffer 304 is newly added. Rewrite to the extracted video ID code. Therefore, the determination CPU 301 stores this ID code after a predetermined time has elapsed since the control signal (control command) was received via the control command distribution circuit 302 (for example, after about 30 milliseconds to about 32 milliseconds). By reading out the video ID code stored in the buffer 304, the ID code included in the image data output from the VDP 265 to the output circuit 270 can be confirmed.

  Further, in the ROM or RAM (not shown) provided in the determination CPU 301, an analysis of whether a complete loss pattern effect, a reach loss effect pattern, or a winning effect pattern is performed based on an effect pattern command constituting the control signal. Each image pattern corresponding to the specified effect pattern, that is, image data of an ID character included in each sprite, that is, a control program to be described later for specifying “ID code” and each “ID code” is stored in advance. ing.

  Next, the “display process 4” executed when the CPU 261 of the effect display board 260 receives a control signal instructing the effect display from the CPU 281 of the sub-integrated control board 280 via the control command distribution circuit 302 is shown in FIG. Based on FIG. 16 is a flowchart of “display processing 4” executed by the CPU 261 of the effect display board 260. Note that the program shown in the flowchart in FIG. 16 is stored in the program ROM 262 of the effect display board 260 and is executed by the CPU 261. Here, the program shown in the flowchart of FIG. 16 operates at regular intervals (for example, every 4 msec) after the power is turned on.

As illustrated in FIG. 16, in S101 to S104, the CPU 261 executes the processes of S11 to S14 of the “display process 1” according to the first embodiment.
In S105, the CPU 261 executes the process of S19 of the “display process 1” according to the first embodiment, and the next sprite data corresponding to the effect pattern specified in S102 does not remain in the program ROM 262. In this case (S105 (S19): YES), the CPU 261 ends the process.

  Next, the “inspection process” executed when the determination CPU 301 of the inspection apparatus 300 receives a control signal instructing the effect display from the CPU 281 of the sub-integrated control board 280 via the control command distribution circuit 302 will be described with reference to FIG. Based on FIG. 17 is a flowchart of “inspection processing” executed by the determination CPU 301 of the inspection apparatus 300. Note that the program shown in the flowchart of FIG. 17 is stored in a ROM or RAM (not shown) provided in the determination CPU 301 and executed by the determination CPU 301. Here, the program shown in the flowchart of FIG. 17 operates every certain time (for example, every 4 msec) after the power is turned on.

As shown in FIG. 17, in S <b> 111, the determination CPU 301 performs a determination process for determining whether or not a control signal such as an effect pattern command is input from the CPU 281 of the sub-integrated control board 280 via the control command distribution circuit 302. Execute. If a control signal such as an effect pattern command is not input via the control command distribution circuit 302 (S111: NO), the determination CPU 301 ends the process.
On the other hand, when a control signal such as an effect pattern command is input via the control command distribution circuit 302 (S111: YES), in S112, the determination CPU 301 and the effect pattern command constituting the control signal and the final stop are determined. The symbol pattern data is extracted and stored in a RAM (not shown). Further, the determination CPU 301 analyzes whether the effect pattern command is a complete loss effect pattern, a reach loss effect pattern, or a winning effect pattern.

  In S113, the determination CPU 301 uses the first image pattern corresponding to the effect pattern specified in S112, that is, the ID code corresponding to the image data of the ID character of the sprite as an “output ID code” (not shown). Read from the ROM and store in a RAM (not shown). At the same time, the determination CPU 301 obtains image data for one dot corresponding to the image coordinates (640, 0) of the virtual screen display area 72 from the video signal output from the output circuit 270 by the extraction circuit 303 (see FIG. 9). Extracting as a “video ID code” and rewriting the video ID code stored in the ID code storage buffer 304 with the newly extracted video ID code for a predetermined time (for example, about 30 milliseconds to 32 milliseconds) Wait.)

Subsequently, in S <b> 114, the determination CPU 301 reads the video ID code stored in the ID code storage buffer 304 as the “video ID code” of the video signal output to the liquid crystal display 52 and stores it in a RAM (not shown). Remember. The video signal output from the output circuit 270 is output as it is to the liquid crystal display (LCD) 52 via the extraction circuit 303, and corresponds to the first sprite of the effect pattern specified in S102. A color image is displayed.
Thereafter, in S115, the determination CPU 301 reads the “output ID code” and the “video ID code” stored in the RAM (not shown) again, and executes a determination process for determining whether or not they match.
When the “output ID code” does not match the “video ID code” (S115: NO), the determination CPU 301 proceeds to the process of S116. In S116, the determination CPU 301 stores the output ID code of the first sprite, the input control signal (control command), and the like in a RAM (not shown).

Subsequently, in S117, the determination CPU 301 displays a display image indicating that the display control program has a bug, an output ID code of the first sprite, an input control signal (control command), and the like on the liquid crystal display. (LCD) 305 to notify that there is a bug in the display control program.
At the same time, in S118, the determination CPU 301 emits a warning sound indicating that the display control program has a bug or the like via the warning sound transmitter 306, calls for attention, and ends the processing. In addition, you may perform voice guidance to the effect that there is a bug etc. in the display control program.

On the other hand, when the “output ID code” matches the “video ID code” (S115: YES), the determination CPU 301 proceeds to the process of S119. In S119, the determination CPU 301 has processed all the number of frames designated by the effect pattern specified in S112, that is, the ID code data of the next sprite corresponding to the specified effect pattern is not shown. A determination process for determining whether or not the data remains in the ROM is executed.
If the next sprite ID code data corresponding to the effect pattern identified in S112 remains in the ROM (not shown) (S119: NO), the determination CPU 301 proceeds to the process of S113. The ID code data of the next sprite is read from a ROM (not shown) and stored in a RAM (not shown) as an “output ID code”. Further, after waiting for a predetermined time (for example, about 30 milliseconds to 32 milliseconds) for the video ID code stored in the ID code storage buffer 304 to be rewritten, the processes after S114 are executed.

  On the other hand, if the ID code data of the next sprite corresponding to the effect pattern specified in S112 does not remain in the ROM (not shown) (S119: YES), the determination CPU 301 ends the process.

  Therefore, in the pachinko machine according to the fourth embodiment, when the inspection of bugs and the like included in the display control program stored in the program ROM 262 and the image data ROM 266 of the effect display board 260 is performed, the control command of the inspection apparatus 300 is used. The distribution circuit 302 is connected between the input / output circuit 284 of the sub-integrated control board 280 and the input / output circuit 264 of the effect display board 260, and the extraction circuit 303 of the inspection device 300 is the output circuit of the effect display board 260. 270 and a liquid crystal display (LCD) 52.

  As a result, the determination CPU 301 specifies an effect pattern based on the control signal input from the CPU 281 of the sub-integrated control board 280, and sequentially reads out the ID code of each sprite constituting the effect pattern from a ROM (not shown). As the “output ID code”, the “video ID code” extracted from the video signal via the extraction circuit 303 and the ID code storage buffer 304 and every predetermined time (for example, about every 30 to 32 milliseconds). Compare. If the “output ID code” does not match the “video ID code” (S115: NO), a still image indicating that there is a bug in the display control program is displayed in color on the liquid crystal display (LCD) 305. In addition, since a warning sound is emitted via the warning sound transmitter 306 (S117, S118), the display control program stored in the program ROM 262 and the image data ROM 266 of the effect display board 260 includes bugs and the like. Can be confirmed easily, and bugs and the like included in the display control program stored in the program ROM 262 and the image data ROM 266 of the effect display board 260 can be corrected at an early stage.

  Note that the present invention is not limited to the first to fourth embodiments described above, and various improvements and modifications can be made without departing from the scope of the present invention.

  For example, in the fourth embodiment, the determination CPU 301 ends the process of “inspection process” after completing the process of S118. However, the display control program includes a predetermined time (for example, about 5 seconds). A still image indicating that there is a bug or the like may be displayed on the liquid crystal display 305, and after the warning sound is generated via the warning sound transmitter 306, the processing after S119 may be executed. Thereby, bugs and the like included in the display control program can be sequentially detected.

1 is a front perspective view showing an entire pachinko machine according to Embodiment 1. FIG. It is the back side perspective view which showed the whole pachinko machine of FIG. It is a front view which shows the game board of the pachinko machine of FIG. It is a block diagram which shows the structure of the control system which concerns on the drive control of the pachinko machine of FIG. It is a block diagram which shows the structure of the effect display board | substrate of FIG. It is a flowchart which shows the display process 1 which CPU of the production display board concerning Example 1 performs. It is a figure which shows an example of the data of a sprite. It is a figure which shows an example of the image data of FIG. It is a figure which shows typically an example which arranged and stored the image data of FIG. 8 in the frame buffer. It is a flowchart which shows the error data output process which CPU of the production display board concerning Example 1 performs. It is a flowchart which shows the display process 2 which CPU of the production display board | substrate which concerns on Example 2 performs. It is a block diagram which shows the structure of the production | presentation display board which concerns on Example 3. FIG. It is a flowchart which shows the display process 3 which CPU of the production display board concerning Example 3 performs. It is a block diagram which shows the structure of the test | inspection system of the presentation display board | substrate of the pachinko machine based on Example 4. FIG. It is a block diagram which shows the structure of the production | presentation display board | substrate of FIG. 14, and an inspection apparatus. It is a flowchart which shows the display process 4 which CPU of the production display board concerning Example 4 performs. 10 is a flowchart illustrating an inspection process executed by a determination CPU of an inspection apparatus according to a fourth embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Pachinko machine, 52,305 ... Liquid crystal display, 57 ... Starting port, 71 ... Sprite data, 72 ... Virtual screen display area, 73 ... Real screen display area, 260 ... Production display board, 261, 281, 291 ... CPU, 262 ... Program ROM, 263, 267, 283, 293 ... RAM, 263A ... Error data storage area, 266 ... Image Data ROM, 267A ... Frame buffer, 267B ... Sprite buffer, 268, 303 ... Extraction circuit, 269 ... ID code storage register, 270 ... Output circuit, 271 ... Inspection output terminal, 280 ... Sub-integrated control board, 282, 292 ... ROM, 290 ... main control board, 300 ... inspection apparatus, 300A ... inspection control board, 3 1 ... judgment for CPU

Claims (5)

A symbol display device provided in the game area and displaying a plurality of identification symbols;
Display control means for driving and controlling the symbol display device based on a control signal from a gaming machine control device for controlling the gaming machine,
The display control means includes
Image pattern storage means for storing a plurality of image patterns each having a predetermined identification code corresponding to each control signal;
Image pattern creating means for creating an image pattern to which a predetermined identification code is attached based on the control signal;
Image data storage means for storing image formation data for displaying various image patterns;
Video signal output means for arranging image forming data in a frame buffer based on the image pattern created by the image pattern creating means and outputting the image signal to the symbol display device;
Extraction means for extracting an identification video signal corresponding to the predetermined identification code from the video signal output from the video signal output means;
First determination means for determining whether or not the identification video signal extracted by the extraction means matches a predetermined identification code attached to the image pattern created by the image pattern creation means;
A discrepancy information storage means for storing discrepancy information indicating that the discord does not match if the discriminating judgment is not made by the first judgment means;
When a test control signal is input via the test output terminal, output control means for controlling the mismatch information stored in the mismatch information storage means to be output via the test output terminal;
A gaming machine characterized by comprising:   The display control means includes notification control means for controlling so as to notify through the symbol display device that the information does not match when the first determination means determines that they do not match. Item 1. A gaming machine according to Item 1. A symbol display device provided in the game area and displaying a plurality of identification symbols;
Display control means for driving and controlling the symbol display device based on a control signal from a gaming machine control device for controlling the gaming machine,
The display control means includes
Image pattern storage means for storing an image pattern with a predetermined identification code corresponding to each control signal;
Image pattern creating means for creating an image pattern to which a predetermined identification code is attached based on the control signal;
Image data storage means for storing image formation data for displaying various image patterns;
Video signal output means for arranging image forming data in a frame buffer based on the image pattern created by the image pattern creating means and outputting the image signal to the symbol display device;
Whether or not the image formation data corresponding to the predetermined identification code is read from the frame buffer and the image formation data and the predetermined identification code attached to the image pattern created by the image pattern creation means match Second determination means for determining
A discrepancy information storage means for storing discrepancy information indicating that the discord does not match, when the discriminating judgment is made by the second judgment means;
When a test control signal is input via the test output terminal, output control means for controlling the mismatch information stored in the mismatch information storage means to be output via the test output terminal;
A gaming machine characterized by comprising:   The display control means includes notification control means for controlling so as to notify through the symbol display device that the information does not match when the second determination means determines that they do not match. Item 4. The gaming machine according to Item 3. The virtual screen display area where the image formation data of the frame buffer can be arranged is formed wider than the real screen display area where the image formation data displayed on the display screen of the symbol display device is arranged,
5. The gaming machine according to claim 1, wherein the image forming data corresponding to the predetermined identification code is arranged in a portion outside the real screen display area of the virtual screen display area. .

Images