JP6136913B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  Conventionally, a structure in which an electrode is formed on a semiconductor substrate is known as a semiconductor device. As the cross-sectional shape of the electrode, a rectangle may be preferably used depending on the application, but a trapezoid or a triangle may be preferable. As a method for forming an electrode having a trapezoidal cross section or a triangular cross section, for example, there is a method disclosed in Patent Document 1.

Japanese Patent Laid-Open No. 10-321622

  However, the conventional method has a problem that the electrode having the trapezoidal section and the electrode having the rectangular section have to be manufactured in different lines. In addition, in the conventional semiconductor device, it has been desired to reduce the resistance, reduce the size, save resources, facilitate the manufacturing, improve the manufacturing accuracy, and improve the workability.

SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms.
1st form of this invention is a manufacturing method of a semiconductor device which manufactures a semiconductor device provided with an electrode on a semiconductor substrate, and (i) a resist which has an opening using a resist on the semiconductor substrate A step of forming a pattern, (ii) a step of forming an electrode by directional vapor deposition on the semiconductor substrate exposed through the opening, and (iii) a step of removing the resist pattern. ), The angle of the side surface of the opening with respect to the semiconductor substrate is controlled based on the exposure amount when the resist pattern is produced, and in step (ii), the angle of the side surface of the electrode is The semiconductor substrate is controlled based on an angle of a side surface, and the semiconductor substrate is a transparent substrate and has a reflectance of 3.7% to 12.1% under the resist with respect to light having a wavelength of 405 nm A gallium substrate, in step (i), the exposure wavelength in making the resist pattern is 405 nm, exposure amount is 220 mJ / cm ² from 120 mJ / cm ^2. The present invention can also be realized as the following forms.

(1) According to one form of this invention, the manufacturing method of a semiconductor device which manufactures a semiconductor device provided with an electrode on a semiconductor substrate is provided. This method of manufacturing a semiconductor device includes (i) a step of forming a resist pattern having an opening on the semiconductor substrate using a resist, and (ii) directivity on the semiconductor substrate exposed through the opening. Forming an electrode by vapor deposition; and (iii) removing the resist pattern; in step (i), an angle of a side surface of the opening with respect to the semiconductor substrate is determined when the resist pattern is formed. In step (ii), the angle of the side surface of the electrode is controlled based on the angle of the side surface of the opening. According to the semiconductor device manufacturing method of this embodiment, the side surface shape of the electrode can be controlled based on the exposure amount. As a result, electrodes having different cross-sectional shapes can be manufactured using the same resist.

(2) In the method of manufacturing a semiconductor device according to the above aspect, the resist may be a negative resist. According to the semiconductor device manufacturing method of this embodiment, the side surface shape of the electrode can be controlled more accurately.

(3) In the method for manufacturing a semiconductor device of the above aspect, the resist may be a chemically amplified negative resist. According to the semiconductor device manufacturing method of this embodiment, the side surface shape of the electrode can be controlled more accurately.

(4) In the method of manufacturing a semiconductor device according to the above aspect, the semiconductor substrate may be a transparent substrate. According to the semiconductor device manufacturing method of this embodiment, the side surface shape of the electrode can be controlled more accurately.

(5) In the method for manufacturing a semiconductor device according to the above aspect, an exposure wavelength when the resist pattern is manufactured may be 405 nm. According to the semiconductor device manufacturing method of this embodiment, the side surface shape of the electrode can be controlled more accurately.

  A plurality of constituent elements of each aspect of the present invention described above are not indispensable, and some or all of the effects described in the present specification are to be solved to solve part or all of the above-described problems. In order to achieve the above, it is possible to appropriately change, delete, replace with another new component, and partially delete the limited contents of some of the plurality of components. In order to solve part or all of the above-described problems or to achieve part or all of the effects described in this specification, technical features included in one embodiment of the present invention described above. A part or all of the technical features included in the other aspects of the present invention described above may be combined to form an independent form of the present invention.

  The present invention can also be realized in various forms other than the semiconductor device manufacturing method. For example, it is realizable with forms, such as a semiconductor device and a power converter provided with a semiconductor device.

  According to the present invention, the side shape of the electrode can be controlled based on the exposure amount. As a result, electrodes having different cross-sectional shapes can be manufactured using the same resist.

FIG. 2 is a cross-sectional view schematically showing a configuration of a semiconductor device 100 in the present embodiment. The figure which shows typically the manufacturing method of the semiconductor device 100 in this embodiment. Sectional drawing which shows typically the structure of the sample 50 used for the evaluation test. The figure which shows the cross section of the sample 50 from which exposure amount differs. The figure which shows the relationship between resist angle (theta) (refer FIG. 3) and electrode angle (refer FIG. 3) with respect to exposure amount.

A. This embodiment:
A1. Configuration of the semiconductor device 100:
FIG. 1 is a cross-sectional view schematically showing the configuration of the semiconductor device 100 in the present embodiment. FIG. 1 shows a part of a cross section of the semiconductor device 100 according to the present embodiment. FIG. 1 is a diagram for clearly showing the technical features of the semiconductor device 100, and does not accurately indicate the thickness of each layer. FIG. 1 also shows XYZ axes orthogonal to each other for ease of explanation. The same applies to the subsequent figures. In this specification, the layer thickness refers to a dimension in the X-axis direction.

  The semiconductor device 100 according to this embodiment uses a field effect transistor (FET). The semiconductor device 100 includes a semiconductor layer 10 and an electrode layer 60.

  The semiconductor layer 10 is formed of a group III nitride semiconductor. “Group III nitride” refers to a group III-V compound using nitrogen as a group V element. Examples of the group III nitride include aluminum nitride, gallium nitride, and indium nitride. In this embodiment, gallium nitride (GaN) is used as the semiconductor. In the present specification, the semiconductor layer 10 is also referred to as a semiconductor substrate 10.

  Compared with other semiconductors, gallium nitride has (i) a high thermal conductivity and excellent heat dissipation, (ii) a high temperature operation point, (iii) a high electron saturation rate, (Iv) It is preferable in that the dielectric breakdown voltage is high.

  A transparent substrate is preferably used as the semiconductor substrate 10. By using a transparent substrate, reflection of light from the semiconductor layer 10 when forming a resist pattern can be reduced, which is preferable in controlling the side surface shape of an electrode surface described later. Examples of the transparent substrate include a sapphire substrate in addition to the gallium nitride substrate.

  Further, it is preferable to use a substrate having a reflectance of 0.1% to 26.6% as the semiconductor substrate 10. Although the reflectivity varies depending on the film thickness of the semiconductor layer 10, for example, the reflectivity of the gallium nitride substrate is 3.7% to 12.1%, and the reflectivity when SiO 2 is deposited to 50 nm on the gallium nitride substrate. The rate is 10.6%. In this specification, unless otherwise specified, the reflectance of an object means the reflectance under a resist for light having a wavelength of 405 nm.

  The electrode layer 60 is formed on the semiconductor substrate. The electrode layer 60 is a layer mainly composed of aluminum (Al). In the present embodiment, the thickness of the electrode layer 60 is 500 nm. Hereinafter, the electrode layer 60 is also referred to as an electrode 60.

A2. Manufacturing method of semiconductor device 100:
FIG. 2 is a diagram schematically showing the method for manufacturing the semiconductor device 100 in the present embodiment. In FIG. 2, a schematic diagram is shown on the right side of each step in the flowchart. In step S100, a resist pattern 150 having an opening is formed on the semiconductor substrate 10 prepared in advance using a resist.

  In the present embodiment, a chemically amplified negative resist is used as the resist. A negative resist refers to a photoresist whose solubility in a developing solution is reduced by exposure and a photosensitized portion remains. A chemically amplified resist refers to a photoresist that reacts efficiently by chemical reaction even under conditions with a small amount of exposure. The resist is applied to the semiconductor layer 10 by spin coater or spraying.

  In step S100, a reaction is caused by irradiating the resist with light. By this reaction, a resist pattern 150 is formed.

  The angle of the side surface of the resist pattern 150 opening with respect to the semiconductor substrate 10 can be controlled based on the exposure amount when the resist pattern 150 is produced. Specifically, as the exposure amount is increased, the side surface of the opening portion of the resist pattern 150 becomes closer to the vertical. When the exposure amount is large, the light reaches the deep part of the resist pattern 150, so that it is presumed that the side surface of the opening part of the resist pattern 150 approaches the vertical. On the other hand, when the exposure amount is small, it is estimated that the side surface of the opening portion of the resist pattern 150 becomes gentle because light does not easily reach the deep portion of the resist pattern 150.

  In step S110, the electrode layer 60 is formed by directional vapor deposition on the semiconductor substrate 10 exposed through the opening generated in step S100. In this embodiment, aluminum is used as the vapor deposition material. When the electrode layer 60 is formed by directional vapor deposition, the electrode metal layer 160 is laminated on the resist pattern 150.

  The angle of the side surface of the electrode 60 can be controlled based on the angle of the side surface of the opening portion of the resist pattern 150 with respect to the semiconductor substrate 10. Specifically, the angle of the side surface of the electrode 60 becomes gentler as the angle of the side surface of the opening of the resist pattern 150 with respect to the semiconductor substrate 10 becomes closer to the vertical. When the angle of the side surface of the resist pattern 150 opening with respect to the semiconductor substrate 10 is nearly vertical, it is presumed that the side surface of the electrode 60 becomes gentle because the vapor deposition material does not easily reach the vicinity of the side surface of the opening. On the other hand, when the angle of the side surface of the opening portion of the resist pattern 150 with respect to the semiconductor substrate 10 is gentle, the deposition material easily reaches the vicinity of the side surface of the opening portion.

  In step S120, the resist pattern 150 is removed. In this step, by dissolving the resist pattern 150, the resist pattern 150 is removed, and the electrode metal layer 160 laminated on the resist pattern 150 is simultaneously removed (lifted off).

B. Evaluation test:
FIG. 3 is a cross-sectional view schematically showing the configuration of the sample 50 used in the evaluation test. FIG. 3 shows the XYZ axes as in FIG. The sample 50 includes a substrate 210, an electrode 240, a resist pattern 250, and an electrode metal layer 260. Note that the resist angle θ is an angle of the side surface of the opening with respect to the substrate 210. The electrode angle φ is the angle of the side surface of the electrode 240 with respect to the substrate 210.

  The substrate 210 is made of gallium nitride having a reflectance of 3.7%, and the resist pattern 250 is made of a chemically amplified negative resist. The electrode 240 and the electrode metal layer 260 are made of aluminum (Al), and the thickness of the electrode 240 and the electrode metal layer 260 after vapor deposition is 500 nm. Hereinafter, a method for manufacturing the sample 50 will be described in detail.

  A spin coater was used to apply the resist onto the substrate 210. After applying the resist so that the film thickness of the resist pattern 250 was 2200 nm, pre-baking was performed at 100 ° C. for 90 seconds.

Thereafter, the substrate 210 was exposed using a reduced projection exposure apparatus having an exposure wavelength of 405 nm and a numerical aperture (NA) of 0.16. Next, a PEB (Post Exposure Bake) process, which is a process for promoting the polymerization of resist after exposure, is performed at 110 ° C. for 90 seconds, and then an aqueous solution of tramethylammonium hydroxide (trade name: NMD-3 (Tokyo Ohka Kogyo Co., Ltd. The paddle development was performed for 120 seconds using Finally, post baking was performed at 100 ° C. for 90 seconds to form a resist pattern. In this test, a plurality of samples 50 were produced. Specifically, as the exposure amount was 120 mJ / cm ^2, and those with 160 mJ / cm ^2, and those with 200 mJ / cm ^2, the four samples 50 and those with 220 mJ / cm ² Produced.

  The vapor deposition was performed with a directional EB (Electron Beam) vapor deposition apparatus so that the electrode metal aluminum (Al) had a thickness of 500 nm. The sample 50 includes a resist pattern 250 and an electrode metal layer 260, which can be removed by the following method, for example. Specifically, the resist and electrode metal material on the substrate can be removed by using a lift-off device that sprays NMP (N-Methyl-2-Pyrrolidone) for 4 minutes at a pressure of 5 MPa by a jet nozzle.

FIG. 4 is a view showing cross sections of samples 50 having different exposure amounts. Leftmost image exposure are shown a sample 50 which was 120 mJ / cm ^2, the center of the image, exposure to show the 160 mJ / cm ² and the sample 50, the right edge of the image, the exposure dose 220 mJ / cm ² Sample 50 is shown.

FIG. 5 is a diagram showing the relationship between the resist angle θ (see FIG. 3) and the electrode angle φ (see FIG. 3) with respect to the exposure amount. The vertical axis represents the resist angle θ and the electrode angle φ (°), and the horizontal axis represents the exposure dose (mJ / cm ² ).

  The result of this test shows that the resist angle θ can be controlled based on the exposure amount. That is, as the exposure amount increases, the side surface of the opening of the resist pattern approaches perpendicularly. Further, the result of this test shows that the electrode angle φ can be controlled based on the resist angle θ. That is, the angle of the side surface of the electrode becomes gentler as the side surface in the opening of the resist pattern becomes closer to the vertical.

In the results of this test, at least, the exposure amount by controlling the 120 mJ / cm ² to 220 mJ / cm ^2, it can be seen that controls the electrode angle φ from 80 ° to 70 °. For this reason, electrodes having different cross-sectional shapes can be created using the same resist.

C. Variations:
The present invention is not limited to the above-described embodiment, and can be implemented in various forms without departing from the gist thereof. For example, the following modifications are possible.

C1. Modification 1:
In the present embodiment, aluminum (Al) is used as the electrode metal. However, the present invention is not limited to this. That is, gold (Au), silver (Ag), copper (Cu) may be used as the electrode metal, and other metals may be used.

C2. Modification 2:
In this embodiment, the semiconductor uses gallium nitride which is a group III nitride. However, the present invention is not limited to this. As the semiconductor, for example, a group III nitride such as aluminum nitride or indium nitride may be used, and silicon, gallium arsenide, silicon carbide, or the like may be used. That is, as the semiconductor substrate, a non-transparent substrate may be used, or a substrate obtained by combining a plurality of semiconductor substrates may be used.

C3. Modification 3:
In the present embodiment, the film thickness of each layer of the semiconductor device 100 is defined. However, the present invention is not limited to this. The film thickness of each layer of the semiconductor device 100 may be changed as appropriate.

C4. Modification 4:
In this embodiment, the exposure wavelength is 405 nm. However, the present invention is not limited to this. The exposure wavelength may be any wavelength that cures the resist, and examples thereof include 436 nm, 365 nm, 254 nm, 248 nm, 193 nm, 157 nm, and 13.5 nm.

C5. Modification 5:
In the evaluation test, and test the exposure amount as 220 mJ / cm ² from 120 mJ / cm ^2. However, the present invention is not limited to this. The exposure amount may be an amount that cures the resist.

C6. Modification 6:
In this embodiment, the resist angle θ is controlled by the exposure amount, but it may be performed by a photolithography process such as heat treatment or development.

C7. Modification 7:
In the present embodiment, the semiconductor device 100 uses an FET. However, the present invention is not limited to this. That is, the semiconductor device 100 may be a semiconductor. Examples of semiconductors other than FETs include bipolar transistors, IGBTs (Insulated Gate Bipolar Transistors), LEDs (Light Emitting Diodes), PIN (p-intrinsic-n) diodes, and Schottky barrier diodes.

  The present invention is not limited to the above-described embodiments and modifications, and can be realized with various configurations without departing from the spirit thereof. For example, the technical features in the embodiments and the modifications corresponding to the technical features in each embodiment described in the summary section of the invention are to solve some or all of the above-described problems, or In order to achieve part or all of the effects, replacement or combination can be performed as appropriate. Further, if the technical feature is not described as essential in the present specification, it can be deleted as appropriate.

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate 50 ... Sample 60 ... Electrode layer 100 ... Semiconductor device 210 ... Substrate 240 ... Electrode 250 ... Resist pattern 260 ... Electrode metal layer θ ... Resist angle φ ... Electrode angle

Claims (3)

A semiconductor device manufacturing method for manufacturing a semiconductor device including an electrode on a semiconductor substrate,
(I) forming a resist pattern having an opening on the semiconductor substrate using a resist;
(Ii) forming an electrode by directional vapor deposition on the semiconductor substrate exposed through the opening;
(Iii) removing the resist pattern,
In step (i), an angle of the side surface of the opening with respect to the semiconductor substrate is controlled based on an exposure amount when the resist pattern is produced,
In step (ii), the angle of the side surface of the electrode is controlled based on the angle of the side surface of the opening ,
The semiconductor substrate is a transparent substrate, and is a nitride gallium substrate having a reflectance of 3.7% to 12.1% under the resist with respect to light having a wavelength of 405 nm,
In step (i), the exposure wavelength of making the resist pattern is 405 nm, exposure amount, 120 mJ / cm ² from Ru 220 mJ / cm ² der method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the resist is a negative resist. A method of manufacturing a semiconductor device according to claim 1 or 2,
The method for manufacturing a semiconductor device, wherein the resist is a chemically amplified negative resist.