JP6977755B2 - Multilayer ceramic capacitors - Google Patents

Description

The present invention relates to a monolithic ceramic capacitor.

In recent years, there has been a demand for a multilayer ceramic capacitor having a large capacity and a small size. In such a laminated ceramic capacitor, for example, ceramic layers for inner layers (dielectric ceramic layers) and internal electrodes are alternately stacked, and ceramic layers for outer layers are arranged on the upper surface and the lower surface thereof to form a rectangular shape. It has a ceramic element body, and external electrodes are formed on both end faces of the ceramic element body. Side margin portions are formed on both side surfaces of the ceramic element body in order to prevent connection with external electrodes.

As a method for manufacturing a monolithic ceramic capacitor as described above, the manufacturing method described in Patent Document 1 is disclosed. That is, in this method of manufacturing a laminated ceramic capacitor, a plurality of ceramic green sheets having a conductive film formed on the surface as an internal electrode are laminated to form a mother laminated body, and an external electrode is used to cut the mother laminated body. Is cut so that the conductive film is exposed on the side surface where the film is not formed. Then, the ceramic slurry serving as the side margin portion is applied to both side surfaces thereof to form a uniform side margin portion with little variation.

Japanese Unexamined Patent Publication No. 61-248413

However, in the method for manufacturing a multilayer ceramic capacitor described in Patent Document 1, the ceramic slurry used for forming the side margin portion is made of the same dielectric ceramic material as the ceramic slurry used for forming the ceramic layer for the inner layer. Has been done. In the firing step of the method for manufacturing a multilayer ceramic capacitor, when firing is performed under the condition of forming a ceramic layer for an inner layer, voids increase inside the side margin portion, so that moisture from the side margin portion passes through the gap portion. There was a problem that the penetration could not be prevented and the reliability of the monolithic ceramic capacitor was lowered.

Therefore, a main object of the present invention is to provide a laminated ceramic capacitor capable of more precisely sintering a laminated chip having a side margin portion and having improved reliability.

The laminated ceramic capacitor according to the present invention is a laminated ceramic capacitor including a laminated body including a plurality of laminated dielectric layers and a plurality of internal electrodes, and an external electrode electrically connected to the internal electrode. The laminated body is orthogonal to the first main surface and the second main surface facing each other in the stacking direction, the first side surface and the second side surface facing each other in the width direction orthogonal to the stacking direction, and the stacking direction and the width direction. Formed in a rectangular shape including the first end face and the second end face facing each other in the length direction, the plurality of internal electrodes are an dielectric of the first internal electrode exposed to the first end face and the first internal electrode. A plurality of external electrodes are formed to cover the first end face and include electricity to the first internal electrode, including a second internal electrode exposed to the second end face so as to face each other through the body layer. A plurality of dielectric layers in the width direction, including a first external electrode connected to the surface and a second external electrode formed so as to cover the second end face and connected to the second internal electrode. A monolithic ceramic capacitor having a side margin portion arranged so as to sandwich the surface, a side margin portion having an interface extending along the stacking direction, and a distance from the interface to the first or second side surface of 5 μm or more and 20 μm or less. Is.
Further, the laminated ceramic capacitor according to the present invention is a laminated ceramic capacitor including a laminated body including a plurality of laminated dielectric layers and a plurality of internal electrodes, and an external electrode electrically connected to the internal electrode. The laminated body includes a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in a width direction orthogonal to the stacking direction, and a stacking direction and a width direction. Formed in a rectangular shape including the first end face and the second end face facing each other in the orthogonal length direction, the plurality of internal electrodes are the first internal electrode exposed to the first end face and the first internal electrode. And a second internal electrode exposed to the second end face so as to face each other through the dielectric layer, the plurality of external electrodes are formed so as to cover the first end face, and the first internal electrode. A plurality of dielectrics in the width direction, including a first external electrode electrically connected to the second external electrode and a second external electrode formed so as to cover the second end face and connected to the second internal electrode. The side margin portion is provided with a side margin portion arranged so as to sandwich the body layer, the side margin portion is provided with an interface extending along the stacking direction, and the side margin portion is a laminated ceramic capacitor containing Si.

According to the multilayer ceramic capacitor according to the present invention, a side margin portion arranged so as to sandwich a plurality of dielectric layers in the width direction is provided, and the side margin portion is provided with an interface extending along the stacking direction, and is first from the interface. Alternatively, since the distance to the second side surface is 5 μm or more and 20 μm or less, the stress applied to the multilayer ceramic capacitor can be relaxed by this interface. Therefore, it is possible to provide a monolithic ceramic capacitor with improved reliability.

According to the present invention, a laminated chip having a side margin portion can be sintered more precisely, and a laminated ceramic capacitor with improved reliability can be provided.

The above-mentioned object, other object, feature and advantage of the present invention will be further clarified from the description of the embodiment for carrying out the following invention with reference to the drawings.

It is a schematic perspective view which shows an example of the appearance of the multilayer ceramic capacitor which concerns on this invention. It is sectional drawing which shows the cross section in line AA of FIG. It is sectional drawing which shows the cross section in line BB of FIG. It is explanatory drawing for demonstrating the manufacturing method of a laminated ceramic capacitor, (a) is the perspective view which showed the state which formed the conductive film on the ceramic green sheet schematically, (b) is the conductive film. It is a perspective view schematically showing the state of stacking the ceramic green sheets in which is formed. It is a schematic perspective view which shows an example of the appearance of the laminated body chip manufactured by the manufacturing method of the laminated ceramic capacitor shown in FIG.

An example of the multilayer ceramic capacitor according to the present invention will be described. FIG. 1 shows a schematic perspective view of a laminated ceramic capacitor which is an example of the appearance of a laminated ceramic capacitor composed of a ceramic element and an external electrode, and FIG. 2 shows a cross section showing a cross section taken along the line AA of FIG. An illustrated diagram is shown. Further, FIG. 3 shows a cross-sectional schematic diagram showing a cross section taken along the line BB of FIG. 1.

The multilayer ceramic capacitor 10 according to this embodiment is roughly composed of a ceramic element 12 and external electrodes 40 and 42 formed on both end faces of the ceramic element 12, respectively.

The size of the multilayer ceramic capacitor 10 according to the present invention has dimensions in the length (L) direction, dimensions in the width (W) direction, and dimensions in the laminated (T) direction, for example, 1.6 mm × 0.8 mm × 0. There are combinations of 0.8 mm, 1.0 mm × 0.5 mm × 0.5 mm, 0.6 mm × 0.3 mm × 0.3 mm, 0.4 mm × 0.2 mm × 0.2 mm.

The ceramic element body 12 is formed in a rectangular parallelepiped shape, and has a first end face 13 and a second end face 14 extending along a width (W) direction and a stacking (T) direction, and a length (L) direction and a stacking (T) direction. ) The first side surface 15 and the second side surface 16 extending along the direction, and the first main surface 17 and the second main surface 18 extending along the length (L) direction and the width (W) direction. Have. Further, in the ceramic body 12, the first end surface 13 and the second end surface 14 face each other, the first side surface 15 and the second side surface 16 face each other, and the first main surface 17 and the second surface 17 and the second side surface 16 face each other. The main surfaces 18 of the above face each other. Further, the first side surface 15 and the second side surface 16 are orthogonal to the first end surface 13 and the second end surface 14, and the first main surface 17 and the second main surface 18 are the first end surface 13. And orthogonal to the first side surface 16. Further, it is preferable that the corners and ridges of the ceramic element 12 are rounded.

The ceramic element 12 includes a plurality of first internal electrodes 22 and a second internal electrode 24 disposed at the interface between the plurality of inner layer ceramic layers (dielectric ceramic layers) 20 and the plurality of inner layer ceramic layers 20. The inner layer portion 26 composed of the inner layer portion 26, the outer layer portions 28, 30 in which the ceramic layer for the outer layer is arranged so as to sandwich the inner layer portion 26 in the laminated (T) direction, and the inner layer portion 26 and the outer layer portion 28, 30 are widened. It is composed of side margin portions 32 and 34 in which a ceramic layer for side margins is arranged so as to be sandwiched in the W) direction. In other words, the inner layer portion 26 is a region sandwiched between the first and second internal electrodes 22 and 24 arranged on the first main surface 17 side or the second main surface 18 side. Further, the side margin portions 32 and 34 are regions where the first internal electrode 22 and the second internal electrode 24 do not exist when the ceramic element 12 is viewed from the laminated (T) direction.

The ceramic layer 20 for the inner layer is made of, for example, a dielectric ceramic particle containing a perovskite-type compound containing Ba and Ti as a main component and having a perovskite structure. Further, at least one of Si, Mg, and Ba is added to these main components as an additive, and these additives are present between the ceramic particles. The thickness of the ceramic layer 20 for the inner layer after firing is preferably 0.3 μm or more and 10 μm or less.

The outer layer portions 28 and 30 arranged above and below are each made of the same dielectric ceramic material as the inner layer ceramic layer 20. The outer layer portions 28 and 30 may be made of a dielectric ceramic material different from that of the inner layer ceramic layer 20. The thickness of the outer layer portions 28 and 30 after firing is preferably 15 μm or more and 40 μm or less.

The first internal electrode 22 and the second internal electrode 24 face each other via the inner layer ceramic layer 20 in the thickness direction. Capacitance is formed in a portion where the first internal electrode 22 and the second internal electrode 24 face each other with the inner layer ceramic layer 20 interposed therebetween.

The left end portion of the first internal electrode 22 is drawn out to the first end surface 13 of the ceramic element body 12 and is electrically connected to the external electrode 40. The right end of the second internal electrode 24 is drawn out to the second end surface 14 of the ceramic element 12 and electrically connected to the external electrode 42.

The first and second internal electrodes 22 and 24 are made of, for example, Ni, Cu, or the like. The thickness of the first and second internal electrodes 22 and 24 is preferably 0.3 μm or more and 2.0 μm or less.

The side margin portions 32 and 34 have a two-layer structure including outer portions 32a and 34a located on the side surface side of the ceramic element 12 and inner portions 32b and 34b located on the first and second internal electrodes 22 and 24 sides. be. Further, the side margin portions 32 and 34 are made of a dielectric ceramic material having a perovskite structure composed of a main component such as _{BaTiO 3 and the like.} Further, at least one of Si, Mg, and Ba is added to these main components as an additive, and these additives are present between the ceramic particles. The thickness of the side margin portions 32 and 34 after firing is preferably 5 μm or more and 40 μm or less. In particular, the present invention works effectively at 20 μm or less. Further, preferably, the inner portions 32b and 34b are thinner than the outer portions 32a and 34a, specifically, the thickness of the outer portions 32a and 34a is preferably 5 μm or more and 20 μm or less, and the thickness of the inner portions 32b and 34b is , 0.1 μm or more and 20 μm or less is preferable. Due to the difference in sinterability between the outer portions 32a and 34a and the inner portions 32b and 34b, it can be easily understood that the side margin portions 32 and 34 have a two-layer structure by using an optical microscope. Further, the side margin portions 32 and 34 may have a plurality of layers as well as two layers of the outer portions 32a and 34a and the inner portions 32b and 34b.

The thickness of the outer layer portions 28 and 30 or the thickness of the side margin portions 32 and 34 is in the direction perpendicular to the surface formed by the laminated (T) direction and the width (W) direction of the ceramic element body 12. Polish to a length of about 1/2, measure the length from the end of the internal electrode (including the end where the ceramic dielectric is diffused) to the outside every 10 layers, and use the average value. Desired.

Further, in the side margin portions 32 and 34, the gaps are reduced from the inner portion 32b toward the outer portion 32a and from the inner portion 34b toward the outer portion 34a.
As described above, when the laminated body chip on which the side margin portions 32 and 34 are formed is sintered, even if the condition is for sintering the inner layer portion provided with the internal electrode in the ceramic element body 12, this side Since the gaps can be reduced from the inside to the outside of the margin portions 32 and 34, the infiltration of water from the side margin portions 32 and 34 toward the inside of the ceramic element 12 is suppressed. The moisture resistance of the monolithic ceramic capacitor can be improved. Therefore, it is possible to provide a monolithic ceramic capacitor with improved reliability.
Here, the void portion is a situation in which the space or the portion where the glass is buried is mixed. The number of voids can be confirmed by imaging a range of 30 μm × 30 μm with an SEM at a magnification of 5000 and counting.

Further, the grain size, which is the particle size of the ceramic particles in the inner portions 32b, 34b of the side margin portions 32, 34, is smaller than the grain size in the outer portions 32a, 34a, and the fineness is increased. In particular, at the ends of the first and second internal electrodes 22 and 24 near the side margin portions 32 and 34, the grain size is smaller than the grain size of the outer portions 32a and 34a.

In this gap portion, the ceramic element 12 is polished in the same manner as when measuring the thickness of the side margin portions 32 and 34, and the external dimensions of the laminated ceramic capacitor 10 are, for example, 0.6 mm × 0.3 mm × 0.3 mm. In the case of, it can be observed by taking an SEM image at a magnification of 5000 times and counting the points that are considered to be voids.
Further, by taking an SEM image at a magnification of 20000 to 50,000 times, selecting grains in the imaging range, and calculating the average of the sizes (for example, 50 pieces), the grain sizes in the outer portions 32a and 34a and the inner portions 32b and 34b are calculated. It is possible to grasp the difference in the size of.

Further, the amount of Ba which is an additive between the ceramic layer 20 for the inner layer of the inner layer portion 26 and the ceramic particles of the outer portions 32a and 34a and the inner portions 32b and 34b of the side margin portions 32 and 34 is determined.
Ceramic layer 20 for inner layer of inner layer portion 20 <outer portion 32a, 34a <inner portion 32b, 34b,
Is.
As described above, it is preferable that the side margin portion is formed in two layers of the inner portion on the internal electrode side and the outer portion on the side surface side, and the Ba content of the inner portion is higher than the Ba content of the outer portion. By doing so, the reliability of the monolithic ceramic capacitor having the side margin portion can be improved.
That is, the Ba content between the ceramic particles made of the ceramic dielectric decreases from the inside to the outside of the side margin portion of the ceramic element 12. Therefore, when the laminated chip on which the side margin portions 32 and 34 are formed is sintered, the side margin portion 32 is provided even under the condition for sintering the inner layer portion provided with the internal electrode in the ceramic element body 12. , 34 By promoting the grain growth of the dielectric ceramic particles in the outer region, it is possible to sinter more precisely, so that the voids in the dielectric ceramic layer constituting the outer side of the side margin portion are reduced. Therefore, it is possible to prevent the intrusion of moisture from the side margin portions 32 and 34 toward the inside of the ceramic element 12.
The content of Ba, which is an additive, is different between the ceramic particles of the side margin portions 32 and 34. The difference in Ba content can be found by TEM analysis.

The Ba content in the outer portions 32a, 34a and the inner portions 32b, 34b of the side margin portions 32, 34 is such that the molar ratio to Ti: 1 mol is the center value.
The outer portions 32a and 34a are larger than Ba: 1.000 and less than 1.020.
The inner portions 32b and 34b are larger than Ba: 1.020 and less than 1.040.
It is preferable that the mixture is prepared so as to be. By doing so, the reliability of the monolithic ceramic capacitor having the side margin portion can be improved.

Further, the ceramic element 12 is polished from the side margin portions 32 and 34, and the respective powders obtained by polishing the outer portions 32a and 34a and the inner portions 32b and 34b are dissolved by an acid to perform ICP emission spectroscopic analysis. It can be confirmed that the outer portions 32a and 34a and the inner portions 32b and 34b have the above-mentioned molar ratio.

Further, in these ranges, it is preferable that the Ba content between the ceramic particles of the inner portions 32b and 34b is more than 100% and less than 140% more than that of the outer portions 32a and 34a. By doing so, the reliability of the monolithic ceramic capacitor having the side margin portion can be improved.

The external electrodes 40 and 42 are the electrode layers 40a and 42a containing Cu formed by baking, and the first plating layer containing Ni to prevent solder eating formed on the surfaces of the electrode layers 40a and 42a. It is a triple structure composed of 40b, 42b and second plating layers 40c, 42c containing Sn formed on the surface of the first plating layers 40b, 42b.

In the multilayer ceramic capacitor 10 shown in FIG. 1, the gaps decrease from the inside to the outside of the side margin portions 32 and 34. That is, in the multilayer ceramic capacitor shown in FIG. 1, since the gaps in the outer portions 32a and 34a are smaller than those in the inner portions 32b and 34b of the side margin portions 32 and 34, the side margin portions are interposed through the gap portions. The intrusion of moisture from 32 and 34 toward the inside of the ceramic element 12 is suppressed, and the moisture resistance of the multilayer ceramic capacitor 10 can be improved.

Further, in the multilayer ceramic capacitor 10 shown in FIG. 1, between the ceramic particles from the inner portions 32b, 34b of the side margin portions 32, 34 toward the outer portions 32a, 34a (that is, from the inside to the outside of the side margin portions 32, 34). Ba is decreasing. Further, Ba is diffused from the inner portions 32b and 34b to the inner layer ceramic layer 20 between the inner portions 32b and 34b and the ends of the first and second internal electrodes 22 and 24, so that the first and second parts are diffused. The amount of Ba is large in the vicinity of the side margin portions 32 and 34 of the internal electrodes 22 and 24 of 2. Therefore, the grain growth of the ceramic particles at the ends of the first and second internal electrodes 22 and 24 can be suppressed, and the reliability between the internal electrodes can be improved.

On the other hand, in the multilayer ceramic capacitor 10 shown in FIG. 1, since the outer portions 32a and 34a of the side margin portions 32 and 34 have less Ba, the grain growth of the ceramic particles is promoted and more precise sintering can be performed. Therefore, it becomes strong against the invasion of moisture from the outside.

Next, a method for manufacturing a monolithic ceramic capacitor will be described. 4A and 4B are explanatory views for explaining a method for manufacturing a multilayer ceramic capacitor, and FIG. 4A is a perspective view schematically showing a state in which a conductive film is formed on a ceramic green sheet, and FIG. 4B is a perspective view. Is a perspective view schematically showing a state in which ceramic green sheets on which a conductive film is formed are stacked. FIG. 5 is a schematic perspective view showing an example of an overview of the laminated body chips manufactured by the method for manufacturing the laminated ceramic capacitor shown in FIG. 4. Hereinafter, it will be described in detail.

(1) Formation of Ceramic Element First, a perovskite-type compound containing Ba and Ti is prepared as a dielectric ceramic material. At least one of Si, Mg, and Ba, an organic binder, an organic solvent, a plasticizer, and a dispersant are mixed in a predetermined ratio with the dielectric powder obtained from this dielectric ceramic material as an additive, and the ceramics are used. A rally is made. A plurality of ceramic green sheets 50a (50b) are formed on a resin film (not shown) of this ceramic slurry. The ceramic green sheet 50a (50b) is formed by using, for example, a die coater, a gravure coater, a microgravure coater, or the like.

Next, as shown in FIG. 4A, the conductive paste for the internal electrode is printed on the surface of the ceramic green sheet 50a (50b) in a striped shape in the X direction and dried to obtain the internal electrode 22 (24). ), The conductive film 52a (52b) is formed. As a printing method, various methods such as screen printing, inkjet printing, and gravure printing are used. The thickness of the conductive film 52a (52b) is preferably 1.5 μm or less.

Subsequently, as shown in FIG. 4B, the plurality of ceramic green sheets 50a and 50b on which the conductive films 52a and 52b are printed are perpendicular to the printing direction (X direction) of the conductive films 52a and 52b. They are shifted in the direction (width direction of the conductive films 52a and 52b: Y direction) and stacked. Further, a predetermined number of ceramic green sheets are formed on the upper and lower surfaces of the ceramic green sheets 50a and 50b which are the inner layer portions 26 laminated in this way, and if necessary, the conductive film which is the outer layer portions 28 and 30 is not formed. Stacked to obtain a mother laminate.

Next, the obtained mother laminate is pressed. As a method of pressing the mother laminated body, a method such as a rigid body press or a hydrostatic pressure press is used.

Subsequently, the pressed mother laminate is cut into a chip shape, and the laminate chip 60 as shown in FIG. 5 is obtained. As a method for cutting the mother laminate, various methods such as push-cutting, dicing, and laser are used.

Through the above steps, only the conductive film 52a of the ceramic green sheet 50a is exposed on one end surface, which is both end faces of the laminated chip 60, and only the conductive film 52b of the ceramic green sheet 50b is exposed on the other end surface. It will be an exposed surface.
Further, on both side surfaces of the laminated chip 60, the conductive films 52a of the ceramic green sheet 50a and the conductive films 52b of the ceramic green sheet 50b are exposed.

(2) Formation of Side Margins Next, side margin ceramic green sheets to be side margins 32 and 34 are prepared. Hereinafter, a more detailed description will be given.

First, a perovskite-type compound containing Ba and Ti is prepared as a dielectric ceramic material. At least one of Si, Mg, and Ba, a binder resin, an organic solvent, a plasticizer, and a dispersant are mixed in a predetermined ratio with the dielectric powder obtained from this dielectric ceramic material as an additive, and the ceramics are used. A rally is made.

Here, in the ceramic slurry serving as the outer portions 32a and 34a of the side margin portions 32 and 34, the molar ratio of Ba is adjusted to be larger than Ba: 1.000 and less than 1.020 with respect to Ti: 1 mol. Further, in the ceramic slurry serving as the inner portions 32b and 34b of the side margin portions 32 and 34, the molar ratio of Ba is adjusted to be larger than Ba: 1.020 and less than 1.040 with respect to Ti: 1 mol.

Further, the amount of polyvinyl chloride (PVC) contained in the ceramic slurry serving as the outer portions 32a and 34a of the side margin portions 32 and 34 is included in the ceramic slurry serving as the inner portions 32b and 34b of the side margin portions 32 and 34. It contains more than the amount of polyvinyl chloride (PVC).

Further, as the solvent contained in the ceramic slurry serving as the inner portions 32b and 34b of the side margin portions 32 and 34, the optimum solvent is appropriately selected in order to prevent the sheet from attacking the ceramic green sheet for the outer portion. Further, the ceramic green sheet for the inner portion has a role of adhering to the laminated body chip 60.

Then, the ceramic slurry produced to be the outer portions 32a and 34a of the side margin portions 32 and 34 is applied onto the resin film and dried to produce a ceramic green sheet for the outer portion.

Next, the ceramic slurry prepared to be the inner portions 32b and 34b of the side margin portions 32 and 34 is applied to the surface of the ceramic green sheet for the outer portion and dried to form the ceramic green sheet for the inner portion. As a result, a ceramic green sheet for a side margin having a two-layer structure is produced.

Here, the thickness of the ceramic green sheet for the inner portion is formed to be thinner than the thickness of the ceramic green sheet for the outer portion. For example, the thickness of the ceramic green sheet for the outer part is formed so that the thickness after firing is 5 μm or more and 20 μm or less, and the thickness of the ceramic green sheet for the inner part is 0.1 μm or more and 20 μm or less after firing. Is formed to be. It is preferable that the ceramic green sheet for the outer portion is thicker than the ceramic green sheet for the inner portion. Further, there is an interface between the outer portions 32a and 34a and the inner portions 32b and 34b, and the stress applied to the multilayer ceramic capacitor 10 can be relaxed by this interface.

The ceramic green sheet for the side margin having the above-mentioned two-layer structure was produced by printing the ceramic green sheet for the inner part on the surface of the ceramic green sheet for the outer part. Ceramic green sheets for side margins may be produced by forming each of them in advance and then laminating each of them to form a ceramic green sheet for side margin having a two-layer structure.

Next, the side margin ceramic green sheet is peeled off from the resin film.

Subsequently, one side surface or the other side surface where the conductive films 52a and 52b of the laminated chip 60 are exposed is pressed against the ceramic green sheet for the inner portion of the peeled ceramic green sheet for the side margin and punched out. , A layer serving as the side margin portions 32 and 34 is formed. At this time, it is preferable to apply an organic solvent as an adhesive to the side surface of the laminated chip 60 in advance.

Next, the laminated chip 60 on which the layers to be the side margin portions 32 and 34 are formed is degreased under predetermined conditions in a nitrogen atmosphere, and then has a predetermined temperature in a nitrogen-hydrogen-steam mixed atmosphere. The ceramic body 12 is fired and sintered.

Next, an external electrode paste containing Cu as a main component is applied to both ends of the sintered ceramic body 12, and the paste is baked and electrically connected to the first and second internal electrodes 22 and 24, respectively. The electrode layers 40a and 42a are formed. Further, the first plating layers 40b and 42b by Ni plating are formed on the surfaces of the electrode layers 40a and 42a, and the second plating layers 40c and 42c by Sn plating are formed on the surfaces of the first plating layers 40b and 42b. The external electrodes 40 and 42 are formed.

As described above, the monolithic ceramic capacitor 10 shown in FIG. 1 is manufactured.

The side margin portions 32 and 34 can also be formed by applying a ceramic slurry for the side margin on both side surfaces of the laminated chip 60 where the conductive films 52a and 52b are exposed.

That is, the ceramic slurries to be the inner portions 32b and 34b are applied to both side surfaces of the laminated chip 60 where the conductive films 52a and 52b are exposed, dried, and further coated with the ceramic slurries to be the outer portions 32a and 34a. Will be done.

In this case, the thickness of the ceramic slurries of the inner portions 32b and 34b or the thickness of the ceramic slurries of the outer portions 32a and 34a can be adjusted by adjusting the amount of the resin contained in each of the ceramic slurries. ..

Further, to form the side margin portions 32 and 34, after masking both end surfaces of the laminated body chip 60 with a resin or the like, the laminated body chip 60 is completely dipped into the ceramic slurry to be the inner portions 32b and 34b and dried. Further, it may be formed by dipping in the ceramic slurry which becomes the outer portions 32a and 34a. In this case, the side margin portions 32 and 34 are formed in a two-layer structure so as to cover the outer layer portions 28 and 30 as well.

(Experimental example)
1. 1. Examples and Comparative Examples In the experimental examples, each sample of the multilayer ceramic capacitors of Examples and Comparative Examples shown below was manufactured and evaluated by a moisture resistance load test of the multilayer ceramic capacitors.

(Example)
In the embodiment, the monolithic ceramic capacitor 10 shown in FIG. 1 was manufactured by the above method. In this case, the external dimensions of the monolithic ceramic capacitor 10 are 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height. In the examples, with respect to Ba as an additive in the side margin portions 32 and 34, the molar ratio of Ba to Ti: 1 mol was 1.020 for the outer portions 32a and 34a and 1.028 for the inner portions 32b and 34b. .. The thickness of the side margin portions 32 and 34 was 20 μm, the thickness of the outer portions 32a and 34a was 16 μm, and the thickness of the inner portions 32b and 34b was 4 μm. The thickness of the ceramic layer 20 for the inner layer is 0.83 μm per layer, and the thickness of the first and second internal electrodes 22 and 24 per layer is 0.40 μm, and the outer layer portion 28 and the outer layer portion 30 are set. The thickness of each was 25 μm. The thickness values are all values after firing. The number of layers of the ceramic layer 20 for the inner layer was 280.

(Comparative example)
In the comparative example, a monolithic ceramic capacitor was manufactured under the same conditions as in the examples except that the molar ratio of Ba to Ti: 1 mol was uniformly set to 1.020 for Ba, which is an additive for the side margin portion.

(Moisture resistance load test)
Moisture resistance load tests were performed on each sample of Examples and Comparative Examples. The conditions of the moisture resistance load test were a relative humidity of 95% and a temperature of 40 degrees, and a rated voltage of 6.3 V was applied. Then, the insulation resistance value of each sample was measured, and when ^{the insulation resistance deteriorated within 1.0 × 10 6} [Ω], it was determined to be defective. For this moisture resistance load test, 36 samples of each of Examples and Comparative Examples were prepared.

As a result of the moisture resistance load test, in the laminated ceramic capacitor of the comparative example, the number of samples judged to be defective was 36 out of 36.

On the other hand, in the multilayer ceramic capacitor of the example, the number of samples determined to be defective was 0 out of 36.
Therefore, in all the samples in the examples, a highly reliable multilayer ceramic capacitor could be obtained.

The present invention is not limited to the above embodiment, and is variously modified within the scope of the gist thereof. Further, the thickness, the number of layers, the area of the counter electrode, and the external dimensions of the ceramic layer of the ceramic electronic component are not limited thereto.

10 Multilayer ceramic capacitor 12 Ceramic element 13 First end surface 14 Second end surface 15 First side surface 16 Second side surface 17 First main surface 18 Second main surface 20 Inner layer ceramic layer 22 First interior Electrode 24 Second internal electrode 26 Inner layer 28, 30 Outer layer 32, 34 Side margin 32a, 34a Outer 32b, 34b Inner 40, 42 External electrode 40a, 42a Electrode layer 40b, 42b First plating layer 40c , 42c Second Plating Layer 50a, 50b Ceramic Green Sheet 52a, 52b Conductive 60 Laminated Chip

Claims (11)

A laminated body including a plurality of laminated dielectric layers and a plurality of internal electrodes,
A monolithic ceramic capacitor with an external electrode electrically connected to the internal electrode.
The laminated body has a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in a width direction orthogonal to the stacking direction, and orthogonal to the stacking direction and the width direction. It is formed in a rectangular parallelepiped shape including a first end face and a second end face facing each other in the length direction to be formed.
The plurality of internal electrodes are exposed to the first internal electrode exposed to the first end surface and the second end surface so as to face the first internal electrode via a dielectric layer. Including internal electrodes
The plurality of external electrodes are formed so as to cover the first end face, and are formed so as to cover the first external electrode electrically connected to the first internal electrode and the second end face. And includes a second external electrode connected to the second internal electrode.
A side margin portion arranged so as to sandwich the plurality of dielectric layers in the width direction is provided.
A monolithic ceramic capacitor having an interface extending along the laminating direction in the side margin portion. A laminated body including a plurality of laminated dielectric layers and a plurality of internal electrodes,
A monolithic ceramic capacitor with an external electrode electrically connected to the internal electrode.
The laminated body has a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in a width direction orthogonal to the stacking direction, and orthogonal to the stacking direction and the width direction. It is formed in a rectangular parallelepiped shape including a first end face and a second end face facing each other in the length direction to be formed.
The plurality of internal electrodes are exposed to the first internal electrode exposed to the first end surface and the second end surface so as to face the first internal electrode via a dielectric layer. Including internal electrodes
The plurality of external electrodes are formed so as to cover the first end face, and are formed so as to cover the first external electrode electrically connected to the first internal electrode and the second end face. And includes a second external electrode connected to the second internal electrode.
The laminated body includes a plurality of the dielectric layers and an inner layer portion composed of a plurality of the first internal electrodes and a plurality of the second internal electrodes arranged at the interface between the plurality of dielectric layers.
Including the outer layer portion arranged so as to sandwich the inner layer portion in the stacking direction.
And a said outer layer portion and side margin portions disposed so as to sandwich the plurality of internal electrodes exposed in the width direction,
The side margin portion is provided with an interface extending along the stacking direction.
The side margin portion is a monolithic ceramic capacitor containing Si. The multilayer ceramic capacitor according to claim 1 or 2, wherein the thickness of the dielectric layer is 0.3 μm or more and 10 μm or less. The multilayer ceramic capacitor according to claim 1 or 2, wherein the thickness of the internal electrode is 0.3 μm or more and 2.0 μm or less. The first or second aspect of the present invention, wherein the side margin portion is formed by adhering a ceramic slurry or a ceramic green sheet to both side surfaces of the laminate in which the conductive film for the internal electrode is exposed. Multilayer ceramic capacitors. The laminated body includes a plurality of the dielectric layers and an inner layer portion composed of a plurality of the first internal electrodes and a plurality of the second internal electrodes arranged at the interface between the plurality of dielectric layers.
An outer layer portion arranged so as to sandwich the inner layer portion in the stacking direction, and an outer layer portion.
The monolithic ceramic capacitor according to claim 1. The multilayer ceramic capacitor according to claim 2 or 6, wherein the thickness of the outer layer portion is 15 μm or more. The multilayer ceramic capacitor according to claim 2 or 6, wherein the thickness of the outer layer portion is 40 μm or less. The multilayer ceramic capacitor according to claim 2 or 6, wherein the outer layer portion is made of the same dielectric ceramic material as the dielectric layer constituting the inner layer portion. The multilayer ceramic capacitor according to claim 2 or 6, wherein the outer layer portion is made of a dielectric ceramic material different from the dielectric layer constituting the inner layer portion. The side margin portion is composed of two layers, an inner portion on the inner electrode side and an outer portion on the side surface side of the laminated body, and the grain size in the inner portion is smaller than the grain size in the outer portion, claim 1 to 1. The monolithic ceramic capacitor according to any one of claims 10.

Images