JP7679708B2 - Power Conversion Equipment - Google Patents

Description

This disclosure relates to a power conversion device.

The modular multilevel converter (MMC) is a next-generation transformerless power converter suitable for large-capacity, high-voltage applications. The MMC can be applied to, for example, static synchronous compensators (STATCOM) and high-voltage direct current (HVDC) systems. In particular, the delta-connected MMC has attracted attention because it can output a negative-phase reactive current by passing a circulating current through the delta connection. The delta-connected MMC has a delta connection inside, and one or multiple converter cells connected in series are provided on each phase of the delta connection (see, for example, Patent Document 1).

On the other hand, in a reactive power compensation device that suppresses voltage fluctuations in a power system, a current limiting circuit is known that limits the instantaneous value of the output current to a predetermined value (see, for example, Patent Document 2). When a reactive power compensation device outputs a negative-phase current and performs three-phase unbalanced operation, the peak values of the currents of the three phases become uneven. Furthermore, when three-phase balanced operation is performed, the offset third harmonic is output, and the peak value of the actual current value no longer matches the peak value of the current command value. Therefore, from the viewpoint of device protection, it is necessary to monitor the actual output current value of the reactive power compensation device, and quickly narrow down the current command value when any one of the phase currents exceeds the limit setting value.

The current limiting circuit disclosed in Patent Document 2 is a circuit that generates a limiting signal to be multiplied with the current command value of the reactive power compensation device from the three-phase full-wave rectified signal of the output current of the reactive power compensation device in order to perform this current limiting. When the three-phase full-wave rectified signal of the output current exceeds the current limit setting value, the current limiting circuit reduces the limiting signal to be multiplied with the current command value of the reactive power compensation device, thereby limiting the current command value.

International Publication No. 2012/099176 Patent No. 3334005

However, in an MMC, a circulating current flows through the delta connection, so even if the AC output current to the power grid is limited as in Patent Document 2, harmonics may occur in the converter cell current (current flowing through the converter cell), which includes the circulating current.

This disclosure provides a power conversion device that can reduce harmonic currents flowing through a converter cell.

In one aspect of the present disclosure,
a delta connection portion in which one or a plurality of converter cells connected in series are delta-connected;
a control device that controls a circulating current flowing through the delta connection by a plurality of converter cells included in the delta connection ,
The converter cell includes a plurality of semiconductor switch groups each including a plurality of semiconductor switches connected in series, and a capacitor connected in parallel to the plurality of semiconductor switch groups,
The control device limits the current commands of a plurality of converter cells included in the delta connection portion by using positive and negative phase orthogonal two-axis current commands and a circulating current command that is a command for the circulating current.

According to one aspect of the present disclosure, it is possible to reduce harmonic currents flowing through a converter cell.

1 is a diagram illustrating a configuration example of a power conversion device according to an embodiment; FIG. 2 is a diagram illustrating an example of the configuration of a control device. FIG. 4 is a diagram illustrating an example of the configuration of a current command unit. 5A and 5B are diagrams illustrating examples of operational waveforms of a current command unit. FIG. 1 illustrates a conventional current limiting circuit. 1 is a diagram showing an example of operational waveforms of a conventional current limiting circuit applied to a delta-connected MMC;

Embodiments of the present disclosure will be described below with reference to the drawings.

Figure 1 is a diagram showing an example of the configuration of a power conversion device in one embodiment, and shows an example of the circuit configuration of a delta-connected MMC. The MMC can be applied to, for example, a static var compensator (STATCOM) or a high-voltage direct current (HVDC) transmission system. The power conversion device 400 shown in Figure 1 includes a delta connection section 402 and a control device 401.

The delta connection unit 402 is a circuit in which one or more converter cells connected in series are delta-connected. The delta connection unit 402 includes a plurality of clusters 50 (50UV, 50VW, 50WU) and a plurality of reactors 51 (51UV, 51VW, 51WU).

The UV-phase cluster 50UV has a plurality of converter cells _52UV1 , 52UV2, ... 52UVx connected in series via a pair of AC output terminals a, b. Three converter cells 52UV1, _52UV2 , _52UV3 are illustrated in Fig. _1. The VW-phase cluster 50VW has a plurality of converter cells _52VW1 , _52VW2 , _{... 52VWx} connected in series via a pair of AC output terminals a, b. Three converter cells _52VW1 , _52VW2 , _52VW3 are illustrated in Fig. 1. The WU-phase cluster 50WU has a plurality of converter cells _52WU1 , _52WU2 , ... _52WUx connected in series via a pair of AC output terminals a, _b . 1 illustrates three converter cells 52WU ₁ , 52WU ₂ , and 52WU _3. x represents the number of converter cells connected in series in each cluster, and is an integer equal to or greater than 1. In other words, the number of converter cells in one cluster may be as small as one.

Each of the converter cells 52 (52UV ₁ to 52UV _x , 52VW ₁ to 52VW _x , 52WU ₁ to 52WU _x ) has a pair of AC output terminals a, b, and is connected in series via the pair of AC output terminals a, b. Each of the converter cells 52 has its first AC output terminal a connected to the second AC output terminal b of an adjacent converter cell, and its second AC output terminal b connected to the first AC output terminal a of the other adjacent converter cell.

Cluster 50UV, cluster 50VW, and cluster 50WU are delta-connected via reactors 51UV, 51VW, and 51WU, and are connected to grid 300. Connection to grid 300 may be via a transformer (not shown). In the delta connection, a circulating current flows within the delta connection. The control device 401 can adjust the negative-phase reactive current by controlling the circulating current flowing through the delta connection 402 by switching multiple converter cells 52.

Each of the converter cells 52 has a power conversion circuit having multiple switching elements and a drive circuit that operates the power conversion circuit. The converter cells 52 have the same configuration. The switching element is, for example, a semiconductor switch having a transistor and a diode connected in anti-parallel to the transistor. Specific examples of transistors include an IGBT (Insulated Gate Bipolar Transistor) and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

Each converter cell 52 has the function of converting the DC power in the capacitor 54 into AC power and outputting it to a pair of AC output terminals a, b, and the function of converting the AC power input from the pair of AC output terminals a, b into DC power and supplying it to the capacitor 54.

Each converter cell 52 has a pair of AC output terminals a, b, a capacitor 54, a power conversion circuit 53, and a drive circuit section (not shown) (e.g., a GDU (Gate Drive Unit) and a power supply circuit, etc.).

Capacitor 54 is a capacitive element connected to a pair of AC output terminals a, b via power conversion circuit 53.

The power conversion circuit 53 is an inverter circuit that is connected between the capacitor 54 and a pair of AC output terminals a, b and converts power in both directions between DC and AC. The power conversion circuit 53 is connected in parallel to the capacitor 54. FIG. 1 illustrates a full bridge circuit having multiple switching elements 56.

The power conversion circuit 53 has a plurality of semiconductor switch groups 55 each including a plurality of semiconductor switches connected in series. The plurality of semiconductor switch groups 55 are connected in parallel to the capacitor 54. The power conversion circuit 53 shown in FIG. 1 has a full-bridge configuration in which a first semiconductor switch group including a plurality of switching elements 56 connected in series and a second semiconductor switch group including a plurality of switching elements 56 connected in series are connected in parallel. A first AC output terminal a is connected to a connection point between the switching element 56 of the first upper arm and the switching element 56 of the first lower arm. A second AC output terminal b is connected to a connection point between the switching element 56 of the second upper arm and the switching element 56 of the second lower arm.

The multiple switching elements 56 illustrated in FIG. 1 are IGBTs with diodes connected in inverse parallel, but they may also be switching elements with switching functions such as MOSFETs or thyristors.

At least one of the switching element and the anti-parallel diode is preferably an element including a wide band gap semiconductor such as SiC (silicon carbide), GaN (gallium nitride), Ga ₂ O ₃ (gallium oxide), or diamond. By applying a wide band gap semiconductor to the switching element, the effect of reducing loss in the switching element is enhanced. The switching element may be an element including a semiconductor such as Si (silicon). Similarly, by applying an element including a wide band gap semiconductor to a diode, the effect of reducing loss in the diode is enhanced. The diode may be an element including a semiconductor such as Si (silicon).

Each converter cell 52 is equipped with a drive circuit section (not shown), such as a GDU and a power supply circuit.

The GDU is a drive circuit that drives the power conversion circuit 53, and more specifically, is a gate drive circuit that drives the gates of multiple switching elements 56 configured in the power conversion circuit 53. The GDU drives multiple switching elements 56 configured in the power conversion circuit 53 based on the power supplied from the capacitor 54 via the power supply circuit.

The GDU applies a voltage between the gate and emitter of a corresponding one of the multiple switching elements 56 in accordance with a control signal from the control device 401, thereby turning the corresponding switching element on or off. This operation generates a square-wave voltage between a pair of AC output terminals a, b of the converter cell 52.

The control device 401 is a controller that generates control signals (e.g., PWM signals (pulse width modulated signals)) that turn on or off the multiple switching elements 56 according to a carrier period Tc (the inverse of the carrier frequency) common to the multiple converter cells 52. The control device 401 has a memory and a processor (e.g., a CPU (Central Processing Unit)). Each function of the control device 401 is realized by the processor operating according to a program stored in the memory. The functions of the control device 401 may be realized by an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

The power conversion device 400 can output a multilevel voltage waveform with reduced harmonics and a voltage equal to or higher than the withstand voltage of the switching element by causing each of the multiple converter cells 52 to output voltage waveforms with different phases from each other using the control device 401. Therefore, the power conversion device 400 can be applied to, for example, a reactive power compensation device or a DC transmission system that is directly connected to an extra-high voltage system.

In addition, in an MMC, when compensating for the negative-phase-sequence current, a steadily non-zero active power flows into each phase, which can cause fluctuations in the voltage of capacitor 54. As a countermeasure, the control device 401 of the power conversion device 400 controls the circulating current (zero-phase-sequence current) flowing through the delta connection 402 to maintain the orthogonal relationship between the AC voltage and AC current of each phase and maintain the voltage balance of capacitor 54.

Figure 2 is a diagram showing an example of the configuration of a control device. The control device 401 shown in Figure 2 has a current command unit 420 and a converter control unit 410.

The current command unit 420 generates converter cell current commands (iuv ^* , ivw ^* , iwu ^* ) from the positive and negative phase orthogonal two-axis current commands ( _Id , _Iq , _Ind , _Inq ). The converter cell current commands are command values for the currents (converter cell currents) flowing through one or more converter cells 52 of each phase.

The converter control unit 410 calculates the deviation between the converter cell current command for each phase and the detected value of the converter cell current for each phase, and generates a voltage command value for each phase that makes each deviation zero. The converter control unit 410 supplies each converter cell 52 with a control signal (e.g., a PWM signal) that turns on or off the multiple switching elements 56 in each converter cell 52 according to the voltage command value for each phase.

Figure 3 is a diagram showing an example of the configuration of the current command unit. The current command unit 420 shown in Figure 3 has dq inverse transform units 37 and 38, a circulating current command calculation unit 39, a two-axis instantaneous value calculation unit 40, adders 47 and 48, a multiplier 41, a maximum value detection unit 45, an asymmetric filter 46, a divider 43, and an upper and lower limiter 42.

The current command unit 420 acquires the positive-phase and negative-phase orthogonal two-axis current commands ( _Id , _Iq , _Ind , _Inq ) set by an external current command setting unit. The current command unit 420 adds together a positive-phase AC current command obtained by performing a dq inverse transformation on the positive-phase current commands ( _Id , _Iq ) by the dq inverse transformation unit 37, a negative-phase AC current command obtained by performing a dq inverse transformation on the negative-phase current commands ( _Ind , _Inq ) by the dq inverse transformation unit 38, and a circulating current command ( _iz ) calculated by the circulating current command calculation unit 39, by using adders 47 and 48. The current command unit 420 adds these together to derive converter cell current commands (iuv, ivw, iwu) before limitation. The current command unit 420 derives the post-limiting converter cell current commands (iuv ^* , ivw ^* , iwu ^* ) by multiplying the pre-limiting converter cell current commands (iuv, ivw, iwu) by the limiting signal K using the multiplier 41. Next, a method for deriving each signal will be described.

The line voltages v _uv , v _vw , and v _wu of the delta connection 402 are defined as follows:

とする。Ｖは線間電圧の振幅、ωは角周波数、ｔは時間を表す。

V represents the amplitude of the line voltage, ω represents the angular frequency, and t represents the time.

The currents i _uv , i _vw , and i _wu flowing into each phase of the delta connection 402 are expressed as follows:

とする。Ｉは線間電流の振幅、φは位相を表す。

Here, I represents the amplitude of the line current, and φ represents the phase.

A circulating current command i _z , which is a command for a circulating current to be passed through the delta connection 402, is expressed as follows:

とする。Ｉ_ｚ０は循環電流の振幅、φ_ｚ０は位相を表す。

Here, I _z0 represents the amplitude of the circulating current, and φ _z0 represents the phase.

At this time, by passing a circulating current through the delta connection 402, the effective power of each phase becomes zero. In this case, I _z0 and φ _z0 are expressed as follows:

となる。

It becomes.

Therefore, the circulating current command i _z is

と表される。

This is expressed as:

Next, when the currents i _uv , i _vw , and i _wu expressed by the equation (2) are subjected to a dq inverse transformation (including a three-phase/two-phase transformation),

が得られる。

is obtained.

and,

とすると、式(8)から、

Then, from equation (8),

が得られる。

is obtained.

Since equation (10) is equal to equation (6),

が得られる。

is obtained.

Therefore, the circulating current command i _z is

と導出される。循環電流指令演算部３９は、各直交２軸電流指令（Ｉ_ｄ，Ｉ_ｑ，Ｉ_ｎｄ，Ｉ_ｎｑ）のうち逆相電流指令（Ｉ_ｎｄ,Ｉ_ｎｑ）に基づき、式(12)に従って、循環電流指令ｉ_ｚを導出する。

The circulating current command calculation unit 39 derives the circulating current command i z in accordance with the equation _{(12) based on the negative-phase current commands (I nd ,} I _nq ) among the orthogonal two-axis current commands (I _{d , I q ,} I nd , I _{nq )} .

Therefore, the converter cell current command (iuv, ivw, iwu) before limiting is:

と導出される。

It is derived as follows.

The two-axis instantaneous value calculation unit 40 calculates the result of the above formula (13) according to the following formula (14):

指令制限前の交流電流指令の波高値Ｉｕｖ，Ｉｖｗ，Ｉｗｕを導出する。このように、２軸瞬時値演算部４０は、各直交２軸電流指令（Ｉ_ｄ，Ｉ_ｑ，Ｉ_ｎｄ，Ｉ_ｎｑ）と循環電流指令ｉ_ｚとを用いて、交流電流指令の波高値Ｉｕｖ，Ｉｖｗ，Ｉｗｕを導出する。波高値Ｉｕｖ，Ｉｖｗ，Ｉｗｕは、各直交２軸電流指令の波高値（瞬時値）に相当する。

The peak values Iuv, Ivw, Iwu of the AC current commands before command limiting are derived. In this way, the two-axis instantaneous value calculation unit 40 derives the peak values Iuv, Ivw, Iwu of the AC current commands using each of the orthogonal two-axis current commands ( _Id , _Iq , _Ind , _Inq ) and the circulating current command _iZ . The peak values Iuv, Ivw, Iwu correspond to the peak values (instantaneous values) of each of the orthogonal two-axis current commands.

The maximum value detection unit 45 detects the maximum value Ia of the AC current command peak values Iuv, Ivw, and Iwu, and the detected maximum value Ia is input to the asymmetric filter 46 and input to the divider 43 through the asymmetric filter 46.

The asymmetric filter 46 increases the output signal Iaf with a small time constant when the maximum value Ia is increasing, and decreases the output signal Iaf with a large time constant when the maximum value Ia is decreasing. The output signal Iaf of the asymmetric filter 46 is compared with a predetermined current command limit value 44 (e.g., 100%).

The divider 43 outputs a value (divided value s) obtained by dividing a predetermined current command limit value 44 by the output signal Iaf. The divided value s is limited to 100% to 0% by the upper and lower limiter 42, and the limit signal K that is the output is input to the multiplier 41. The upper and lower limiter 42 limits the input signal (in this case, the divided value s) to a range between an upper limit of 100% and a lower limit of 0%.

The converter cell current commands (iuv, ivw, iwu) before the limit are input to the multiplier 41. The multiplier 41 multiplies the converter cell current commands (iuv, ivw, iwu) by the limit signal K (by multiplying by K) and outputs the converter cell current commands (iuv ^* , ivw ^* , iwu ^* ) after the limit.

When the output signal Iaf is smaller than the current command limit value 44, the output of the divider 43 is 1 or more, but is limited to 100% by the upper and lower limiter 42. Therefore, the limit signal K to the multiplier 41 becomes 100% and the output of the multiplier 41 becomes equal to the converter cell current command (iuv, ivw, iwu) before the limit. In other words, no limit is applied to the current command.

On the other hand, when the output signal Iaf becomes larger than the current command limit value 44, the output of the divider 43 becomes a value smaller than 1 according to the magnitude of the output signal Iaf, and is not limited by the upper and lower limiter 42, but is input as is to the multiplier 41 as a limit signal K smaller than 1. The multiplier 41 multiplies the converter cell current command (iuv, ivw, iwu) before limiting by the limit signal K and outputs it. Therefore, the converter cell current command (iuv ^* , ivw ^* , iwu ^* ) after limiting is limited to a value smaller than the converter cell current command (iuv, ivw, iwu) before limiting.

Since the converter cell currents are controlled by the converter cell current commands (iuv ^* , ivw ^* , iwu ^* ) after limitation, it is possible to reduce the harmonic currents flowing through the converter cells.

Figure 4 shows an example of the operating waveform of the current command unit 420. In contrast, Figure 6 shows an example of the operating waveform of the conventional current limiting circuit 10 shown in Figure 5, and shows the current command limiting result when the current limiting circuit 10 disclosed in Patent Document 2 is applied to a delta-connected MMC (Iq changes from 100% to 150%).

As shown in FIG. 6, when the current command changes suddenly and exceeds 100% of the rated current, distortion (harmonics) occurs in the current command after limiting. When the rated current is exceeded, it is necessary to limit the current command instantly to protect the device. Therefore, in FIG. 6, the time constant of the asymmetric filter 106 when the rectified signal Xn increases is set to 0 ms (no filter), and the time constant of the asymmetric filter 106 when it decreases is set to 10 ms.

On the other hand, Figure 4 shows the current command limit waveforms due to the positive and negative phase orthogonal two-axis current commands and the circulating current command (Iq changes from 100% to 150%). The time constant of the asymmetric filter 46 is the same as that in Figure 6. Figure 4 shows that when the converter cell current command changes abruptly and exceeds the rated current of 100%, the distortion (harmonics) that occurs in the converter cell current command after limiting is reduced.

In addition, since the method of this embodiment limits the current command from the instantaneous value of the peak value, it is possible to simplify the control by eliminating the asymmetric filter 46.

Although the embodiments have been described above, the technology of the present disclosure is not limited to the above-described embodiments. Various modifications and improvements are possible, such as combinations or substitutions with part or all of other embodiments.

50, 50UV, 50VW, 50WU cluster 51, 51UV, 51VW, 51WU reactor _52UV1 , _52UV2 , 52UV _x converter cell _52VW1 , _52VW2 , 52VW _x converter cell _52WU1 , _52WU2 , 52WU _x converter cell 53 power conversion circuit 54 capacitor 55 semiconductor switch group 56 switching element 300 system 400 power conversion device 401 control device 402 delta connection section 410 converter control section 420 current command section a, b AC output terminal

Claims (4)

a delta connection portion in which one or a plurality of converter cells connected in series are delta-connected;
a control device that controls a circulating current flowing through the delta connection by a plurality of converter cells included in the delta connection ,
The converter cell includes a plurality of semiconductor switch groups each including a plurality of semiconductor switches connected in series, and a capacitor connected in parallel to the plurality of semiconductor switch groups,
The control device limits current commands of a plurality of converter cells included in the delta connection portion by using each of orthogonal two-axis current commands of positive phase and negative phase and a circulating current command that is a command for the circulating current. 2. The power conversion device according to claim 1, wherein the control device derives peak values of the orthogonal two-axis current commands based on the orthogonal two-axis current commands and the circulating current command, and limits current commands of a plurality of converter cells included in the delta connection portion by using the peak values. 3. The power conversion device according to claim 1, wherein the control device generates a limiting signal for limiting current commands of a plurality of converter cells included in the delta connection portion , using the orthogonal two-axis current commands and the circulating current command. The power conversion device according to any one of claims 1 to 3, wherein the control device derives the circulating current command based on a negative-phase current command among the two orthogonal axes current commands.

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