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JPS5816808B2 - optical oscillation circuit - Google Patents
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JPS5816808B2 - optical oscillation circuit - Google Patents

optical oscillation circuit

Info

Publication number
JPS5816808B2
JPS5816808B2 JP11387278A JP11387278A JPS5816808B2 JP S5816808 B2 JPS5816808 B2 JP S5816808B2 JP 11387278 A JP11387278 A JP 11387278A JP 11387278 A JP11387278 A JP 11387278A JP S5816808 B2 JPS5816808 B2 JP S5816808B2
Authority
JP
Japan
Prior art keywords
semiconductor impurity
impurity layer
type semiconductor
light
optical oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11387278A
Other languages
Japanese (ja)
Other versions
JPS5541021A (en
Inventor
阿部敏郎
飯高幸男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP11387278A priority Critical patent/JPS5816808B2/en
Publication of JPS5541021A publication Critical patent/JPS5541021A/en
Publication of JPS5816808B2 publication Critical patent/JPS5816808B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/42Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled

Landscapes

  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】 本発明は光発振回路に関するものである。[Detailed description of the invention] The present invention relates to an optical oscillation circuit.

第1図は特公昭51−36991号公報で示されている
ところの光感固体発振素子と同様なPnPn 4層の半
導体素子から構成された光発振素子1を用いた従来の光
発振回路を示すものである。
FIG. 1 shows a conventional optical oscillation circuit using an optical oscillation device 1 constructed from a four-layer PnPn semiconductor device similar to the photosensitive solid-state oscillation device disclosed in Japanese Patent Publication No. 51-36991. It is something.

光発振素子1はn型半導体不純物基板1aの片面にp型
半導体不純物層1bを形成し、他面の1部分にn型半導
体不純物層1dを形成し、該p型半導体不純物層1cに
n型半導体不純物層1dを拡張形成し、n型半導体不純
物基板1aにコレクタCの電極を、またn型半導体不純
物層1dにエミッタEの電極を、更にn型半導体不純物
層1dにベースBの電極を夫々形成したものである。
The light oscillation device 1 includes a p-type semiconductor impurity layer 1b formed on one side of an n-type semiconductor impurity substrate 1a, an n-type semiconductor impurity layer 1d formed on a portion of the other side, and an n-type semiconductor impurity layer 1d formed on the p-type semiconductor impurity layer 1c. The semiconductor impurity layer 1d is expanded and formed, and a collector C electrode is provided on the n-type semiconductor impurity substrate 1a, an emitter E electrode is provided on the n-type semiconductor impurity layer 1d, and a base B electrode is provided on the n-type semiconductor impurity layer 1d. It was formed.

ところで第1図に示すようにコレクタC、エミツクE間
に出力用の負荷抵抗3を介して直流の電源2をn型半導
体不純物層1dと、n型半導体不純物基板1aの接合に
対して逆方向になるように接続して電源電圧を印加し、
コレクタCを含む側に図示するように光Xを照射すると
光Xの照射による素子の内部定数の変化によって発振が
開始されるのである。
By the way, as shown in FIG. 1, a DC power source 2 is connected between the collector C and the emitter E through an output load resistor 3 in a direction opposite to the junction between the n-type semiconductor impurity layer 1d and the n-type semiconductor impurity substrate 1a. Connect it so that the power supply voltage is applied,
When the side including the collector C is irradiated with the light X as shown in the figure, oscillation is started due to the change in the internal constant of the element due to the irradiation of the light X.

即ち光Xが照射されると、n型半導体不純物基板1aと
p型半導体不純物層1 ’bとのPN接合に光起電力が
発生し、該接合は順方向バイアスされnpnpの4層の
サイリスク構造においてゲート電流が流れたのと同様の
状態となり、図示する■の経路に電流が流れ出し、n型
半導体不純物層1d、n型半導体不純物層1dの接合は
導通状態となり、その結果図示せる◎の経路にも電流が
流れる。
That is, when the light X is irradiated, a photovoltaic force is generated at the PN junction between the n-type semiconductor impurity substrate 1a and the p-type semiconductor impurity layer 1'b, and the junction is forward-biased and forms a four-layer npnp cyrisk structure. The state is the same as when the gate current flows in , and the current starts to flow in the path shown in the figure (■), and the junction between the n-type semiconductor impurity layer 1d and the n-type semiconductor impurity layer 1d becomes conductive, and as a result, the path shown in the figure ◎ occurs. Current also flows through the

ところがサイリスク構造がオンするとp型半導体不純物
層1bの電位はn型半導体不純物層1dの電位に近いも
のとなり、n型半導体不純物基板1aとp型半導体不純
物層1bの接合のうちの図における左側の部分は1aの
不純物基板が正極、1bの不純物層が負極となって逆方
向バイアスされる。
However, when the SIRISK structure is turned on, the potential of the p-type semiconductor impurity layer 1b becomes close to the potential of the n-type semiconductor impurity layer 1d, and the left side in the figure of the junction between the n-type semiconductor impurity substrate 1a and the p-type semiconductor impurity layer 1b. The portion is reverse biased with the impurity substrate 1a serving as a positive electrode and the impurity layer 1b serving as a negative electrode.

このとき1aの不純物基板と1bの不純物層の接合を流
れる電流は光Xの照射による光電流と、接合に存在する
接合容量を充電する充電電流である。
At this time, the current flowing through the junction between the impurity substrate 1a and the impurity layer 1b is a photocurrent caused by irradiation with the light X and a charging current that charges the junction capacitance existing at the junction.

この充電電流は、接合容量に電荷が蓄積されるに伴って
減少し、やがて零となる。
This charging current decreases as charge is accumulated in the junction capacitance, and eventually reaches zero.

この時■の経路を通って流れる電流は光電流のみとなり
、この光電流がnpnpのサイリスタ構造の保持電流以
下であれば、サイリスクは非導通状態となる。
At this time, the current flowing through the path (2) is only a photocurrent, and if this photocurrent is less than the holding current of the npnp thyristor structure, the thyristor becomes non-conductive.

つまりp型半導体不糾物層1cとn型半導体不純物基板
1aとの接合が非導通状態となり、@の経路の電流も遮
断される電流が遮断されてもn型半導体不純物層1bの
電位はn型半導体不純物基板1aとp型半導体不糾物層
1b間の接合容量に蓄積された電荷のためしばらくはn
型半導体不純物基板1aより低い電位となっている。
In other words, the junction between the p-type semiconductor impurity layer 1c and the n-type semiconductor impurity substrate 1a becomes non-conductive, and the current in the @ path is also cut off.Even if the current is cut off, the potential of the n-type semiconductor impurity layer 1b is n. For a while, n
The potential is lower than that of the type semiconductor impurity substrate 1a.

(n型半導体不純物基板1aは1bの不純物層に比べて
抵抗は大きく、◎の経路に流れる電流によりn型半導体
不純物基板1aの左側と右側とは、比較的大きな電位差
が生じる。
(The resistance of the n-type semiconductor impurity substrate 1a is higher than that of the impurity layer 1b, and a relatively large potential difference is generated between the left and right sides of the n-type semiconductor impurity substrate 1a due to the current flowing through the path marked with ◎.

この電位差の分だけ接合容量に電荷が蓄積される[引き
続き光発振素子1に光Xが当たり続けると上記の接合容
量の電荷は、光電流により放電し、やがて最初の状態に
戻り、再び接合は順方向バイアスされる。
Charge is accumulated in the junction capacitance by the amount of this potential difference [If the light Forward biased.

このことを、繰り返して発振が持続する。This process is repeated to maintain oscillation.

従って照射光Xの光量により光電流が変化しn型半導体
不純物基板1aとn型半導体不純物層1bとの接合容量
の電荷の放電時間が変わる。
Therefore, the photocurrent changes depending on the intensity of the irradiation light X, and the discharge time of the charge in the junction capacitance between the n-type semiconductor impurity substrate 1a and the n-type semiconductor impurity layer 1b changes.

このことにより光発振素子1の発振周波数が照射光Xの
量により変化する。
As a result, the oscillation frequency of the optical oscillation element 1 changes depending on the amount of irradiated light X.

一方、入射光量が強いと接合を流れる光電流が増大して
、接合容量の充電電流が零となってもサイリスク構造の
保持電流以上となって光発振素子1は導通状態を続ける
On the other hand, when the amount of incident light is strong, the photocurrent flowing through the junction increases, and even if the charging current of the junction capacitance becomes zero, the current exceeds the holding current of the Cyrisk structure and the photo-oscillation element 1 continues to be conductive.

第2図aは光Xの無い場合の回路電流Iを、同図すは弱
い光Xの照射がある場合の回路電流Iを、同図Cは中程
度の光Xの照射の場合の回路電流Iを夫々示し、上述の
導通が保持された場合の回路電流■。
Figure 2a shows the circuit current I in the absence of light X, Figure 2 shows the circuit current I in the case of weak light X irradiation, and Figure 2C shows the circuit current I in the case of moderate light X irradiation. I and the circuit current ■ when the above-mentioned conduction is maintained.

は第2図dのように一定となり発振が停止する(本発明
は上述の欠点に鑑みて提供したもので、その目的とする
ところは、光発振素子の照射する光の強度を増しても発
振が停止せず、光強度が弱い場合と同様に光の強さに応
じて発振周波数を変化させることができる光発振回路を
提供するにある。
becomes constant as shown in Figure 2 d, and oscillation stops. An object of the present invention is to provide an optical oscillation circuit that does not stop and can change the oscillation frequency according to the intensity of light in the same way as when the intensity of light is low.

第3図は一実施例の回路図を示し、以下実施例によって
説明する。
FIG. 3 shows a circuit diagram of one embodiment, which will be explained below with reference to the embodiment.

第3図実施例回路は第1図従来例回路において、光発振
素子1のベースB(p層)と電源2の負極との間に挿入
接続したものである。
The embodiment circuit shown in FIG. 3 is the conventional circuit shown in FIG.

しかして光発振素子1に照射する光が比較的弱いときは
従来例回路と同様に発振する。
Therefore, when the light irradiated to the optical oscillation element 1 is relatively weak, the optical oscillation element 1 oscillates in the same manner as the conventional circuit.

次に第2図dのように強い光Xが入射したときの動作を
説明する。
Next, the operation when strong light X is incident as shown in FIG. 2d will be explained.

金弟2図′dに相当する光Xが入射したとすると、抵抗
3の電圧降下V。
If light X corresponding to 2'd in Figure 2 is incident, the voltage drop across resistor 3 is V.

はV。−Io、Bとなる。is V. -Io, B.

(但し、ioは回路電流Rは負荷抵抗たる抵抗3の抵抗
値)ところが、ツェナダイオード4のツェナ電圧Vzが
電圧降下■。
(However, io is the circuit current R is the resistance value of the resistor 3 which is the load resistance.) However, the Zener voltage Vz of the Zener diode 4 is a voltage drop ■.

より小さいとき、即ちV。When it is smaller, i.e. V.

> V zならば、光発振素子1のエミッタE、ベース
8間には逆方向電圧がかかり光発振素子1に流れる電流
を遮断し、この光発振素子1のオフ状態にする。
> Vz, a reverse voltage is applied between the emitter E and the base 8 of the optical oscillation element 1, cutting off the current flowing through the optical oscillation element 1, and turning off the optical oscillation element 1.

この光発振素子1が一旦オンからオフ状態に転移すると
、それまで順方向バイアスされていたコレクタC,ゲー
トG間の接合が接合容量のため、この接合(コレクタC
,ゲートG間)も逆方向バイアスされる。
Once this light oscillation element 1 transitions from the on state to the off state, the junction between the collector C and the gate G, which had been forward biased until then, has a junction capacitance.
, gate G) is also reverse biased.

エミッタE、ベース8間の逆方向バイアスは光発振素子
1に電流が流れなくなって光発振素子1がオフ状態にな
ると同時になくなり、この接合(エミッタE、ベース8
間)については光が入射しているかぎり、光発振素子1
がオフになると同時に順方向バイアスされる。
The reverse bias between the emitter E and the base 8 disappears at the same time that no current flows through the optical oscillator 1 and the optical oscillator 1 turns off, and this junction (emitter E, base 8
(between), as long as light is incident, the light oscillation element 1
becomes forward biased as soon as it turns off.

ところが、コレクタC1ゲートG間の接合は光発振素子
1がオフ状態になってからしばらくは接合容量があるた
め逆方向バイアスされたままであり、この逆方向バイア
スが光電流によりなくなるまでは光発振素子1のオフ状
態は持続する。
However, the junction between the collector C1 and the gate G remains reverse biased for a while after the photo-oscillator 1 turns off due to the junction capacitance, and until this reverse bias is removed by the photocurrent, the photo-oscillator The off state of 1 continues.

したがって、光を強くすると、コレクタC、ゲート0間
に流れる光電流が大きくなり、コレクタC。
Therefore, when the light intensity is increased, the photocurrent flowing between the collector C and the gate 0 becomes larger.

デー1−0間が逆方向バイアスされている時間が短かく
なり、入射光の増大に従って発振周波数も第4図のよう
高くなる。
The time during which data 1-0 is biased in the reverse direction becomes shorter, and as the incident light increases, the oscillation frequency also becomes higher as shown in FIG.

尚出力は抵抗3の両端から取るとよいが、コレクタCと
電源2との間に別の抵抗を挿入して、その両端から取る
ようにしても勿論よい。
Although it is preferable to take the output from both ends of the resistor 3, it is also possible to insert another resistor between the collector C and the power supply 2 and take the output from both ends.

本発明は、上述のように電源の負極側と光発振素子のベ
ースとの間にツェナダイオードを接続することにより、
入射光が強い場合でも発振を持続させることができるも
のであって、発振周波数が変化する光の強度範囲を大き
く広げることができるという効果を奏する。
As described above, the present invention connects the Zener diode between the negative electrode side of the power supply and the base of the optical oscillation element, thereby achieving
It is possible to sustain oscillation even when the incident light is strong, and has the effect of greatly expanding the intensity range of light in which the oscillation frequency changes.

【図面の簡単な説明】 第1図は従来例回路図、第2図a−dは同上の動作説明
図、第3図は本発明の一実施例の回路図、第4図は同上
の動作説明図であり、1は光発振素子、1aはn型半導
体不純物基板、1b、Icはn型半導体不純物層、1d
はn型半導体不純物層、2は電源、3は抵抗、4はツェ
ナダイオードであり、Bはベース、Cはコレクタ、Eは
エミッタである。
[Brief explanation of the drawings] Fig. 1 is a conventional circuit diagram, Fig. 2 a to d are explanatory diagrams of the same operation as above, Fig. 3 is a circuit diagram of an embodiment of the present invention, and Fig. 4 is an operation same as above. 1 is an explanatory diagram, 1 is a light oscillation element, 1a is an n-type semiconductor impurity substrate, 1b and Ic are n-type semiconductor impurity layers, 1d
is an n-type semiconductor impurity layer, 2 is a power supply, 3 is a resistor, 4 is a Zener diode, B is a base, C is a collector, and E is an emitter.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体不純物基板の片面に該基板とは逆導電型半導
体不純物層を形成し他面の1部に逆導電型半導体不純物
層を設は該不純物層の上面に半導体不純物基板と同じ導
電性の半導体不純物層を形成すると共に半導体不純物基
板と半導体不純物層の表面及び前記逆導電型半導体不純
物層の表面に夫々コレクタ、エミッタ、ベースの電極を
形成し、コレクタとエミッタとの間に直流の電源電圧を
印加し主にコレクタ側に光を照射して発振を行なわしめ
る光発振素子を用いた光発振回路において、光発振素子
のエミッタ側に接続する直流電源の負極と光発振素子の
エミッタとの間に負荷抵抗を接続するとともに直流電源
の負極と光発振素子のベースとの間にツェナタイオード
を接続して成ることを特徴とする光発振回路。
1 A semiconductor impurity layer of a conductivity type opposite to that of the substrate is formed on one side of the semiconductor impurity substrate, and a semiconductor impurity layer of the opposite conductivity type is formed on a part of the other side, and a semiconductor of the same conductivity as the semiconductor impurity substrate is formed on the upper surface of the impurity layer. At the same time as forming an impurity layer, collector, emitter, and base electrodes are formed on the surfaces of the semiconductor impurity substrate and the semiconductor impurity layer, and on the surface of the opposite conductivity type semiconductor impurity layer, respectively, and a DC power supply voltage is applied between the collector and the emitter. In an optical oscillation circuit using an optical oscillation element that oscillates by irradiating light onto the collector side of the optical oscillation element, there is a An optical oscillation circuit characterized in that a load resistor is connected and a Zener diode is connected between the negative electrode of a DC power supply and the base of an optical oscillation element.
JP11387278A 1978-09-15 1978-09-15 optical oscillation circuit Expired JPS5816808B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11387278A JPS5816808B2 (en) 1978-09-15 1978-09-15 optical oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11387278A JPS5816808B2 (en) 1978-09-15 1978-09-15 optical oscillation circuit

Publications (2)

Publication Number Publication Date
JPS5541021A JPS5541021A (en) 1980-03-22
JPS5816808B2 true JPS5816808B2 (en) 1983-04-02

Family

ID=14623217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11387278A Expired JPS5816808B2 (en) 1978-09-15 1978-09-15 optical oscillation circuit

Country Status (1)

Country Link
JP (1) JPS5816808B2 (en)

Also Published As

Publication number Publication date
JPS5541021A (en) 1980-03-22

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