JPS5820137B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device having a fine pattern.

Generally, semiconductor devices are required to have fine patterns.

For example, semiconductor devices such as high frequency high power transistors (hereinafter referred to as HH transistors) or vertical junction field effect transistors (hereinafter referred to as JFETs) require fine patterns to improve their high frequency characteristics. ing.

FIG. 1a"e is a process diagram showing a conventional manufacturing process for forming electrodes of a HH) transistor.

In the conventional method, as shown in FIG. 1A, first, an N-type base region 2 and a P-type emitter region 3 are formed in a predetermined portion of a P-type silicon substrate 10 by selective diffusion.

Next, a silicon oxide film 5 is formed on the entire surface 4 of the substrate 1 on which a predetermined diffusion region has been formed using a thermal oxidation method or a CVD method.

Subsequently, in order to provide contact holes for forming electrodes, photolithography is used to form a layer on the silicon oxide film 5 of the substrate 1.
An aperture is provided that reaches the base region 2 and the emitter region 3 to expose the base region 2 and the emitter region 3.

Next, as shown in FIG. 1, a metal 6 for electrodes, such as aluminum At, is deposited on the whole surface 4 side of the substrate 1.

Subsequently, in order to form an electrode on a predetermined area within the substrate 1, a photoresist 7 is applied as a mask member over the entire surface of the electrode metal 6 deposited on the substrate 1, and the predetermined area is formed using photolithography. A photoresist 7 is left on top, and a mask is provided for electrode formation.

Thereafter, as shown in FIG. 1C, the electrode metal 6 is etched using a predetermined etching solution using the photoresist 7 as a mask, and the photoresist I is removed. A base electrode 8 and an emitter electrode 9 were simultaneously formed on each of the base electrodes 8 and 9, respectively.

As described above, when forming electrodes in the conventional method, the base electrode 8 and emitter electrode 9 are formed simultaneously, which poses problems in terms of mask alignment accuracy in the photolithography process and optical accuracy during exposure. Therefore, there was a limit to how fine the electrode pattern could be made.

This is because, as shown in FIG. 2, when a mask of photoresist 7 is provided on a predetermined area in substrate 1 by photolithography when simultaneously forming base electrode 8 and emitter electrode 9,
It was necessary to allow for an error of 1 μ as a tolerance for mask alignment, and an error of about 2 μ for the spacing L1 between the husband and husband electrodes due to the requirement for optical precision.

Therefore, taking into account these tolerances, the distance L4 between each contact hole must be at least about 4 μm.

That is, there is an additional photolithography process for forming a contact hole in the silicon oxide film 5 of the substrate 1, and an additional photolithography process for forming a mask of photoresist 7 corresponding to a predetermined area after depositing the electrode metal 6. Since this is necessary and allows for dimensional errors in the photolithography process, there is a problem in that there is a limit to how fine the electrode pattern of the HH transistor can be made.

The present invention was made in view of the above drawbacks, and an object of the present invention is to provide a method for manufacturing a semiconductor device having a fine pattern.

The method of this invention will be explained in detail below based on the drawings.

FIGS. 3a"' to 3e are process diagrams showing a manufacturing process for forming electrodes of a HH) transistor by applying the method of the present invention.

In this application example, as shown in FIG. 3a, first, an N-type base region 13 is formed in a predetermined portion of a P-type silicon substrate 11 made of a semiconductor material such as silicon (Si) by selective diffusion. do.

Next, on one main surface 14 of the substrate 11, thermal oxidation or CVD is applied.
A silicon oxide film 15 is formed using a method.

Thereafter, in order to provide a contact hole for forming an electrode, the silicon oxide film 15 is etched using a photolithography process to form an opening that reaches the substrate 11 and exposes the base region 12 and emitter region 13.

Subsequently, an electrode metal 16 such as aluminum is deposited on the main surface 14 side of the substrate 11 by vapor deposition.

Note that the metal 16 for this electrode is nickel chrome (Ni
Cr') and aluminum may be deposited by multilayer vapor deposition, or aluminum may be deposited by vapor deposition after forming platinum silicide (PtSi) on the contact portion.

Thereafter, a photoresist is coated on the electrode metal 16 on the − principal surface 14 side, and without forming only the emitter electrode, a photolithography process is used to expose and develop the photoresist so that it remains on the emitter region 13. Then, a resist mask 17 is formed.

Note that this photoresist is preferably a positive type photoresist, such as the product name AZ1350, in consideration of subsequent steps.

Next, as shown in FIG. 3 of VC1, the electrode metal 16 is etched using a predetermined etching solution using the photoresist 17 as a mask.

At this time, the metal 16 is etched inward from the periphery of the resist mask 17.

That is, the side surface of the emitter pole 18 is side-etched.

Along with this, the emitter electrode 18 is formed, and the resist mask 1γ has a shape in which the upper edge of the emitter electrode 18 also protrudes like a canopy.

Subsequently, as shown in FIG. 3C, the emitter electrode 18 is covered with a photoresist 17.

For example, the photoresist 17 is softened, but the electrode metal is heated to a temperature of about 160°C to prevent it from softening, thereby softening the photoresist 17 and causing it to sag, covering the emitter electrode 18. It will be done.

That is, due to the softening of the photoresist 17, the emitter electrode 1
The photoresist flows out into the side-etched portion of 8, and the side surface of the emitter electrode 18 is coated with the photoresist 17a.
will be covered.

Therefore, the emitter electrode 18 is completely covered with the photoresist 17, and the side surfaces of the emitter electrode 18 are completely covered with the photoresist 17.
．． A photoresist 17a having a thin film thickness of about 5 to 1 μm is deposited.

Thereafter, as shown in FIG. 3d, in order to form a base electrode, the electrode metal 16a is again placed on one principal surface 14 of the substrate 11.
Evaporate the entire surface on the side.

The thickness of this vapor-deposited film is preferably slightly thinner than the film thickness when the electrode metal 16 is vapor-deposited when forming the emitter electrode described above.

Along with this vapor deposition, on the base region 12 in the substrate 11,
A photoresist (17a) covering the silicon oxide film 15, the resist mask 17, and the side surface of the emitter electrode 18 (an electrode metal 16a such as aluminum is deposited in contact with the photoresist) 17a.

Furthermore, as shown in FIG. 3e, a base electrode 19 is formed.

This is done by etching and removing unnecessary metal 16a for the electrode using photolithography.

In this case, the photoresist 17 used as a mask member
, and a photoresist (17a) deposited on the side surface of the emitter electrode 18, the emitter electrode 18 is protected from being etched.

Thereafter, as the photoresists 17 and 17a are removed using a predetermined resist removal solution, the metal 16a on the resist mask 17 is peeled off together with the resist, and two separate electrodes are formed. 0.5
A narrow gap 20 of about 1 μm is formed.

As a result, the emitter electrode 18 and the base electrode 19 are formed with a predetermined gap 20 between them.

First, remove the photoresists 17 and 17a together with the gold film 16a on the resist 17 using a specified resist removal solution, and then remove the unnecessary metal 16 using photolithography.
A can also be removed by etching.

As described above, in this application example, the base and emitter electrodes 19
．． 18 are formed separately, so that the gap 20 between both electrodes can be made very small.
A fine pattern of electrodes can be formed on the electrode.

FIG. 4 shows a cross-sectional view of a JFET electrode formed by applying the method of the present invention.

In the figure, numeral 31 is an N-type semiconductor substrate, and 32a and 32b are P-type first and second gate regions, which are provided separately within the substrate 31, respectively.

33 is an N-type source region, and first and second gate regions 32a in the substrate 31.

32b.

Reference numeral 34 denotes a silicon oxide film provided on the entire surface 35 of the substrate 31 with each region exposed, and contact holes for forming electrodes are provided.

First and second gate electrodes 36a and 36b are formed so as to be in contact with the first and second gate regions 32a and 32b in the substrate 31, respectively.

37 is a source electrode, which is in contact with the source region 33.

Note that the manufacturing process of this JFET electrode is the same as the above-mentioned HH
The substrate 31 is manufactured in the same manner as the manufacturing process of transistor electrodes.
After forming each region in the inner region, first, a source electrode 37 is formed, and this source electrode 37 is covered with a photoresist, and a metal for the electrode is deposited on the entire surface and the photoresist is removed. , second gate electrode 36a, 3
6b can be formed with a slight gap.

Therefore, a fine pattern of electrodes can be obtained.

As described above, in these application examples, the method of the present invention was applied when forming an electrode on a semiconductor substrate, but the method of the present invention is not limited to this, and it is not necessary to form the emitter electrode or the base electrode first. However, it can still be applied to forming fine patterns such as electrodes or oxide films on semiconductor substrates.

Further, in the application example, the method of the present invention is applied to an HH transistor and a JFET, but the method of the present invention is not limited thereto, and can be applied to a semiconductor device that requires a fine pattern on a semiconductor substrate.

As described above, in the method of the present invention, the side surface of the first layer selectively provided on the entire surface of the semiconductor substrate is side-etched through the mask member, and the side-etched side surface is covered with the mask member. Since the second layer is covered by softening and is then in contact with the mask member on the surface of the semiconductor substrate, the first layer and the second layer are separated by the mask member. , there is an effect that fine processing can be performed depending on the thickness of the mask member.

Furthermore, in the method of the present invention, if the mask member covering the side surface of the side-etched first layer is removed (wrist-off),
The first layer and the second layer can be electrically separated and independent from each other regardless of the material of the mask member, and there is an effect that fine patterns such as metal electrodes can be easily realized.

[Brief explanation of the drawing]

Fig. 1a''-c is a process diagram showing a conventional manufacturing process for forming electrodes of an HH transistor; Fig. 2 is a partial cross-sectional view of an HH) transistor manufactured by a conventional method; Fig. 3a''- ' e.g. by applying this invention method HH)
FIG. 4, which is a process diagram showing a manufacturing process for forming electrodes of a transistor, shows a cross-sectional view when an electrode of a JFET is formed by applying the method of the present invention. In addition, the same reference numerals are given to the same parts or corresponding parts in the figures. 11.31... Semiconductor substrate, 17
, 17a...Mask member, 18
,37......First layer, 19,36
a, 36b......Second layer.

Claims (1)

[Claims] 1. A step of side-etching the side surface of a first layer provided on the entire surface of the semiconductor substrate through a mask member provided on the first layer; covering the side surfaces of layer 1 by softening the mask member;
A semiconductor device comprising the step of providing a second layer in contact with the mask member on the entire surface of the semiconductor substrate, the first layer and the second layer being separated by the mask member. Manufacturing method 2, the method according to claim 1, wherein the first
1. A method of manufacturing a semiconductor device, characterized in that an electrode metal is used for the layer and the second layer. 3. A step of side etching the side surface of the first layer provided on the entire surface of the semiconductor substrate through a mask member provided on the first layer, a step of covering the side surfaces by softening the mask member; a step of providing a second layer in contact with the mask member on the entire surface of the semiconductor substrate; and a step of covering at least the side surfaces of the first layer. A method for manufacturing a semiconductor device including a step of removing. 4. A method for manufacturing a semiconductor device according to claim 3, characterized in that an electrode metal is used for the first layer and the second layer.