JPS5826209B2 - Channel selection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, the tuning voltage to be applied to a tuner using a variable capacitance diode as a tuning element is set in advance by a plurality of variable resistors, and the variable resistors are To provide a channel selection device which does not malfunction even when two or more channel switches are operated at the same time, regarding a channel selection device which performs channel switching by switching to and operating.

Recently, many tuners have been used in which a variable capacitance diode is used as a tuning element, and channel switching is performed by switching the tuning voltage applied to the variable capacitance diode.

First, FIGS. 1 and 2 show and explain the main parts of an example of a conventional device that performs such switching using a counter and a decoder.

Here, 1a to 1p are 16 variable resistors for setting the tuning voltage to be applied to the variable capacitance diode of the tuner 10. The local voltage BT is set to be obtained, and a selected one is taken out through the diodes 2a to 2p, and the impedance is converted by a transistor or the like (not shown) to each variable capacitor of the tuner 10. Added to diode.

3 is a switching circuit that electronically switches which of the variable resistors 1a to 1p is to be operated;
A 4-bit hex counter 4 and a decoder 5 are used.

That is, an oscillation circuit 6 for generating clock pulses, a counter 4 for counting the pulses, and a counter 4 for generating an output that is selectively low level from among 16 output terminals according to the binary counting output. It includes a hexadecimal decoder 5 and a control circuit 7 that controls the operations of the counter 4 and the pulse generation circuit 6.

An example of this control circuit 7 is shown in detail in FIG.

The decoder 5 is equipped with an output switching transistor for each of the 16 output terminals a-p, and only one of these transistors is selectively turned on according to the binary count output output from the counter 4. Output terminal a
” A low level output is generated on one of the transistors p, and a current is passed through the variable resistor connected to the output terminal of the transistor that is turned on. The selected channel selection voltage is extracted.

When switching channels, one of the 16 normally open channel designation switches 8a to 8p connected between each of the output terminals a-p of the switching circuit 3 and the switching terminal CH is closed. be done.

At that time, if the channel at the position of the closed switch is not selected, the output of the output terminal of the decoder 5 to which that switch is connected is at a high level, so that output is controlled via the switch. It is applied to the switching terminal CH of the circuit 7 as an input for channel switching.

As a result, the output from the output terminal OC causes the oscillation circuit 6 to start generating pulses, and the generated clock pulse CL is applied to the counter 4 via the terminal UCL.

As a result, the counter 4 starts counting, and the output terminals that generate the output of the decoder 5 are sequentially switched and moved accordingly.

When the closed switch changes until an output is generated from the connected output terminal, the input to the control circuit 70 input terminal CH becomes a low level, so the operation of the oscillation circuit 6 is stopped, and from then on, the oscillation circuit 6 stops operating. The selected state of that channel is maintained until the switch for that channel is operated, and that channel becomes selected.

If the frequency of the clock pulses generated by this oscillation circuit 60 is set sufficiently high, for example, about IKHz or higher, the above-mentioned channel switching can be completed within a very short time while the switches 8a to 8p are closed. .

9U and 9D are switches that are opened and closed by operating signals such as ultrasonic waves or lights or by manual operation when sequentially selecting channels by remote control or manual operation. When switch 9U is operated, a count is sent from the control circuit 7 to the counter 4. An up signal is added and the channels above are selected one by one.
When the switch 9D is operated, a countdown signal is applied from the control circuit 7 to the counter 4, and the channels below are selected one by one.

Furthermore, as is clear from FIG. 2, the terminal DF provided in the control circuit 7 in the switching circuit 3 is connected when a count signal is applied to the counter 4, that is, when a channel switching operation is being performed. This is a default terminal that generates a default output.

This default output is sent to the AF via the default output 12.
It is added to the C circuit 11 and is used to stop (defeat) the AFC operation of the tuner 10 during channel switching operation.

Note that illustration and explanation of the band switching portion between vHF and UHF and the channel display portion are omitted.

In this way, purely electronic channel selection is done,
In the conventional system as described above, when two or more of the channel switching switches 8a to 8p are operated at the same time, there is a risk that the AFC circuit will not be defeated correctly and will be tuned to the wrong frequency. .

One such example will be specifically explained.

Here, it is assumed that the switch 8a is first operated, and then during the period in which the switch 8a is closed, the switch 8b is also operated.

In this case, the switching circuit 3 is switched to generate a low level output from its output terminal a.

However, in a state where both switches 8a and 8b are closed, not only the variable resistor 1a but also the switch 8b.

Current also flows through variable resistor 1b via 8a.

Therefore, the diodes 2a and 2b of the variable resistors 1a and lb, which are set to a lower channel selection voltage, become conductive.

Therefore, assuming that the channel selection voltage of the variable resistor 1b is set lower now, both switches 8 a p 8
During the period when both channels b are closed, even if an output is generated from the output terminal 8 of the switching circuit 3, the channel b set by the variable resistor 1b is selected.

In this state, if the switch 8a is opened first and then the switch 8b is opened, when the switch 8a is opened, the switching circuit 3 is switched by the switch 8b and outputs from the output terminal. At the time of the switching, a defeat operation is also performed, and thereafter the channel B is correctly selected.

However, if the switch 8b is opened first and then the switch 8a is opened, even if the switch 8b is opened, an output is already generated from the output terminal a at that time, so the switching in the switching circuit 3 is not possible. No action is taken.

However, current no longer flows through the variable resistor 1b and current only flows through the variable resistor 1a, so the diode 2b is cut off and the diode 2a is switched to conduction, changing the current from the b channel to the n channel. Move to channel selection state.

However, in this case, as mentioned above, since there is no switching operation in the switching circuit 3, the default output is not generated when the channel selection voltage is switched, and the default operation of the AFC circuit 11 is not performed, resulting in a change in the channel selection voltage. If there is another signal or the like on the way, the AFC circuit 11 will be drawn into that signal and will be tuned to the wrong signal, which is a problem.

As described above, in the conventional device, the variable resistors 1a to 1p may be switched in a state where no default output is generated from the switching circuit 3, and there is a risk that the AFC circuit malfunctions at that time.

Therefore, the present invention eliminates such conventional drawbacks, and enables accurate channel selection without causing AFC malfunction even when two or more channel designation switches are operated at the same time. The purpose is to provide a device.

Hereinafter, one embodiment of the present invention will be described in detail with reference to FIG.

It should be noted that the same parts as in the prior art are designated by the same reference numerals as in FIG. 1, and the explanation thereof will be omitted.

In this device, the channel switching switch 8a
8p are connected in series with diodes 13a to 13p, and one end of the series circuit is connected to the switching circuit 3.
The other ends of their series circuits are connected in common, and the common connection point is connected to a reference potential point via a resistor 14, and is connected to the switching terminal CH of the switching circuit 3 via a capacitor 15. The feature is that the other end of the capacitor 15 is connected to the reference potential point via another resistor (10 and θ).

And, this variable resistor 1a to 1ps capacitor 15,
The time constant of the circuit including resistor 14 and another resistor (10, Q) is determined by the time constant of the circuit including resistor 14 and another resistor (10, Q).
When a charging current is applied to the capacitor 15 through the path of the s diodes 13a to 13p1 and the switches 8a to 8p and a switching input is applied to the switching terminal CH of the switching circuit 3, the switching input is applied to the output terminal of the switching circuit 3. a ” p
The setting is such that the output is maintained for a period of at least one cycle.

Next, the operation in such a configuration will be specifically explained using an example.

First, a case where only one of the switches 8a to 8p is operated will be described.

FIG. 4 shows the switching input applied to the switching terminal CH of the switching circuit 3 at that time.

A is switch 8a with channel b selected.
In this case, a charging current is applied to the capacitor 15 from the 10B power source via the diode 13a and the switch 8a, so a switching input that gradually decreases from a maximum of about 3 is applied to the switching terminal CH. When the output terminal a becomes low level after 15 m5ec, the diode 13a shuts off, the charging current stops flowing, and therefore the switching voltage disappears.
The switching operation is completed and the state is set to channel n.

Note that the time required for switching per channel in the switching circuit 3 was set to 1 m5ec.

Further, in the figure, t is the minimum level of the switching input that should be applied to the switching terminal CH in order to cause the switching circuit 3 to perform a channel switching operation, and below this level, the switching operation will not be performed.

Further, FIG. 4B shows the switching input when only the switch 8b is operated while the n channel is selected, and after 1m5ec, the b channel becomes selected.

Next, in the channel selection state of channel n, first switch 8.
A case where the switch 8b is operated and the switch 8b is also operated during the closing period will be described with reference to FIG.

First, time t. When the switch 8a is operated and closed, the switching input is applied in the same way as in the above case, and the 3m
After 5 ec, an output is generated from the output terminal a, and the channel is first tuned to the n channel.

Then, at time t2 slightly later, switch 8a
If the switch 8b is also operated and closed while it remains closed, the variable resistor 1b and the diode 13b are connected from the 10B power supply.
A charging current flows into the capacitor 15 via the 1 switch 8b, a switching input is applied, the switching circuit 3 starts a switching operation, and its output is transferred from the output terminal a to the output terminal b.

However, even if the output is transferred to the output terminal at time t3, the switch 8a is closed, so the switching input is connected to the variable resistor 1a.
, through the diode 13a1 switch 8a, the switching operation continues, and then at time t4 the output terminals a, b
When no output is generated from both, variable resistor 1a + 1bs diode 13a, 13b1 switch 8a
, sb, approximately twice the charging current flows, the switching input also approximately doubles, and the switching operation continues.

When the output is generated again from the output terminal a at time t5, the diode 13a is cut off, so the switching input becomes approximately 1/2, but if the input at this time is greater than the minimum level t, the switching operation is further reduced. After one more cycle, when an output is generated from the output terminal a at time t7, the switching input becomes smaller than the minimum level t, the switching operation is stopped, and the channel a is selected.

Once channel A is selected in this way,
No matter which of the switches 8a and 8b is opened first, charging current no longer flows through the capacitor 15, and therefore no switching input is applied to the switching circuit 3, and the selected channel changes when the switch is opened. There will be no more problems.

Furthermore, in this device, when an output is generated from the output terminal a in this way, the diode 13a of that channel is cut off, so current flows only through the variable resistor 1a, and both switches 8a and 8b are closed. There is no fear that current will flow through the variable resistor 1b as in the conventional case.

In other words, the tuning voltage of the variable resistor 1a is always taken out and supplied to the tuner 10, regardless of the magnitude of the tuning voltage set by the variable resistors la and 1b.

Therefore, the conventional inconvenience that the AFC operation may malfunction depending on the order in which the switches 8a and sb are opened is resolved, and accurate channel selection operation can be performed.

Note that although the above description has been made regarding the case where the switches 8a and 8b are operated, the same operation is performed for other switches as well.

Further, in the above embodiment, a switching circuit using a counter and a decoder was described, but a switching circuit using a shift register or the like may also be used. output terminals, a switching terminal to which a switching input is applied to sequentially switch which output terminal generates the output, and a default output to stop the AFC operation of the tuner during the switching operation. Any switching circuit can be used as long as it is equipped with a default terminal that generates .

As detailed above, in the present invention, a diode and a channel switching circuit are connected between the plurality of output terminals of the switching circuit that switches the variable resistor for setting the channel selection voltage and the switching terminal for inputting the switching signal. Since the series circuit with the switch is connected, there is no risk of incorrect channel selection even when two or more switches are operated at the same time, and a device that can perform correct channel selection can be obtained. It is.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional channel selection device, FIG. 2 is a detailed circuit diagram of a part of the same device, FIG. 3 is a circuit diagram of a channel selection device according to an embodiment of the present invention, and FIG. 4A , B and FIG. 5 are waveform charts for explaining the operation of the device. 1a-1p...variable resistor, 2a-2p...
...Diode, 3...Switching circuit, 4...
...Counter, 5...Decoder, 6...
...Oscillation circuit, 7...Control circuit, 8a to 8p.
...Channel switching switch, 10...
...Tuner, 11...AFC circuit, 12...
...Defeat circuit, 13a-13p...
Diode, 14... Resistor, 15...
capacitor.

Claims (1)

[Claims] 1. A plurality of output terminals that selectively generate an output from only one of them, and a switching terminal to which a switching input is applied to sequentially switch which of these output terminals generates an output; A switching circuit is provided which has a default terminal that generates a default output during the switching period of the output, and the output from the output terminal of this switching circuit selects one of the plurality of variable resistors for setting the channel selection voltage. One of them is selectively selected, and the tuning voltage taken out from the variable resistor is supplied to the variable capacitance diode of the tuner, and the default output from the default terminal of the switching circuit causes the above-mentioned voltage to be set during the switching period. In addition to stopping the operation of the AFC circuit for the tuner, one end of a series circuit consisting of a channel switching switch and a diode is connected to the output terminal of each of the switching circuits, and the other end of this series circuit is connected in common. Connect this common connection point to the switching terminal of the switching circuit through a capacitor, connect both ends of the capacitor to a reference potential point through a resistor, and apply a charging current to the capacitor from the common connection point. a time constant of the circuit formed including the variable resistor, the capacitor, and the resistor so that the switching input of the switching terminal can be maintained for a period during which the output of the switching circuit is circulated at least once when A channel selection device characterized in that the following is set.