JPS5841010B2 - synthesizer receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a synthesizer receiver in which a local oscillator circuit is configured with a PLL synthesizer, and the change unit of the division ratio set in a programmable division unit that uses a PLL synthesizer can be set in automatic sweep mode or manually. A synthesizer receiver featuring one change when sweeping! related.

In general, a PLL synthesizer is operated by changing the frequency division ratio N of the programmable frequency divider 1 (as shown in FIG. It stably generates the oscillation frequency fo, and in the radio receiver, the oscillation frequency fo of the voltage controlled oscillator 2 is used as the local oscillation frequency, and the reference frequency fr is set to the inter-office frequency of the reception band. The frequency is obtained by the same wave number step between stations.

Incidentally, inter-office frequencies may differ depending on the region.

For example, in the FM band, the same wave number between stations is generally 100KH.
It is set at 2 intervals, but in Europe it is 50KH.
If a station having a fraction of z or 10KH2 exists and the reference same wave number fr is fixed to 100KHz, stations having a fraction of 50KHz or 10KHz cannot be received.

Therefore, if the reference same wave number fr is set to 10KHz, all stations can be received, but in this case, the PLL is set every 10KHz.
is locked, which increases the sweep time during automatic sweep, which is undesirable.

Therefore, the present invention was developed in view of this point, and it is possible to shorten the sweep time in automatic sweep by changing the tuning step between automatic sweep and manual sweep, and also to select all stations by manual sweep. The present invention provides a synthesizer receiver that can receive signals.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram showing a schematic configuration of the present invention, in which reference numeral 4 is connected in parallel to the programmable branch unit 1, and a sweep pulse generation circuit 5
6 is an input means for controlling the pulse generation of the sweep pulse generation circuit 5; A sweep pulse is generated by the instruction signal from the input means 6, the sweep is started by changing the value of the sweep counter 4, and the reception detection signal S
The device is configured to stop pulse generation when .

FIG. 3 is a diagram showing the configuration of the sweep pulse generation circuit 5 in detail, and 7 is a timing signal circuit, which includes small timing signals t1 to t4, large timing signals T0 to T1o, and word clock pulses CPW shown in the fourth diagram. is generated.

Normally, one period TW of T1 to T1o is called one word, and when a word clock pulse CPW is introduced into a flip-flop and the flip-flop is operated, an operation synchronized with the word is performed.

For example, the flip-flop F1 of the leading edge trigger circuit 8,
F2 is driven by 1 in synchronization with the word, and takes out 1 word at the tip of the pulse from the low frequency pulse generator 9.

The low frequency pulse generator 9 is composed of a bistable multi-by-break that generates a pulse with a period of about 100 milliseconds, for example, and the pulse has a waveform shown by L in FIG. It is a long 8th period.

Pulse L is guided to flip-flop F1F2, and pulse Q1. Q2, and the reset signal Q2 of the flip-flop F2 is the opposite of the set signal Q2.

When Ql and Q2 are ANDed by the AND gate A1, a one-word pulse P is obtained, which corresponds to one word at the end of the low-frequency pulse L and is generated approximately every 100 milliseconds.

On the other hand, the wedge timing signals T, ~T1o are provided by the setting circuit 10.
If there is a circle mark at the point where A2. Guided to A3.

Furthermore, the small timing signal t2 is commonly introduced into the AND gates A2 and A3, and the automatic sweep key 11 and manual sweep key 12 of the input means 6 are also connected.
By operating the sweep keys 11 and 12, the AND gate A2. A3 is ANDed and a desired pulse is supplied to the gate circuit 13 via the OR gate OR1.

For example, on the A line, large timing signals T1 to T'i
Since all of o are taken out, there is always a signal at one input of AND gate A2, and since the small timing signal t2 is supplied as the other input, when the automatic sweep key 11 is operated, AND gate A2 is opened and ten small timing signals t2 per word are supplied to gate circuit 13 via OR gate OR1.

Similarly, when the manual sweep key 12 is operated, the AND gate A3 is opened, and one pulse per l word is supplied to the gate circuit 13 via the OR gate OR1.

That is, by selecting the sweep key 1L12, the number of pulses in one word can be set to either 10 or 1.

That is, by selecting the sweep key 11, the sweep counter 4
10 pulses per unit time are applied to the programmable divider 1, the division ratio of the programmable divider 1 is changed by 10 pulses (1 cycle ratio change unit is 101 pulses), and the selection of the sweep key 12 causes the sweep counter 4 to receive 1 pulse per unit time. The frequency division ratio of the programmable frequency divider 1 can be changed one by one (the unit of change of the frequency division ratio is set to 1).

Therefore, in the gate circuit 13, 1
When 10 or 1 pulse is supplied per word from the word pulse P and the setting circuit 10, and there is no reception detection signal S, the ant game t-A4 is opened by the inverter One pulse is generated.

When this pulse is introduced into the sweep counter 4, the sweep counter 4 is changed by 10 or 1 every approximately 100 milliseconds to perform a sweep.

When a new station is received due to a change in the sweep counter 4, a reception detection signal S is generated, the inverter I closes the AND gate A4, and the sweep counter 4 is fixed.

Furthermore, when moving to another station in the receiving state, by operating the sweep keys 11 and 12 (not shown), the reception detection signal S is forcibly cut off temporarily, and the AND gate A4 is opened, and the sweep is started again. The contents of the counter 4 change and a sweep operation is performed.

In addition, in the case of manual sweep, the sweep key 12 is set so that the AND gate A3 is opened only while the manual sweep key 12 is being operated.
is configured.

Next, the operation of the present invention having such a configuration will be explained using an example of continuous speed FM broadcast reception.

First, the reference same wave number fr of the PLL is set to 10KHz,
It is assumed that a station with an intermediate frequency of 10.7 MHz and a lower hetero gain method is currently receiving a station of 90.0 MHz, and an explanation will be given starting from automatic sweep when the automatic sweep key 11 is operated.

At this time, the safe local oscillation frequency is 79.3 MH7, and the reference frequency fr is 10 KHz, so the division ratio N required for the programmable frequency divider 1 is '7930', and the sweep counter 4 has '7930'. “The value is set.

When the automatic sweep key 11 is operated in this state, the AND gate A2 of the setting circuit 10 is opened, and ten sweep pulses are inputted to the sweep counter 4 as described above, resulting in sweep force rank -4. becomes '7940'', and the frequency division ratio N of the programmable frequency divider 1 is set to '7940''.

Therefore, a local oscillation frequency of 79.4 MH2 is obtained from the voltage controlled oscillator 2, and if a broadcasting station is present, the AND gate A4 is closed by the reception detection signal S, and the sweep counter 4 is fixed at 17940", and the 90.1 MHz station is detected. is received.

However, if there is no station at 17940" of the sweep counter 4, ten sweep pulses are input to the sweep counter 4 every 100 milliseconds until the reception detection signal S is generated. 90.3.90.4M
Automatic sweep is performed in 7° steps of 100KH...Hz...

Next, the case of manual sweep in which the manual sweep key 12 is operated will be explained.

Assume that a 90.0 MHz station is being received as described above,
When the manual sweep key 12 is operated in this state, the AND gate A3 is opened, and one pulse is input from the sweep pulse generation circuit 5 to the sweep counter 4 as described above. Then,
The voltage controlled oscillator 2 oscillates at 79.31 MHz.

In other words, this local oscillation frequency has a receiving same wave number of 90. OIMH
This means that the PLL is locked to a value increased by 10KHz.

Thereafter, unless a desired station is received and the operation of the manual sweep key 12 is stopped, the sweep counter 4 receives one pulse every 100 milliseconds, and the division ratio N of the programmable frequency divider 1 reaches 1. By changing the frequency by 10KHz
You can search for broadcast stations in steps.

In this way, even stations having a frequency of 50 KHz or a fraction of 10 KHz, which could not be received during automatic sweeping in 100 KHz steps, can be reliably caught by manual sweeping in 10 KHz steps.

Although the embodiment is about FM reception, one thing is to suitably select the reference frequency fr of the PLL and the large timing signals T1 to T1o of the sweep pulse generation circuit 5.
Application to AM, 8M reception, etc. is also easily possible.

As described above, the synthesizer receiver of the present invention changes the tuning step by changing the division ratio change unit of the programmable date divider that constitutes the PLL synthesizer using automatic sweep and manual sweep, and changes the sweep time by automatic sweep. We aim to shorten the
It is constructed so that stations that cannot be received by automatic sweep can be received by manual sweep, which has an extremely large practical effect.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a PLL, FIG. 2 is a block diagram showing the configuration of the present invention, FIG. 3 is a detailed view of the main part of FIG. 2, and FIG. 4 is a timing signal and operation waveform diagram. DESCRIPTION OF SYMBOLS 1... Programmable frequency divider, 2... Voltage controlled oscillator, 3... Reference same wave number oscillator, 4... Sweep counter 5... Sweep pulse generation circuit, 6... Input means, 7
... timing signal circuit, 8 ... leading edge trigger circuit, 9 ... low frequency pulse generator, 10 ... setting circuit,
11...Automatic sweep key 12...Manual sweep key 1
3...Gate circuit.

Claims (1)

[Claims] 1. In a synthesizer receiver in which the local oscillation circuit is constituted by a PLL synthesizer, a programmable frequency dividing means constituting the PLL synthesizer, a sweep counter means for setting the frequency division ratio of the programmable dividing means 1, A synthesizer receiver in which one means of the sweep counter is provided with setting means for setting a division ratio change unit during automatic sweep to be larger than f + frequency ratio change unit during manual sweep.