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JPS5845820B2 - hand tai souchi no seizou houhou - Google Patents
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JPS5845820B2 - hand tai souchi no seizou houhou - Google Patents

hand tai souchi no seizou houhou

Info

Publication number
JPS5845820B2
JPS5845820B2 JP50087759A JP8775975A JPS5845820B2 JP S5845820 B2 JPS5845820 B2 JP S5845820B2 JP 50087759 A JP50087759 A JP 50087759A JP 8775975 A JP8775975 A JP 8775975A JP S5845820 B2 JPS5845820 B2 JP S5845820B2
Authority
JP
Japan
Prior art keywords
pellet
semiconductor
seizou
souchi
houhou
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50087759A
Other languages
Japanese (ja)
Other versions
JPS5210674A (en
Inventor
博昭 藤本
勇 北広
正晴 野依
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP50087759A priority Critical patent/JPS5845820B2/en
Publication of JPS5210674A publication Critical patent/JPS5210674A/en
Publication of JPS5845820B2 publication Critical patent/JPS5845820B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法詳しくはビームリード付
半導体ペレットを容易に作成する方法を提供するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for manufacturing a semiconductor device, and more specifically, a method for easily manufacturing semiconductor pellets with beam leads.

従来、半導体ペレットに形成される電極接続用のビーム
リードは、回路素子が形成された半導体ペレットを多数
個含む単結晶基板(以後ウェハと称する)の最終製造工
程として形成されていた。
Conventionally, beam leads for connecting electrodes formed on semiconductor pellets have been formed as a final manufacturing process for single crystal substrates (hereinafter referred to as wafers) containing a large number of semiconductor pellets on which circuit elements are formed.

第1図にそのウェハの一部を示す。FIG. 1 shows a part of the wafer.

Lla、lbは半導体ペレット10内の各回路素子への
導体配線、2,2a、2bは半導体ペレット10のビー
ムリード12.12aは隣接せる半導体ペレット20の
ビームリード、3,3a、3b、13,13aは電極部
、4は半導体ペレットの分割領域である。
Lla, lb are conductor wirings to each circuit element in the semiconductor pellet 10, 2, 2a, 2b are beam leads 12 of the semiconductor pellet 10; 12a are beam leads of the adjacent semiconductor pellet 20; 3, 3a, 3b, 13, 13a is an electrode portion, and 4 is a divided region of the semiconductor pellet.

このような場合、集積回路設計の段階ですでにビームリ
ードの形成を考慮しなければならない。
In such cases, the formation of beam leads must be taken into account already at the stage of integrated circuit design.

即ち、ビーム2.2a、2bおよび12,12aとは互
いに接触しない様に配置しなければならない。
That is, the beams 2.2a, 2b and 12, 12a must be arranged so that they do not come into contact with each other.

したがって同一ペレット中の隣り合う電極3と38の間
隔も考慮しなければならなかった。
Therefore, the distance between adjacent electrodes 3 and 38 in the same pellet had to be taken into consideration.

さらにペレット分割に際しては通常のダイヤモンドツー
ルによる方法、砥石による方法、レーザによる方法が使
用できず、裏面からメサ・エッチを施さねばならなかっ
た。
Furthermore, when dividing the pellets, the usual methods using a diamond tool, a grindstone, or a laser cannot be used, and mesa etching must be performed from the back side.

そのため分割領域4も通常の50μに対し100μ程度
を必要とした。
Therefore, the divided area 4 also required a thickness of about 100μ compared to the usual 50μ.

また該分割領域4によりビームの長さが制限されるため
、その面の考慮も必要であった。
Furthermore, since the length of the beam is limited by the divided regions 4, it was necessary to take this aspect into consideration.

そこで、本発明は、前述の従来の欠点であるところの設
計段階での考慮、分割領域を広くとらねばならないこと
による総数の減少等を解決するビーム・リード付チップ
の製造方法を提供するものである。
SUMMARY OF THE INVENTION Therefore, the present invention provides a method for manufacturing a chip with beam leads that solves the above-mentioned conventional drawbacks such as consideration at the design stage and reduction in the total number due to the necessity of widening the divided area. be.

まず、本発明に用いる半導体ペレットの製造方法を第2
図とともに説明する。
First, the method for manufacturing semiconductor pellets used in the present invention will be described in a second manner.
This will be explained with figures.

第2図Aはシリコンウェハを示し、21は一導電形のシ
リコン基板でトランジスタ、ダイオード等の各領域(図
示せず)が形成される島領域22.23を有している。
FIG. 2A shows a silicon wafer, and 21 is a silicon substrate of one conductivity type, which has island regions 22 and 23 in which regions such as transistors and diodes (not shown) are formed.

24は裁断用の島領域、25は基板21の表面に形成さ
れたシリコン酸化膜である。
24 is an island region for cutting, and 25 is a silicon oxide film formed on the surface of the substrate 21.

一点鎖線26は裁断すべき位置を示しこの部分でウェハ
の裁断分割が行われる。
A dashed line 26 indicates a position to be cut, and the wafer is cut and divided at this portion.

この状態で酸化膜25の一部を除去して各回路素子間の
電極配線を行うためのコンタクト窓27.28を形成す
ると同時に、裁断領域29を設けるため酸化膜25の一
部を除去する。
In this state, a portion of the oxide film 25 is removed to form contact windows 27 and 28 for forming electrode wiring between each circuit element, and at the same time, a portion of the oxide film 25 is removed to provide a cutting region 29.

この領域29は酸化膜25の一部が完全に除去されるに
必要な幅であればよくコンタクト窓27.28の幅と等
しくてよい(B)。
This region 29 may be as wide as necessary to completely remove a portion of the oxide film 25 and may be equal to the width of the contact window 27, 28 (B).

つぎにCに示すごとくAl電極配線30,31を形成す
る。
Next, as shown in C, Al electrode wirings 30 and 31 are formed.

こうしたのち電極配線の形成された主面とは異なるもう
一方の主面から裁断領域29に対応する場所に砥石によ
り、幅50〜100μでシリコンウェハ上の酸化膜25
を損傷しない程度の溝12を形成する(D)。
After this, from the other main surface different from the main surface on which the electrode wiring is formed, a grindstone is used to cut the oxide film 25 on the silicon wafer in a width of 50 to 100 μm at a place corresponding to the cutting area 29.
(D).

しかるのち、Al電極配線の形成された面をアビニシン
ワックス(商品名)等で充分保護し、HF:HNO3系
のエツチング液でエツチングする。
Thereafter, the surface on which the Al electrode wiring is formed is sufficiently protected with Abinisine wax (trade name) or the like, and etched with an HF:HNO3 based etching solution.

エツチング液としてHNO3:HF=10 : 1程度
のものを使用すれば凹部33を形成するとともに表面の
酸化膜25の一部25a 、25bを充分残してウェハ
を分割し、分離された半導体ペレット40゜50を得る
ことができる。
If an etching solution of HNO3:HF=10:1 is used, the recess 33 can be formed, and the wafer can be divided leaving enough parts 25a and 25b of the oxide film 25 on the surface, and the separated semiconductor pellets can be separated by 40°. You can get 50.

以上のようにして作成された半導体ペレットにビームリ
ードを形成する本発明の一実施例の方法を第3図ととも
に説明する。
A method according to an embodiment of the present invention for forming a beam lead on the semiconductor pellet produced as described above will be explained with reference to FIG.

第3図Aにおいて、50は前述の半導体ペレット、51
はペレット50表面に形成された絶縁性被膜であって、
耐熱性樹脂フィルム、シリコン酸化膜もしくはシリコン
窒化膜等よりなるものである。
In FIG. 3A, 50 is the aforementioned semiconductor pellet, 51
is an insulating film formed on the surface of the pellet 50,
It is made of a heat-resistant resin film, a silicon oxide film, a silicon nitride film, or the like.

52は仮止め基板53とペレット50とを仮止めする接
着剤である。
52 is an adhesive for temporarily fixing the temporary fixing substrate 53 and the pellet 50 together.

54はペレット30上の電極配線の一部である。54 is a part of the electrode wiring on the pellet 30.

第3図Aの場合、半導体ペレット50を1個だけ示した
が、勿論2個以上並べて同様に仮固定できる。
In the case of FIG. 3A, only one semiconductor pellet 50 is shown, but of course two or more semiconductor pellets can be arranged and temporarily fixed in the same manner.

但し、2個以上の半導体ペレットを並べるときにはその
間隔はウェハー状態でのときより広く、かつビームリー
ドの長さが充分とれる位に広げておくことが必要である
However, when arranging two or more semiconductor pellets, it is necessary to make the interval between them wider than in the wafer state, and to widen the length of the beam lead sufficiently.

こののち、Bに示すごとく半導体ペレット50の周辺を
スチロール樹脂、ワックス等前記酸化膜25、絶縁膜5
1、基板21と反応しない溶剤で容易に除去できる物質
55で埋める。
After that, as shown in B, the periphery of the semiconductor pellet 50 is coated with the oxide film 25, insulating film 5, etc. using styrene resin, wax, etc.
1. Fill with a substance 55 that can be easily removed with a solvent that does not react with the substrate 21.

しかるのち仮止め基板53を除去する。Thereafter, the temporary fixing board 53 is removed.

Cは仮止め用基板53及び接着剤52を除去したところ
を示す。
C shows the temporary fixing substrate 53 and adhesive 52 removed.

物質35とペレットの表面は同一連続面を形成している
The surfaces of the substance 35 and the pellet form the same continuous surface.

つぎにDに示すように全面に金属薄膜56を被着形成す
る。
Next, as shown in D, a metal thin film 56 is deposited on the entire surface.

配線54がAlの場合、薄膜56としてはCr+Cuの
二層構造が望ましい。
When the wiring 54 is made of Al, the thin film 56 preferably has a two-layer structure of Cr+Cu.

ついで、Eはビームに相当する部分57をホトエッチ技
術により形成した後、金属層58を補強のため無電解メ
ッキにより被着形成した状態を示す。
Next, E shows a state in which a portion 57 corresponding to a beam is formed by photoetching, and then a metal layer 58 is deposited by electroless plating for reinforcement.

ボンディングの容易性から金属層58としてAuの無電
解メッキを用いた。
Electroless plating of Au was used as the metal layer 58 for ease of bonding.

最後にFに示すように埋設物質55を除去するとビーム
・リード60が作成されたことになる。
Finally, when the buried material 55 is removed as shown in F, a beam lead 60 is created.

このようにして形成されたビーム・リード付チップの特
徴はFに示す如くシリコン基板21とビーム・リード6
0がペレットより張り出した絶縁物質である酸化膜25
b1絶縁膜51により完全に絶縁されることにある。
The characteristics of the chip with beam leads formed in this way are as shown in F.
0 is an oxide film 25 that is an insulating material that protrudes from the pellet.
It is completely insulated by the b1 insulating film 51.

以上のように本発明の製造方法は (1)設計時に特にペレット上の電極位置を考慮する必
要がない。
As described above, the manufacturing method of the present invention (1) does not require consideration of the electrode position on the pellet during design.

即ち、ペレットに分割後、埋設物質中に埋め込んでビー
ム形成を行なうため通常のワイヤボンディング用素子を
利用できる。
That is, after being divided into pellets, they are embedded in a buried material to form a beam, so that a normal wire bonding element can be used.

(2) ビーム形成時その方向、長さを自由に決めら
れるため、ホンディング用基板設計時の自由が大きい。
(2) Since the direction and length of the beam can be freely determined when forming the beam, there is great freedom when designing the board for honding.

等、すぐれた工業的価値を有するものである。etc., have excellent industrial value.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来法によりビームリードが形成されたウェハ
の一部の平面図、第2図A−Eは本発明ニ用いる半導体
ペレットの製造工程図、第3図A〜Fは本発明の一実施
例にかかるビームリード形成法の工程図である。 21・・・・・・シリコン基板、25.25a 、25
b・・・・・・シリコン酸化膜、40,50・・・・・
・半導体ペレット、51・・・・・・絶縁膜、54・・
・・・・電極配線、55・・・・・・埋設物質、56・
・・・・・金属薄膜、58・・・・・・金属層、60・
・・・・・ビームリード。
FIG. 1 is a plan view of a part of a wafer on which beam leads have been formed by the conventional method, FIGS. 2A to 2E are manufacturing process diagrams of semiconductor pellets used in the present invention, and FIGS. FIG. 3 is a process diagram of a beam lead forming method according to an example. 21...Silicon substrate, 25.25a, 25
b...Silicon oxide film, 40, 50...
・Semiconductor pellet, 51... Insulating film, 54...
... Electrode wiring, 55 ... Buried material, 56.
...Metal thin film, 58...Metal layer, 60.
...beam lead.

Claims (1)

【特許請求の範囲】[Claims] 1−主面に回路素子が構成され、かつこの−主面上の絶
縁性被膜が周縁部外方向に突出した構造からなる半導体
ペレットを、各ペレット間の間隔をウェハ状態のときよ
りも所定間隔広げ仮固定基板にその主面を接着する工程
、前記ペレット裏面より補強用樹脂を用いて補強する工
程、前記仮固定基板をとりはずす工程、前記半導体ペレ
ット上の電極から前記補強用樹脂の上へ伸びるビームリ
ードを形成する工程、前記補強用樹脂を除去する工程と
を備えた半導体装置の製造方法。
1. A semiconductor pellet having a structure in which a circuit element is configured on the main surface and an insulating coating on the main surface protrudes outward from the periphery, and the spacing between each pellet is set to a predetermined distance from that in the wafer state. A step of spreading and adhering its main surface to a temporary fixing substrate, a step of reinforcing the pellet from the back side using a reinforcing resin, a step of removing the temporary fixing substrate, and a step of extending from an electrode on the semiconductor pellet onto the reinforcing resin. A method for manufacturing a semiconductor device, comprising the steps of forming a beam lead and removing the reinforcing resin.
JP50087759A 1975-07-16 1975-07-16 hand tai souchi no seizou houhou Expired JPS5845820B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50087759A JPS5845820B2 (en) 1975-07-16 1975-07-16 hand tai souchi no seizou houhou

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50087759A JPS5845820B2 (en) 1975-07-16 1975-07-16 hand tai souchi no seizou houhou

Publications (2)

Publication Number Publication Date
JPS5210674A JPS5210674A (en) 1977-01-27
JPS5845820B2 true JPS5845820B2 (en) 1983-10-12

Family

ID=13923863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50087759A Expired JPS5845820B2 (en) 1975-07-16 1975-07-16 hand tai souchi no seizou houhou

Country Status (1)

Country Link
JP (1) JPS5845820B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61141417U (en) * 1985-02-25 1986-09-01

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5450043U (en) * 1977-09-16 1979-04-06

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143943B2 (en) * 1971-11-29 1976-11-25

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61141417U (en) * 1985-02-25 1986-09-01

Also Published As

Publication number Publication date
JPS5210674A (en) 1977-01-27

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