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JPS5857909B2 - Bipolar hand grip - Google Patents
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JPS5857909B2 - Bipolar hand grip - Google Patents

Bipolar hand grip

Info

Publication number
JPS5857909B2
JPS5857909B2 JP50097488A JP9748875A JPS5857909B2 JP S5857909 B2 JPS5857909 B2 JP S5857909B2 JP 50097488 A JP50097488 A JP 50097488A JP 9748875 A JP9748875 A JP 9748875A JP S5857909 B2 JPS5857909 B2 JP S5857909B2
Authority
JP
Japan
Prior art keywords
region
terminal
conductivity type
semiconductor substrate
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50097488A
Other languages
Japanese (ja)
Other versions
JPS5221779A (en
Inventor
康夫 田口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP50097488A priority Critical patent/JPS5857909B2/en
Publication of JPS5221779A publication Critical patent/JPS5221779A/en
Publication of JPS5857909B2 publication Critical patent/JPS5857909B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]

Landscapes

  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明はバイポーラ形半導体集積回路装置の改良に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in bipolar semiconductor integrated circuit devices.

従来バイポーラ形集積回路装置(以後ICと略称する)
では入出力信号の外に電源を接続して論理演算を実施す
るのが通例である。
Conventional bipolar integrated circuit device (hereinafter abbreviated as IC)
It is customary to connect a power source in addition to input/output signals to perform logical operations.

しかしこの電源回路には正の電源だけを印加して使用さ
れており、負電源を印加するとICが破壊されるのでこ
の種の使用方法は行われていなかた。
However, this power supply circuit is used by applying only a positive power supply, and since applying a negative power supply would destroy the IC, this type of usage has not been carried out.

第1図に通常のバイポーラ形ICの断面図を示し且つそ
の入出力端子及び電源回路をも併記した。
FIG. 1 shows a cross-sectional view of a normal bipolar IC, and also shows its input/output terminals and power supply circuit.

これは−導電形基本1に反対導電形の拡散領域2.3を
設け、この一方領域3にはこれをコレクタとしベース4
及びエミッタ5を形成する。
This means that - conductivity type basic 1 is provided with a diffusion region 2.3 of the opposite conductivity type, and this region 3 is used as a collector and base 4.
and form an emitter 5.

これは拡散領域3に更に拡散領域を形成することによっ
て得ている。
This is achieved by forming a further diffusion region in the diffusion region 3.

他の領域2にも一導電形の拡散領域6.7を設けている
Another region 2 is also provided with a diffusion region 6.7 of one conductivity type.

次に電源回路ならびに入出力端子の結線について述べる
と、出力端子はNPNTrのコレクタ3を出力端子とし
ておりこれは一導電形拡散領域7にも接続する。
Next, the connection of the power supply circuit and the input/output terminals will be described. The output terminal uses the collector 3 of the NPNTr as the output terminal, and is also connected to the diffusion region 7 of one conductivity type.

入力端子は一導電形拡散領域6に接続されており、これ
はNPNTrのベース4に連結され、又エミッタ5は電
源回路のGNDに接続しこれは半導体基体1にも接続す
る。
The input terminal is connected to a diffusion region 6 of one conductivity type, which is connected to the base 4 of the NPNTr, and the emitter 5 is connected to GND of the power supply circuit, which is also connected to the semiconductor body 1.

又電源回路のVCCは反対導電影領域2に接続するほか
反対導電領域7にも接続する。
Further, VCC of the power supply circuit is connected not only to the opposite conductive shadow region 2 but also to the opposite conductive region 7.

このような回路接続にあってはGND端子に負電位が印
加されると反対導電式拡散領域2と半導体基体に形成さ
れたダイオードを通って■CC端子にこの電位が伝達さ
れるので過大電流によって破壊されることになる。
In this type of circuit connection, when a negative potential is applied to the GND terminal, this potential is transmitted to the CC terminal through the opposite conductivity type diffusion region 2 and the diode formed in the semiconductor substrate, so that excessive current can cause It will be destroyed.

又入力端子及び出力端子は一導電形拡散領域6゜7に接
続されており、この電位がVCCのそれより高くなると
各拡散領域6,7に形成されている負方向ダイオードを
通じてVCCに流れるが、過大電流によって破壊される
等の欠点を有していた。
The input terminal and the output terminal are connected to one conductivity type diffusion region 6.7, and when this potential becomes higher than that of VCC, it flows to VCC through the negative direction diode formed in each diffusion region 6, 7. It had drawbacks such as being destroyed by excessive current.

本発明は上記欠点を除去した新規なバイポーラ形半導体
集積回路装置を提供する。
The present invention provides a novel bipolar semiconductor integrated circuit device that eliminates the above drawbacks.

即ち、電源回路端子を一導電形半導体基体に設けた反対
導電式拡散領域に接続することによって、VCC及びG
ND端子を逆に接続しても破壊されないように配慮した
That is, by connecting a power supply circuit terminal to an opposite conductivity type diffusion region provided in a semiconductor substrate of one conductivity type, VCC and G
Care has been taken to prevent damage even if the ND terminal is connected in reverse.

と言うのは半導体基体をGND端子とする際この半導体
基体に反対導電形領域を形成することによって寄生逆方
向トランジスタ(以後Trと略記する)を得、更にこの
反対導電形拡散領域内に一導電影領域を形成することに
よって順方向Trを寄生させて、GND端子に印加され
た負電位は逆方向Trによって反対導電形拡散領域に流
れるが、順方向TrによってVCC端子に達するのが阻
止される。
This is because when a semiconductor substrate is used as a GND terminal, a parasitic reverse transistor (hereinafter abbreviated as Tr) is obtained by forming an opposite conductivity type region in this semiconductor substrate, and a single conductor is also formed in this opposite conductivity type diffusion region. By forming a shadow region, the forward direction Tr is parasitic, and the negative potential applied to the GND terminal flows to the opposite conductivity type diffusion region by the reverse direction Tr, but is prevented from reaching the VCC terminal by the forward direction Tr. .

次に第2図に示した実施例によって本発明の詳細な説明
する。
Next, the present invention will be explained in detail with reference to the embodiment shown in FIG.

P導電形半導体基体10にN導電形拡散領域11,12
を形成し、この一方領域12にはこれをコレクタ層とす
るNPNTrを形成する。
N conductivity type diffusion regions 11 and 12 in a P conductivity type semiconductor substrate 10
is formed, and in this one region 12, an NPNTr is formed using this as a collector layer.

即ち前記領域12にはP及びN導電影領域13.14を
設けこれらをベース層及びエミツタ層として、NPNT
rを形成する。
That is, P and N conductive shadow regions 13 and 14 are provided in the region 12, and these are used as a base layer and an emitter layer.
form r.

前記反対導電形の拡散領域11にはP導電領域15.1
6,17を設けて■CC端子、入力端子及び出力端子に
連結する。
The diffusion region 11 of the opposite conductivity type includes a P conductivity region 15.1.
6 and 17 are provided and connected to the CC terminal, input terminal, and output terminal.

前記P導電影領域15゜16.17と各端子の接続は任
意であるが図では領域15を■CC端子、領域16を入
力端子、領域17を出力端子に連結する。
Connections between the P conductive shadow area 15°16.17 and each terminal are arbitrary, but in the figure, the area 15 is connected to the CC terminal, the area 16 is connected to the input terminal, and the area 17 is connected to the output terminal.

又P導電影領域16は前記NPNTrのベース層13に
も連結する外、P導電影領域17はVCC端子及び前記
NPNTrのコレクタ層12に連結する。
Further, the P conductive shadow region 16 is also connected to the base layer 13 of the NPNTr, and the P conductive shadow region 17 is connected to the VCC terminal and the collector layer 12 of the NPNTr.

又NPNTrのコレクタ層12は出力端子とする外生導
体基体10をGNDに接続する外NPNTrのエミツタ
層14をもこのGND端子に接続する。
The collector layer 12 of the NPNTr also connects the emitter layer 14 of the outer NPNTr, which connects the outer conductor base 10 serving as an output terminal to GND, to this GND terminal.

このような接続をしたバイポーラ形ICではGND端子
と■CC端子の接続を逆にしても電流は前記P導電影領
域15に寄生する順方向Trによって阻止されるので破
壊することはない。
In a bipolar type IC connected in this way, even if the connection between the GND terminal and the CC terminal is reversed, the current will be blocked by the forward direction transistor parasitic to the P conductive shadow region 15, so that the IC will not be destroyed.

又導電影領域15,16.17は抵抗として利用するた
め、半導体基体の主面に治った方向即ち拡散の深さ方向
xjに直交する方向を長大とする。
Since the conductive shadow regions 15, 16, and 17 are used as resistors, they are made elongated in the direction perpendicular to the main surface of the semiconductor substrate, that is, the direction perpendicular to the diffusion depth direction xj.

これは入出力端子の電位がVCCより高くなった際抵抗
成分としての働作を確実に実施するためである。
This is to ensure that it functions as a resistance component when the potential of the input/output terminal becomes higher than VCC.

この例ではP導電影領域15の一端にVCC端子を接続
しP導電影領域15の他端と拡散領域11とを接続して
、P導電影領域15を抵抗として動作させることによっ
て電源印加電位が逆になっても、或は入出力端子電位が
VCC端子のそれよりも高く保持されてもバイポーラ形
ICの破壊を防止したものである。
In this example, the VCC terminal is connected to one end of the P conductive shadow region 15, the other end of the P conductive shadow region 15 is connected to the diffusion region 11, and the power supply potential is changed by operating the P conductive shadow region 15 as a resistor. This prevents the bipolar IC from being destroyed even if the reverse occurs, or even if the input/output terminal potential is held higher than that of the VCC terminal.

このように本発明に係るバイポーラ形ICでは人力及び
出力電位がVCC電位より高くなっても、更に■CC端
子とGND端子を逆に接続しても破壊されないので需要
者にとっては極めて便利であり、実用上の効果は極めて
太きい。
As described above, the bipolar IC according to the present invention is extremely convenient for consumers because it will not be destroyed even if the output potential becomes higher than the VCC potential or even if the CC terminal and GND terminal are connected in reverse. The practical effects are extremely significant.

しかもその達成手段としては寄生ダイオードの極性を利
用する簡単な手法によっているので工程数の増加はなく
得られる。
Moreover, since the means for achieving this is a simple method that utilizes the polarity of the parasitic diode, it can be achieved without increasing the number of steps.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のバイポーラ形ICの断面図第2図は本発
明に係るバイポーラ形ICの断面図である。 10ニ一導電形半導体基体、11:反対導電影領域。
FIG. 1 is a sectional view of a conventional bipolar IC, and FIG. 2 is a sectional view of a bipolar IC according to the present invention. 10: conductivity type semiconductor substrate; 11: opposite conductivity shadow region;

Claims (1)

【特許請求の範囲】[Claims] 1−導電形の半導体基板と、この半導体基板に形成され
た回路素子及び反対導電型の第1の領域と、この第1の
領域内に形成された一導電型の第2、第3及び第4の領
域と、前記第2及び第4の領域それぞれの一端に接続さ
れた第1の電源と、前記第2の領域の他端と前記第1の
領域とを接続する第1の配線と、前記第4の領域の他端
と前記回路素子とを接続する第2の配線と、この第2の
配線に接続された出力端子と、前記第3の領域の一端に
接続された入力と、前記第3の領域の他端と前記回路素
子とを接続する第3の配線と、前記半導体基板と前記回
路素子とに接続された第2の電源とを備えたバイポーチ
形半導体集積回路装置。
1-A semiconductor substrate of a conductivity type, a circuit element formed on this semiconductor substrate, a first region of an opposite conductivity type, and second, third and second regions of one conductivity type formed in the first region. a first power supply connected to one end of each of the second and fourth regions, and a first wiring connecting the other end of the second region and the first region; a second wiring connecting the other end of the fourth region and the circuit element; an output terminal connected to the second wiring; an input connected to one end of the third region; A bi-porch type semiconductor integrated circuit device comprising: a third wiring connecting the other end of the third region and the circuit element; and a second power supply connected to the semiconductor substrate and the circuit element.
JP50097488A 1975-08-13 1975-08-13 Bipolar hand grip Expired JPS5857909B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50097488A JPS5857909B2 (en) 1975-08-13 1975-08-13 Bipolar hand grip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50097488A JPS5857909B2 (en) 1975-08-13 1975-08-13 Bipolar hand grip

Publications (2)

Publication Number Publication Date
JPS5221779A JPS5221779A (en) 1977-02-18
JPS5857909B2 true JPS5857909B2 (en) 1983-12-22

Family

ID=14193649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50097488A Expired JPS5857909B2 (en) 1975-08-13 1975-08-13 Bipolar hand grip

Country Status (1)

Country Link
JP (1) JPS5857909B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6042900A (en) * 1983-08-18 1985-03-07 ロ−ム株式会社 Presence or absence recognizing device of electronic part orlike on jig

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54132190A (en) * 1978-04-05 1979-10-13 Japan Aviation Electron Radio wave range finder
JPS55166951A (en) * 1979-06-14 1980-12-26 Mitsubishi Electric Corp Surge preventive circuit for bipolar integrated circuit
JPS5693365A (en) * 1979-12-26 1981-07-28 Fujitsu Ltd Semiconductor device
JPS5842266A (en) * 1981-09-07 1983-03-11 Nec Corp Semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6042900A (en) * 1983-08-18 1985-03-07 ロ−ム株式会社 Presence or absence recognizing device of electronic part orlike on jig

Also Published As

Publication number Publication date
JPS5221779A (en) 1977-02-18

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