JPS5915178B2 - Wiring structure and method - Google Patents
Wiring structure and methodInfo
- Publication number
- JPS5915178B2 JPS5915178B2 JP5758476A JP5758476A JPS5915178B2 JP S5915178 B2 JPS5915178 B2 JP S5915178B2 JP 5758476 A JP5758476 A JP 5758476A JP 5758476 A JP5758476 A JP 5758476A JP S5915178 B2 JPS5915178 B2 JP S5915178B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- recess
- insulator
- insulating layer
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】
本発明は半導体IC、混成厚膜IC等に用いて最適な配
線構造及び方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an optimal wiring structure and method for use in semiconductor ICs, hybrid thick film ICs, and the like.
半導体IC)混成厚膜IC等においては、絶縁層上で2
つの導電体を絶縁体を介在させて互いに電気的に絶縁し
て交叉させる場合がしばしばある。Semiconductor IC) In hybrid thick film ICs, etc., 2
It is often the case that two conductors are electrically insulated from each other and crossed with an insulator interposed between them.
↓このような場合、従来は例えば第1図及び第2図に示
す構造が用いられている。第1図及び第2図はICペレ
ット1の要部を拡大したものである。↓In such cases, structures shown in FIGS. 1 and 2, for example, have been conventionally used. 1 and 2 are enlarged views of the main parts of the IC pellet 1. FIG.
ペレット1のSi等の半導体またはセラミック等の絶縁
体より成る基体2の上面にはSiO2等の絶縁層3が形
成されている。さ5 らにこの絶縁層3の上面には、蒸
着、スパッタリング等で被着されたAl、Au等より成
る第1の導電体4及び第2の導電体5がSiO2より成
る絶縁体6を介して互いに交叉して形成されている。こ
のような構造では第1の導電体4と第2の導10重体5
との間に生ずる浮遊容量が問題となる。この浮遊容量を
少なくするために、図示のように第1及び第2の導電体
4、5の交叉部分の巾を小さくすると共に、絶縁体6の
厚さtlを大きくして導電体4、5間の絶縁距離を大き
くするようにして15いる。また第1及第2の導電体4
、5は第2図の矢印T方向から略垂直に蒸着等により形
成されるものであるため、第2の導電体5の絶縁体6の
両側部に形成される部分5a、5bは他の部分より蒸着
による付着力が弱くなるためにその厚さを2フ0 が薄
くなつている。従つてこの部分5a、5bは、絶縁体6
の厚さtlを大とすれは、それだけ蒸着が困難となつて
その厚さを2がさらに薄くなり、ピンホール等が発生し
易くなる。このため従来の配線構造では第2の導電体5
に導電不良や断線等・5 が生じることがあつた。なお
一般的な条件のードでは、絶縁体6の厚さtlが600
0A以上になると第2の導電体5の切断する惧れのある
ものが現れ始め、7000Å以上になると切断するもの
が急に増加し始めることが確認されている。・o 本発
明は上記の実状に鑑み成されたもので、その構造は、絶
縁層上に2つの導電体の交叉部分に凹部を設けたもので
ある。An insulating layer 3 such as SiO2 is formed on the upper surface of a base 2 of the pellet 1 made of a semiconductor such as Si or an insulator such as ceramic. Furthermore, on the upper surface of this insulating layer 3, a first conductor 4 and a second conductor 5 made of Al, Au, etc. are deposited by vapor deposition, sputtering, etc., with an insulator 6 made of SiO2 interposed therebetween. They are formed by crossing each other. In such a structure, the first conductor 4 and the second conductor 10-layer body 5
The problem is the stray capacitance that occurs between the two. In order to reduce this stray capacitance, as shown in the figure, the width of the intersection of the first and second conductors 4 and 5 is made smaller, and the thickness tl of the insulator 6 is increased. 15 by increasing the insulation distance between them. In addition, the first and second conductors 4
, 5 are formed by vapor deposition or the like substantially perpendicularly from the direction of arrow T in FIG. Since the adhesion force due to vapor deposition becomes weaker, the thickness is reduced by 20 mm. Therefore, these portions 5a and 5b are insulators 6
The larger the thickness tl becomes, the more difficult it becomes to deposit, and the thickness becomes even thinner, making pinholes and the like more likely to occur. Therefore, in the conventional wiring structure, the second conductor 5
There were cases where poor conductivity, disconnections, etc. occurred. Note that under general conditions, the thickness tl of the insulator 6 is 600 mm.
It has been confirmed that when the current exceeds 0 A, parts that are likely to break the second conductor 5 begin to appear, and when the current exceeds 7000 Å, the number of parts that are likely to be cut suddenly begins to increase. -o The present invention was made in view of the above-mentioned actual situation, and its structure is such that a recess is provided at the intersection of two conductors on an insulating layer.
またその方法は、前記絶縁体を銅等の金属メッキ層を酸
化させて形成するようにしたものである。5 以下本発
明の実施例について図面と共に説明する。Further, in this method, the insulator is formed by oxidizing a metal plating layer such as copper. 5 Examples of the present invention will be described below with reference to the drawings.
第3〜第5図は本発明による配線構造の製造工程を示す
ものである。3 to 5 show the manufacturing process of the wiring structure according to the present invention.
先ず第3図A,Bに示すように、ペレツト1のSi等の
半導体またはセラミツク等の絶縁体より成る基体2上に
形成されたSiO2等の絶縁層3の上面に、所定の深さ
で凹部7を設ける。First, as shown in FIGS. 3A and 3B, a recess is formed at a predetermined depth on the upper surface of an insulating layer 3 such as SiO2 formed on a substrate 2 of a pellet 1 made of a semiconductor such as Si or an insulator such as ceramic. 7 will be provided.
次にW,MO等より成る第1の導電体4を上記凹部7を
含む面内に所定の厚さ及び巾で蒸着等により形成する。
この場合第1の導電体4の厚さT2″が、凹部7の深さ
T3より小さくなるように形成される。〜なお上記厚さ
T2″を例えば1000Aとし、上記〜深さT3を例え
ば4000Aとしてよい。Next, a first conductor 4 made of W, MO, etc. is formed in a plane including the recess 7 to a predetermined thickness and width by vapor deposition or the like.
In this case, the thickness T2'' of the first conductor 4 is formed to be smaller than the depth T3 of the recess 7. The thickness T2'' is, for example, 1000 A, and the depth T3 is, for example, 4000 A. may be used as
次に第4図A,Bに示すように、感光性樹脂等より成る
マスク8により第1の導電体4の凹部7付近を除く部分
を覆う。Next, as shown in FIGS. 4A and 4B, the first conductor 4 except for the vicinity of the recess 7 is covered with a mask 8 made of photosensitive resin or the like.
しかる後このペレツト1を硫酸銅浴、ホウフツ化銅浴ま
たはシアン化銅浴中で電気メツキにより銅メツキする。
これによつて第5図A,B,Cに示すように、第1の導
電体4の上記マスク8で覆われた部分を除く凹部7部分
及びその付近に銅のメツキ層6が形成される。なおこの
メツキ層6の厚さT4は例えば約6000〜Aとしてよ
い。Thereafter, the pellets 1 are plated with copper by electroplating in a copper sulfate bath, a copper borofluoride bath or a copper cyanide bath.
As a result, as shown in FIGS. 5A, B, and C, a copper plating layer 6 is formed in and around the concave portion 7 of the first conductor 4 excluding the portion covered with the mask 8. . Note that the thickness T4 of this plating layer 6 may be, for example, about 6000-A.
次に第5図のペレツト1を300〜500℃の酸化雰囲
気中で1〜2時間放置すると、上記メツキ層6は酸化さ
れて酸化銅となる。これによつてこのメツキ層6は少な
くとも1部が絶縁体となる。次に上記マスク8を除去し
、しかる後第6図A,Bに示すように、Au,Al,A
gまたはこれらを積層して成る第2の導電体5を蒸着等
により絶縁〜層3及び絶縁体6上に例えば1000Aの
厚さで形成して配線構造を完成する。Next, when the pellet 1 shown in FIG. 5 is left in an oxidizing atmosphere at 300 to 500 DEG C. for 1 to 2 hours, the plating layer 6 is oxidized to become copper oxide. As a result, at least a portion of this plating layer 6 becomes an insulator. Next, the mask 8 is removed, and then Au, Al, A
The wiring structure is completed by forming a second conductor 5 made of a layer 3 or a layer thereof on the insulating layer 3 and the insulator 6 to a thickness of, for example, 1000 A by vapor deposition or the like.
この際この第2の導電体5はメツキ層6上の凹部7と対
応する位置で第1の導電体4と交叉するようにして形成
される。上記第6図A,Bに示す構造によれば、第1及
び第2の導電体4,5の間に絶縁体として介在されるメ
ツキ層6の絶縁層3より突出する高さhを、第1図及び
第2図に示すものより凹部7の深さT3だけ低くするこ
とができる。At this time, the second conductor 5 is formed so as to intersect with the first conductor 4 at a position corresponding to the recess 7 on the plating layer 6. According to the structure shown in FIGS. 6A and 6B, the height h of the plating layer 6 interposed as an insulator between the first and second conductors 4 and 5, which protrudes from the insulating layer 3, is The depth T3 of the recess 7 can be made lower than that shown in FIGS. 1 and 2.
従つて第2の導電体5を蒸着する際、この絶縁体6の両
側部に対する付着力は第1図及び第2図のものと比して
強くなり、この両側部に形成される第2の導電体5の部
分5a,5bの厚さを大きくすることができる。従つて
この部分5a,5bのピンホール等をなくすことができ
、導電不良や断線等の発生を大巾に減らすことができる
。尚、凹部7の深さT3はメツキ層6の厚さT4の略半
分としてよい。またメツキ層6は、その上記突出した高
さhが約6000A以下となるようにその厚さT4を定
めればよい。本発明による配線構造は、絶縁層上で第1
及び第2の導電体を、これらの間に絶縁体を介在して互
いに電気的に絶縁して交叉させるようにした配線構造に
おいて、上記絶縁層の上記交叉部分と対応する位置に凹
部を形成して、上記第1の導電体をこの凹部に沿つて配
設したものである。Therefore, when the second conductor 5 is deposited, the adhesion force to both sides of the insulator 6 is stronger than that in FIGS. 1 and 2, and the second conductor 5 formed on both sides is stronger. The thickness of portions 5a and 5b of conductor 5 can be increased. Therefore, pinholes and the like in these portions 5a and 5b can be eliminated, and occurrences of poor conductivity, disconnection, etc. can be greatly reduced. Note that the depth T3 of the recess 7 may be approximately half the thickness T4 of the plating layer 6. Further, the thickness T4 of the plating layer 6 may be determined so that the above-mentioned protruding height h is about 6000A or less. In the wiring structure according to the present invention, a first
and a wiring structure in which the second conductors are electrically insulated and crossed with an insulator interposed between them, and a recess is formed in the insulating layer at a position corresponding to the crossing portion. The first conductor is disposed along this recess.
また本発明による配線方法は、絶縁層上で2つの導電体
を、これらの間に絶縁体を介在して互いに電気的に絶縁
して交叉させるよう配線する場合において、上記絶縁層
の上記交叉部分と対応する位置に凹部を形成して、一方
の導電体をこの凹部に沿つて配設し、次に上記凹部内の
導電体に金属メツキ層を形成した後、この金属メツキ層
を酸化させて上記絶縁体と成し、しかる後上記絶縁体に
沿つて他方の導電体を配設するようにしたものである。Further, in the wiring method according to the present invention, in the case where two conductors are wired so as to cross each other on an insulating layer so as to be electrically insulated from each other with an insulator interposed between them, the above-mentioned crossing portion of the above-mentioned insulating layer A recess is formed at a position corresponding to the recess, one conductor is disposed along this recess, a metal plating layer is formed on the conductor in the recess, and this metal plating layer is oxidized. The conductor is made of the above-mentioned insulator, and then the other conductor is arranged along the above-mentioned insulator.
従つて本発明によれは、絶縁体の厚さを上記凹部の深さ
だけ実質的に薄くできるので、導電体を蒸着等により形
成しても、この絶縁体の両側部分に付着される導電体の
厚さを比較的大とすることができ、このため導電体の導
電不良や断線等を大巾に減らすことができる。Therefore, according to the present invention, the thickness of the insulator can be made substantially thinner by the depth of the recess, so that even if the conductor is formed by vapor deposition or the like, the conductor attached to both sides of the insulator is thinner. The thickness of the conductor can be made relatively large, and therefore, conductivity defects and disconnections of the conductor can be greatly reduced.
第1図は従来の配線構造を示す斜視図、第2図は第1図
の−線断面図、第3〜6図は本発明の実施例を示す平面
図及び断面図である。
なお図面に用いられている符号において、1はペレット
、2は基体、3は絶縁層、4は第1の導電体、5は第2
の導電体、6はメツキ層、7は凹部である。FIG. 1 is a perspective view showing a conventional wiring structure, FIG. 2 is a sectional view taken along the line -- in FIG. 1, and FIGS. 3 to 6 are a plan view and a sectional view showing an embodiment of the present invention. In addition, in the symbols used in the drawings, 1 is the pellet, 2 is the base, 3 is the insulating layer, 4 is the first conductor, and 5 is the second conductor.
, 6 is a plating layer, and 7 is a recess.
Claims (1)
介在して互いに電気的に絶縁して交叉させるようにした
配線構造において、上記絶縁層の上記交叉部分と対応す
る位置に凹部を形成して、一方の導電体をこの凹部に沿
つて配設したことを特徴とする配線構造。 2 絶縁層上で2つの導電体を、これらの間に絶縁体を
介在して互いに電気的に絶縁して交叉させるよう配線す
る場合において、上記絶縁層の上記交叉部分と対応する
位置に凹部を形成して、一方の導電体をこの凹部に沿つ
て配設し、次に上記凹部内の導電体に金属メッキ層を形
成した後、この金属メッキ層を酸化させて上記絶縁体と
成し、しかる後上記絶縁体に沿つて他方の導電体を配設
するようにしたことを特徴とする配線方法。[Scope of Claims] 1. In a wiring structure in which two conductors are electrically insulated from each other and crossed on an insulating layer with an insulator interposed between them, the crossing portion of the insulating layer A wiring structure characterized in that a recess is formed at a position corresponding to the recess, and one conductor is disposed along the recess. 2. When wiring two conductors on an insulating layer so as to interpose an insulator between them so as to electrically insulate each other and cross each other, a recess is provided at a position corresponding to the crossing portion of the insulating layer. forming one conductor along the recess, then forming a metal plating layer on the conductor in the recess, and then oxidizing the metal plating layer to form the insulator; A wiring method characterized in that the other conductor is then arranged along the insulator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5758476A JPS5915178B2 (en) | 1976-05-18 | 1976-05-18 | Wiring structure and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5758476A JPS5915178B2 (en) | 1976-05-18 | 1976-05-18 | Wiring structure and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS52139961A JPS52139961A (en) | 1977-11-22 |
| JPS5915178B2 true JPS5915178B2 (en) | 1984-04-07 |
Family
ID=13059888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5758476A Expired JPS5915178B2 (en) | 1976-05-18 | 1976-05-18 | Wiring structure and method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5915178B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57210644A (en) * | 1981-06-19 | 1982-12-24 | Seiko Epson Corp | Manufacture of semiconductor device |
| JPS57211253A (en) * | 1981-06-22 | 1982-12-25 | Seiko Epson Corp | Semiconductor device |
| JP2592600B2 (en) * | 1987-03-11 | 1997-03-19 | 株式会社フロンテック | Thin film transistor matrix array |
| JPS63255941A (en) * | 1987-04-13 | 1988-10-24 | Nec Corp | Semiconductor integrated circuit |
| JPH022676A (en) * | 1988-06-17 | 1990-01-08 | Konica Corp | Image sensor |
| JPH02219268A (en) * | 1989-02-21 | 1990-08-31 | Canon Inc | Semiconductor device and photoelectric conversion device using the same |
-
1976
- 1976-05-18 JP JP5758476A patent/JPS5915178B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS52139961A (en) | 1977-11-22 |
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