JPS5942466B2 - turn-off thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a turn-off thyristor that can assist in blocking state (gate turn-off thyristor) or blocking operation with gate current, and relates to an amplification gate structure of a thyristor having a structure in which a low resistance gate layer is embedded in a base layer. Regarding the improvement of

A conventional structure of this type is shown in FIG.

Each of the P1, Ni, and P2 layers is formed by diffusing gallium into the N-type 51 according to the usual manufacturing method to form the P1 and P21 layers, and by diffusing boron at a high concentration on one side of the P2'' layer by a selective diffusion method to form Pf.
One layer is formed into a predetermined pattern. The pattern of the P1 layer is formed into an involute curve shape, a comb shape, etc. A relatively high resistance 10 layer is formed on the Pf1 layer by epitaxial growth.
Form a P-type Si layer P2- of ~20Ω (partly), then diffuse phosphorus in a predetermined pattern (ring shape) by selective diffusion to form N2 and N3 layers, and take out the electrode from the buried P1 layer. For this purpose, part 1 of the P2- layer is etched away to the Pff layer, and aluminum electrodes are usually alloyed on the surfaces of these N2, N3, P2, P1, and P2 layers to form anode electrodes 2, gate electrodes 3, and auxiliary electrodes. A thyristor electrode 4, a cathode electrode 5, and an off gate electrode 6 are provided. The gate turn-off thyristor with this structure operates as follows when a gate firing current is passed between the gate 3 and the cathode 5 with forward bias between the electrodes 2 and 5.
First, the auxiliary thyristor consisting of P1・Ni・P2″′, P2−, and N3 is fired, and the amplified current flows from the electrode 4 to the N
It flows through two layers and fires the main thyristor consisting of P1, Ni, P2 layers, P2-, and N2.

Next, to put the fired thyristor into the blocking state, OF
N2, P via the switch element 8 by the control power supply 7 for F
2-Junction-P'' 1 layer-electrode 6 path through which a reverse current flows, N
2P2-restores the reverse breakdown voltage of the junction, P1, Ni, P2''
, P, , the currents in the thyristor sections of N2 are cut off. Therefore, since the voltage of the OFF control power supply 7 is applied only to the N2P2- junction, when the auxiliary thyristor part P1, Ni, and P2 layer 3P2-, N3 are in a conductive state, the P3P2-junction is in a blocking state. It cannot be recovered, and a gate current flows into the N2P2 junction, and the thyristor cannot be turned off. Rather, current concentration occurs on the N3 layer side of the N2P2 junction, resulting in thermal breakdown. As described above, in the gate turn-off thyristor of the conventional structure, it is necessary to turn the switch 8 ON to turn the main thyristor section OFF while the auxiliary thyristor section is always in the OFF state.

OFF of the auxiliary thyristor section is achieved by configuring the voltage drop in this section to be higher than the voltage drop in the main thyristor section, which significantly reduces the lifetime of the auxiliary thyristor section compared to the main thyristor section. There are methods such as (strengthening gold diffusion) or etching between electrode 4 and electrode 5 to increase the resistance of that part. However, if a thyristor with the above-mentioned measures is used in a normal inverter main circuit, and the load current is intermittent due to reverse voltage from the load such as a motor load, the main thyristor must continue to fire even in this case. , a gate current with the width of the load current must flow. Therefore, a complicated configuration is required for circuit operation, in which the gate current is interrupted, the switch 8 is turned ON, and the main current is turned OFF. The present invention has been made in view of the above-mentioned problems, and includes a turn-off thyristor which has an amplification function when the gate is turned on and which can be turned off by applying a reverse bias to the auxiliary thyristor section at the same time as the main thyristor section when the gate is 0FF. The purpose is to provide.

FIG. 2 is a sectional view of a gate turn-off thyristor showing an embodiment of the present invention, and the same parts as in FIG. 1 are designated by the same symbols. In the configuration shown in FIG. 2, an extension region 9 of the P++ layer is provided directly below the N3 layer constituting the auxiliary thyristor section, and an auxiliary thyristor electrode 10 is provided on the surface of the N3 layer so as not to short-circuit with the P2 layer. This electrode 10 and P+
The extraction electrode 6 of the + layer is connected with a resistor 11, and the N
A diode 12 is connected with a polarity that blocks current from the third layer. In such a structure, when an ignition gate current is passed between the gate electrode 3 and the electrode 5 with a forward bias voltage applied between the electrodes 2 and 5, Pl, Nl, P2+, P2
-, N3 is fired, and this current flows through the resistor 11 to the electrodes 6-P++-P2--N2-electrode 5.

That is, the current flowing through the N3 layer has a value determined by the external resistance (not shown), the conduction internal resistance of the resistor 11, and the auxiliary thyristor section. Here, the junction area of the N3 layer is set so that the N3 layer current density is about 2 to 10A/i, and 0N
The current density from the P++ layer to the N2 layer side that should be
The value of the resistor 11 is selected to be approximately 5 A/ml.
As a result, the current flowing in the N3 layer ignites the entire side surface of the N2 layer near the electrode 6 side in a buried layer shape, and the current flowing in the N3 layer is transferred to the N2 layer, Pl, Nl, P2+, P2 −
, N2 are made conductive. Next, to shift the thyristor to the blocking state, after turning the 0N gate current applied to the electrode 3 to 0FF, turn the switch 8 to 0N to apply a reverse bias from the power supply 7 to the path from N2-P2-P+8 to electrode 6. In addition, conduction of the main thyristor is blocked, but at this time, a reverse voltage is also applied to the N3-P2-1P++ electrode 6 by the diode 12, and the auxiliary thyristor section is also turned off.

To show the experimental results of this example, each junction and electrode was connected to a thyristor 11 of 20 ohms with a resistance of 1200 ohms and a gate cut-off current of 500 A, which was constructed using the same means as the conventional one, and
As a result of operating a 0V power supply 7, a diode 12 with a capacity of 1A, and a switch 8 made of a high-speed switch transistor, the current flowing through the N3 layer ignites a sufficient area of the N2 layer within 1 to 3 μs, and It was confirmed that even if the switch 8 was turned ON and turned off at the same time as the current of the gate 3 was turned 0FF for a load current of 500A, the switch 8 was turned off within 5μs even if the switch 8 was turned off within 5μs. It has been found that this turn-off time is almost the same as the turn-off time when the N3 layer is reliably cut off. It has also been found that by making the density of the P++ layer immediately below the N3 layer denser than that of the N2 layer, the 0N and 0FF times can be made even faster. This is because the provision of the P++ layer increases the internal impedance during conduction, which has a large bias effect on the N2 layer, making it easier for current to flow through the N2 layer, and at 0FF, the sweep resistance from the N3 layer to the electrode 6 is small. This is thought to be because the reverse gate current becomes easier to flow. As described above, according to this embodiment, the gate firing current of the gate turn-off thyristor can be reduced to about 0.1 to 0.5 A by the auxiliary thyristor section, and the time delay between the firing gate signal and the 0FF signal can be reduced. There is no need to take it.

Therefore, if an overcurrent attempts to flow through the thyristor element due to a short circuit on the load side immediately after applying the ignition signal, it is possible to immediately apply a 0FF signal to interrupt the overcurrent, making it possible to control the thyristor. The circuit configuration becomes very simple. In addition, with conventional elements, it was necessary to connect a current-limiting reactor in series with the thyristor in order to suppress the current rise within the time delay between the above-mentioned ignition signal and 0FF signal.
The thyristor of the present invention does not require a current limiting reactor. FIG. 3 shows another embodiment of the present invention, and the same parts as in FIG. 2 are designated by the same reference numerals.

The feature of the structure shown in FIG. 3 is that a partial region 13 on the N3 layer side of the cathode N2 layer is removed by etching to a predetermined shape and depth.
A high impurity concentration region is formed by diffusing phosphorus in a part 14 of this region 13 to ohmicly bond the aluminum electrode 15, and the aluminum electrode 15 is formed at the same time as the other electrodes 3, 10, 5, and 6. , the electrode 10 and the electrode 15 are connected by a conductive wire 16. In this structure, when a forward bias is applied between electrodes 2 and 5 and an ignition gate current is passed through gate electrode 3, the auxiliary thyristor made of N3 layer etc. is ignited, and this current flows from electrode 15 to region 13. 17N2 flows through the electrode 5, forward biases the P2-, N2 junction due to the voltage drop across the resistor 17, causes injection of electrons from the N2 layer to the P2 layer, and ignites the main thyristor section consisting of the N2 layer and the like.

Therefore, the initial ignition region is the resistance region 17 and the end 18 of the electrode 5.
start from. Next, in order to transfer the conductive thyristor to the blocking state, switch 8 is turned ON, the N2P2 junction is reverse biased by the power supply 7, and at the same time the junction NN3P
2- is also applied with a reverse bias in parallel through the resistance region 17, and the auxiliary thyristor section consisting of the N3 layer etc. is also turned off.
In this embodiment, the etching removal region 13 for forming the resistance region 17 was provided on the side of the N2 layer near the N3 layer.
It goes without saying that this may be provided on the opposite side of the embodiment (the side far from the N3 layer).

FIG. 4 shows another embodiment of the configuration shown in FIG. 3. In this embodiment, the diffusion layer 14 for ohmic bonding of the aluminum electrode 15, which was necessary in the configuration shown in FIG. 3, is removed, and the electrode 10 is
This configuration eliminates the need for the connecting wire 16 for connecting the two. That is, a partial region 19 of the N2 layer is formed into a desired resistance region 17.
Remove by etching to form. N3 layer and N2
A partial region 22 of the layer and a portion 2 of the P2 layer sandwiched therebetween
An oxide film 20 as an insulating material is formed on the surface of the N3 layer and a part of the N2 layer 22 via the oxide film 20, and an electrode 21 formed by aluminum vapor deposition is used to connect the N3 layer and a partial region 22 of the N2 layer. The effects in the configurations of FIGS. 3 and 4 are also the same as in the case of FIG. 2. A method of manufacturing a turn-off thyristor according to the invention will be explained with reference to FIG.

Gallium is diffused into an N-type silicon wafer (one side mirror finished) with a specific resistance of 50 to 60 Ω using a closed tube method to form PlN.
Create lP2+ layer. The diffusion depth at this time (P1 and P2+
The layer thickness is approximately 40 μm, and the surface concentration is 1×10 18 . An oxide film is formed on both sides of this wafer, and the oxide film is partially removed to form a predetermined diffusion pattern on the mirror-finished surface side P2+, and a surface concentration of 1 x 1020 and a surface resistance of 1 x 1020 are applied to this part. Boron is selectively diffused so that the resistance is 0.5 to 1 Ω/. Furthermore, a P-type layer (P2-) having a specific resistance of 10 to 20 Ω is formed on this surface by an epitaxial growth method. The thickness of one layer of P2 is 35-40μ. Furthermore, an oxide film is formed on the epitaxial growth surface, this is partially removed, and phosphorus is selectively diffused into this part to form an N2 layer and an N3 layer.
form a layer.

This diffusion depth is 10-15μ. Furthermore, gold is diffused from the P1 layer side to adjust the lifetime within the N layer to a predetermined value. In order to bond the electrode 6 to the P++ layer, the portion 1 is etched away to the P+1 layer using an oxide film or apiezon wax, etc. After that, aluminum is deposited on the entire side surface of the cathode, and then the electrodes 3, 5, 6, and 10 are attached. Remove unnecessary parts to configure.

A thermal compensator made of a tungsten plate is bonded to the surface of the P1 layer using aluminum alloy, and the surface is stabilized by beveling, etching, and varnishing on the periphery in order to ensure forward and reverse withstand voltage as a turn-off thyristor. administer. The resistor 11 and the diode 12 may be connected outside the enclosure, but they can be connected by digging a groove inside a copper post that is bonded to the electrode 5 on the cathode side.

Further, although the embodiments shown in FIGS. 2, 3, and 4 have a center gate structure, the structure is not limited to this, and the design can be changed as appropriate.

As clarified above, the turn-off thyristor according to the present invention has a gate current of 0F in the main thyristor section during turn-off.
This has the effect of controlling the turn-off of the auxiliary thyristor section at the same time as F.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional structural diagram showing a conventional structure of a turn-off thyristor, FIG. 2 is a cross-sectional structural diagram showing one embodiment of the present invention, and FIGS. 3 and 4 are diagrams showing other embodiments of the present invention, respectively. It is. 2...Anode electrode, 2...Gate electrode, 4...Auxiliary thyristor electrode, 5...
・Cathode electrode, 6... Gate electrode for off, 7
...External power supply, 8...Off control switch, 9...Extension area of P++ layer, 10...
... Auxiliary thyristor electrode, 11 ... Resistor, 1
2... Diode, 13... N3 layer etching region, 15... Electrode, 16...
・Conducting wire, 17...Equivalent resistance of area 13 part.

Claims (1)

[Claims] 1 Four layers of P_1N_1P_2N_2, a low resistance buried layer (P^+^+) of the same polarity in the P_2 layer formed in the P_2 layer and connected to the turn-off electrode, and a main thyristor. The cathode N_2 layer of the section is provided with the cathode N_2 layer (N_3) of the auxiliary thyristor section which is divided, and the ignition current flows to the main thyristor section by firing the auxiliary thyristor section. The embedded layer P^+^+ is used as the cathode N_3 of the auxiliary thyristor section.
A resistive section is provided between the cathode N_3 layer and the N_2 layer of the auxiliary thyristor, and when turned on, current flows from the cathode N_3 layer through the resistive section to the N_2 layer route, and when turned off, the cathode N_3 layer and the buried A turn-off thyristor configured to allow current to flow through the power supply route. 2. The turn-off thyristor according to claim 1, wherein the resistance portion is formed by etching and removing a part of the cathode N_2 layer. 3. The turn-off thyristor according to claim 1, wherein the resistor portion is configured as a resistor connected between the cathode N_3 and the buried layer P^+^+.