JPS6148270B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gate structure of a thyristor consisting of P, N, P, N4 layers, which is turned on and off by the gate or is assisted in turning off, and particularly improves turn-on performance and This invention relates to a turn-off thyristor having an enlarged gate structure that does not inhibit the turn-off function.

FIG. 1 shows an equivalent circuit of a conventional turn-off thyristor, in which a main thyristor section 1 and an auxiliary thyristor section 2 are connected in parallel to each other via a resistor 3, and an internal diagram of the configuration is a center gate. The structure is shown in FIG. In Fig. 2, when a gate current is passed between the gate G and the cathode K with the _P1 layer side being positively biased with respect to the electrode K, the auxiliary thyristor part 2 consisting of the _N3 layer is fired, and the _N3 layer The current flows from the electrode 4 through the resistor section 5 to the _N2 region, turning on the main thyristor section 1. On the other hand, in order to turn it off, a reverse bias current is passed from the cathode K toward the electrode _G0 to turn off the current in the main thyristor section 1, but at this time the auxiliary thyristor section 2 must be completely off. If the reverse bias current is removed, it will be re-ignited and the off operation will not be performed reliably. That is, the current of the auxiliary thyristor section 2 is as follows: electrode 4 → P ₂ layer → electrode G ₀ → reverse bias power supply 6 →
The current flows from switch 7 to cathode K, and when switch 7 is turned off, this current flows into the _N2 layer.
Therefore, unless the on-gate current applied to the gate G is removed and the auxiliary thyristor section 2 is turned off reliably, loss of control will occur. As a conventional technique to improve this, the lifetime of each base region N ₁ and P ₂ of the auxiliary thyristor section is made shorter than the lifetime of the base region N ₁ and P ₂ of the main thyristor section 1. has been proposed, and for this purpose, it is necessary to make the lifetime shortening means such as gold diffusion applied to the auxiliary thyristor part 2 stronger than that of the main thyristor part 1, but there is a drawback that this distinction is difficult in the actual manufacturing process.

The present invention solves these problems and provides a thyristor gate structure that speeds up the off operation of the auxiliary thyristor section 2. In particular,
The _N2 layer on the cathode side of the main thyristor section is made shallower than the _N3 layer on the cathode side of the auxiliary thyristor section.

FIG. 3 shows the structure of the turn-off thyristor of the present invention, which will be explained in the order of formation. First, gallium was deposited at a surface concentration of 1×10 ¹⁸ by thermal diffusion from both sides of 50 Ω-cm N-type silicon.
Diffusion to a diffusion depth of 60 microns to form P ₁ , N ₁ , and P ₂ . At this time, the initial thickness of the silicon wafer is adjusted so that the thickness of the _N1 layer is 250 microns. Next, oxide films are formed on both surfaces of the P ₁ and P ₂ layers, and masking is performed so that the N ₂ and N ₃ layers form a predetermined pattern. Although it is not clearly shown in Figure 3, as the current capacity increases, the electrode
G ₀ should be shaped to divide the N ₂ layer, but in the case of a relatively small current where the resistance from the outer edge of the N ₂ layer to the electrode G ₀ is not too large, a ring shape may be used. good. Next, remove the oxide film in the part corresponding to the _N2 layer, and apply 1× to this part.
Diffuse phosphorus to a depth of 5 to 10 microns with a surface concentration of 10 to ²⁰ , then remove the silicon oxide film (SiO ₂ ) in the area corresponding to the N ₂ layer, and diffuse it to the same concentration at the same time as the N ₂ layer. The diffusion depth of the _N2 layer is 20 microns, and the depth of the _N3 layer is 10 to 15 microns. Therefore, the Δxj shown is 5 to 10 microns.
Next, apply gold to the surface of the P1 layer and apply gold to the surface of the _P1 layer.
Gold diffusion is performed by heat treatment at 860° C. for 10-30 minutes to shorten the lifetime of carriers in the _N1 and _P2 layers. Thereafter, aluminum is deposited on the entire surface of the cathode side, and gate electrodes G, G ₀ , cathode electrode K, and electrode 4 are etched into predetermined patterns, respectively, and a tungsten plate is welded to the surface of the P ₁ layer via aluminum. .

In the thus formed turn-off thyristor, the voltage drop in the auxiliary thyristor section 2 is larger than the voltage drop in the main thyristor section 1 by Δxj,
As a result, the transition time from the auxiliary thyristor section 2 to the main thyristor section 1 is shortened. As a result, the second
Re-ignition, which was a problem in the figure, is prevented.

According to experiments, in the case of FIG. 2 where Δxj = 0, when a bias current is applied to the gate G to keep it in the on state, the main thyristor section 1 is turned on after the current is removed and the switch 7 is turned on. It took about 20 microseconds to turn off the
It was confirmed that when Δxj was set to about 5 microns, it could be turned off in about 5 microseconds. In addition,
In this case, the performance when the gate is turned on is slightly degraded, but this is hardly a problem in practice. By making the width of the base composed of the _N1 layer or _P2 layer of the auxiliary thyristor section 2 substantially larger than that of the main thyristor section in this way,
It is possible to improve the performance of the turn-off function.

Figure 4 shows how to improve the turn-off function.
It has a structure in which the gate electrode layer is embedded within the gate layer. Generally, such a configuration is
Since the turn-off operation of the auxiliary thyristor section consisting of the _N3 layer is delayed, the current flowing through the _N2 layer during the turn-off process concentrates in a region close to the _N3 layer, which has the disadvantage of destroying this part. For this reason, it was necessary to turn on the switch after the auxiliary thyristor section was turned off to apply a reverse bias current for off to the _N2 layer, but as shown in Figure 4, the diffusion of the _N2 layer By reducing the depth of _{the N3} layer by Δxj relative to the _depth of This has the advantage that the time required for the gate circuit from turning off the gate G until turning on the switch 5 can be shortened. Furthermore, as shown in FIG. 5, the gate electrode layer P ₂ ⁺ is extended to the bottom of the N ₃ layer, and according to this, the ratio of the gate electrode layer P ₂ ⁺ facing the N ₂ layer (in in volute pattern) is 50% and facing N ₃ layer
The gate electrode G has a P ₂ ⁺ occupancy of 75%.
After turning off the switch 7 and turning on the switch 7, it was confirmed that the time required for the _N2 layer to not re-ignite was reduced by approximately 10 microseconds compared to the conventional system.

As explained in detail above, according to the present invention,
The main thyristor part consists of four layers of P ₁ , N ₁ , P ₂ , and N ₂ and the 4 layers of P ₁ , N ₁ , P ₂ , and N ₃ with P ₁ , N ₁ , and P ₂ in common.
In a thyristor consisting of an auxiliary thyristor section consisting of a layer, N ₁ layer or
By making the base width made up of the P _two layers substantially larger than that of the main thyristor part, it is possible to reliably prevent the main thyristor from re-igniting due to reverse bias removal when it is turned off. Moreover, the time required to turn off the main thyristor can be greatly shortened. Furthermore, this does not impair gate-on performance.

[Brief explanation of the drawing]

Figure 1 is an equivalent circuit diagram of a thyristor with an amplified gate structure, Figure 2 is its specific structural diagram, and Figure 3 is an equivalent circuit diagram of a thyristor with an expanded gate structure.
5 through 5 are concrete structural diagrams of the turn-off thyristor according to the present invention. 1...Main thyristor section, 2...Auxiliary thyristor section.

Claims (1)

[Claims] 1 The main thyristor part has a four-layer structure _of P ₁ , N ₁ , P ₂ , and N ₂ , and P ₁ , N _{1 , and}
It consists of an auxiliary thyristor part with a four-layer structure of P ₂ and N ₃ , and the base width of the auxiliary thyristor part, which is composed of the N ₁ layer or the P ₂ layer, is substantially larger than that of the main thyristor. A turn-off thyristor characterized by: