JPS5942972B2 - Electrode formation method using recoil injection - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming electrodes for semiconductor devices, and is particularly aimed at obtaining stable manufacturing yields in high-frequency transistors and integrated circuits that require narrow electrode pattern spacing. There is.

Conventionally, in forming electrodes of semiconductor devices, for example, forming base electrodes of Si transistors, as shown in FIG. SiO with window opening only
A method has been used in which a metal silicide 4 is formed by depositing a mask 2, depositing an electrode metal 3 thereon by vapor deposition, and then heat-treating it at a temperature required for sintering. . For example, when Pt is used for the electrode, a Pt silicide layer is formed by heat treatment at about 500° C. for 30 minutes, thereby forming an ohmic base electrode. However, according to this conventional method, the Si wafer 1 and S
Due to abnormal diffusion along the interface with the iO2 mask 2, a phenomenon in which the lateral reaction along the interface progresses abnormally often occurs, and especially in case of a pattern structure where the distance between the base and emitter is narrow, the distance between the emitter and the base This was the main cause of short circuits.

For example, even when Pt silicide is formed at a depth of about 500 A from the interface, the lateral reaction along the interface extends to about 1 to 3 μm, so the distance between the emitter and base electrode is 3 μm. The following pattern structure has the disadvantage that the manufacturing yield is significantly reduced due to a short circuit between the emitter and the base. The present invention aims to eliminate the above-mentioned conventional drawbacks, and is characterized by suppressing the reaction of the electrode metal in the lateral direction using ion implantation technology.

The content of the present invention will be explained below with reference to FIG.

On the Si wafer 1 on which the emitter diffusion layer E and the base diffusion layer B are formed, a SiO2 layer 2 of about 5000 thick is formed in a region other than the region to become the base electrode. Next, a Pt layer 3 serving as an electrode metal is formed by electron beam evaporation to a thickness of about 300 Å. Next, this Si wafer is kept at a predetermined temperature and Pt is infiltrated into the Si wafer by implanting ions such as Slf ions into the entire surface.
The energy of the implanted ions is determined by the type of electrode metal 3 used and the thickness of the SiO2 layer 2. In this case, if the interface between the metal layer and the Si wafer is determined to be equal to the energy deposition peak (the depth at which the energy given by the incident ion to the target atom is greatest), the most efficient way is to transfer the heno-deposition ( recoil). Note that the thickness of the SiO2 layer 2 must be determined to be sufficiently thick so that ions are blocked against this energy. For example, when implanting Si+ ions, P
When the thickness of the t-layer is 300, the knock-on effect at the Pt--Si interface is greatest when the implantation energy is 150 KeV. In this case, the SiO2 layer 2 has a density of about 5000
A can sufficiently prevent Si+{on. Examining in detail the process by which Pt silicide is formed in Si, first, at the Pt-Si interface, Pt atoms are directly attached to the Si wafer side with the kinetic energy (rebound energy) generated by the knock-on action of incident Si+ ions. The Pt atoms move to the Si substrate due to the first phenomenon of Pt atoms moving to the Si substrate, and the generation of lattice defects such as vacancies larger than those at thermal equilibrium due to the displacement of Si atoms on the substrate by the incident ions. A second phenomenon of accelerated diffusion into the interior also coexists. The present invention is based on this second
It is characterized by the effective use of the phenomenon of In other words, when ion implantation is performed while keeping the temperature of the Si wafer at 200°C, the diffusion length of Pt in Si without accelerated diffusion is approximately 14λ at most.
For example, Si+{on is 1×1012 (7
fL'2Sec-1 (beam current 0.16?
) When implanted, the diffusion coefficient of Pt atoms becomes 10 3 to 10 5 times due to the generation of vacancies, and therefore the diffusion length becomes approximately 100 times. Therefore, a sufficient thickness of P in the Si wafer under the area where the electrodes are to be formed is
A t-silicide layer 5 is formed.

At the same time, the reaction in the lateral direction along the interface between Si and SiO hardly proceeds, so that even in the case of a narrow electrode spacing, it is possible to prevent the occurrence of troubles due to electrode shorts. As described above, the electrode forming method according to the present invention is characterized in that the electrode is formed by keeping the semiconductor substrate at a temperature below the sintering temperature of the semiconductor material and electrode metal that constitute the semiconductor device. This method is highly effective as a method for forming electrodes in semiconductor devices with fine patterns.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device for explaining a conventional method, and FIG. 2 is a sectional view of a semiconductor device for explaining a method according to the present invention. 1... Si wafer, 2... SiO2 layer, 3... Pt layer, 4, 5... Pt silicide.

Claims (1)

[Claims] 1. Deposit an electrode metal that reacts with silicon to form silicide on the electrode formation region from which the oxide film on the surface of the silicon semiconductor substrate has been removed, and while keeping the semiconductor substrate at a temperature below the sintering temperature with the electrode metal, By implanting high-energy ions into the semiconductor substrate and generating lattice defects in the silicon substrate that exceed thermal equilibrium, the diffusion of metal atoms into the semiconductor substrate is accelerated only in the direction perpendicular to the semiconductor substrate surface. A method for forming electrodes for semiconductor devices characterized by causing diffusion.