JPS5952868B2 - Imaging device - Google Patents

Description

[Detailed Description of the Invention] In a color imaging device using a solid-state imaging body such as a BBD or CCD, for example, as shown in FIG. In order to search for the desired pattern PB, it is usually necessary to prepare a pattern generator, but when this is built into a color imaging device, it may be configured as shown in FIG. 2, for example.

In FIG. 2, 1 indicates an imaging system, and 10 indicates a pattern generator.

In the imaging system 1, a subject 2 is projected onto a solid-state imaging body 3 such as the above-mentioned CCD, and an imaging output SA obtained from this is projected.
is supplied to the color encoder 5 via the process circuit 4 as usual, thereby producing the well-known color signal SB.
is formed. When a CCD is used as the solid-state image sensor 3, it can be configured as shown in FIG. That is, it is composed of an imaging section 3A having a plurality of light receiving sections serving as picture elements arranged vertically and horizontally, an accumulation section 3B for transferring and accumulating carriers induced in the imaging section 3A, and a horizontal shift register 3C. Ru.

6 is an output terminal from which the imaging output SA is obtained.

In order to drive such a solid-state image pickup body 3, a drive system configured as follows may be used. First, a synchronous board 7 is prepared, and the horizontal and vertical pulses PH and PV corresponding to the horizontal and vertical frequencies obtained by the synchronous board 7 are sent to the drive signal forming circuit 8.
As shown in FIG.
After forming the transfer lock pulses φH and φV for driving the horizontal shift register 3C and the horizontal shift register 3C, if these transfer pulses φH and φV are supplied to the respective desired terminals of the solid-state imaging device via the driver 9, It is possible to drive the solid-state image pickup body 3. (Pattern generator 10
has a pattern generator 11 as is well known. In this example, an image based on numeric signals from o to 9 is displayed as an image PB inserted into a part of the image PA to represent the date. The output obtained by the clock generator 12 is supplied to an address counter 13 to form a position signal representing the position of the searched image PB, which is sent to the pattern generator 1.
1. Note that 14 is a keyboard for setting numbers to be displayed. This keyboard 14
The output related to the number set in is the pattern generator 1.
Similar to the imaging system 1, this output 50 is supplied to the color encoder 15 and converted into a desired color signal SO, and then supplied to the synthesis circuit 16 together with the above-mentioned color signal SB. . In this example, a part of the image PA is extracted and a search image PB is inserted into that part, so the synthesis circuit 16 is configured as a cutout circuit.

Therefore, the control signal SE for this purpose is the color signal S. It is formed based on the following. Reference numeral 17 indicates this cutting control signal forming circuit.

Control signal S. The output S clipped by. is led to terminal 18. Therefore, this color output S.

An image like that shown in FIG. 1 is reproduced based on this.
However, as shown in the figure, the color imaging device configured in this manner requires not only color encoders 5 and 15 but also a cutout circuit 16 and a control circuit 17 therefor, making the configuration complicated. It has the disadvantage of

In view of these points, the present invention has achieved the simplification of the five-circuit configuration by configuring the parts that can be used in common as much as possible.

Therefore, in the present invention, rather than composing the color signals SB and SD after obtaining them, in particular, a portion of the imaged content of the object 2 projected onto the solid-state image sensor 3 is used. The output S obtained by the pattern generator, 10. The signal processing system is simplified by superimposing the signals. The color imaging device according to the present invention will be described in detail below with reference to the drawings, but parts corresponding to those in FIG.

4th rj! J shows an example of the device of the present invention, and in this example, the configuration of the device drive system itself is also shared. In this example, a commonly used synchronous board 7 is provided,
The horizontal and vertical pulses PH and PV obtained from this synchronous board 7 are supplied to a drive signal forming circuit 8. It forms signals necessary to drive the solid-state image pickup body 3, that is, transfer pulses φH and φv, and also drives the pattern generator 10 based on pulses obtained from the synchronous disk 7 and the drive signal forming circuit 8. Here, the pattern to be displayed in a part of the image PA is the date as mentioned above, so if the pattern generator 10 is configured to display a total of 10 numbers from 0 to 9. good.

Therefore, the present example has a character generator 20 for generating a number pattern from 0 to 9. When and how the character generator 20 is driven is controlled by the output of the character designation circuit 14. The configuration of the character-designating circuit 14 is not directly related to the gist of the present invention, and will therefore be omitted. To explain such a drive system step by step, as mentioned above, the horizontal and vertical pulses PH and PV obtained from the synchronous board 7
and the horizontal transfer pulse φ obtained by the drive signal forming circuit 8.

These pulses PH, PV, and φ are supplied to the address counter 13, respectively, and the pulses PH, PV, and φ are supplied to the address counter 13 so that, for example, the image PB is displayed at the shaded position in FIG. Its position on the screen is counted based on. In order to display the date image MB in a part of the image PA, it is sufficient to consider a total of six areas (addresses) from T1 to T6 as shown in FIG. In other words, it is sufficient to display the year, month, and day as the date. In order to display designated numbers at each address from T1 to T6, first, the output obtained from the counter 13 is supplied to the address signal forming circuit 21, and the position currently being scanned is determined. The address signal forming circuit 21 generates outputs corresponding to T1 to T6 according to each scanning position.

The signals corresponding to each address obtained by the address signal forming circuit 21 are supplied to the drive control circuit 22 of the character-1 generator 20 together with the output of the character-1 designation circuit 14. Therefore, the drive control circuit 22 controls which numbers are displayed at which addresses. Outputs corresponding to desired numbers selected from among the numbers 0 to 9 by the character generator 20 are synthesized by a synthesis circuit 23. The pattern signal S which is the composite output obtained as above
.

As described above, is supplied to the solid-state image sensor 3 as part of the imaged content. A specific example will be explained with reference to FIG. FIG. 6 shows an enlarged view of a part of the storage section 3B and a part of the horizontal shift register 3C.

In this example, a type in which transfer is performed using a two-phase clock is shown. Therefore, the vertical transfer pulse φ9 has two transfer locks φVl whose phases differ by 180°.
, φV2. Similarly, horizontal shift register 3
Also in C, two clock pulses φH1 and φH2 having a phase difference of 180° are supplied to each region. In the present invention, the above-mentioned pattern signal Sc is supplied to the horizontal shift register 3C.

Therefore, a gate circuit 30 is provided on the side opposite to the output terminal output side of the horizontal shift register 3C.

As shown in the figure, this gate circuit 30 has a source region 30S and first and second gate regions Gl, G2, and a predetermined voltage is always applied to the second gate region G2.
A desired clock pulse φ6 is applied to the gate G1 of
By supplying the terminal 31 to the source region 30S side,
A pattern signal S applied through. are sequentially transferred into the horizontal shift register 3C. To explain these operations in more detail with reference to FIG. 7, first, the carriers stored in the area corresponding to the final horizontal scanning section of the storage section 3B are transferred to each other during the horizontal blanking period W1. Due to the locks φV1 and φV2, all the carriers corresponding to one horizontal section are transferred to the horizontal 5 shift register 3C side at once during the period W2, for example.

After all data has been transferred to the horizontal shift register 3C side,
Horizontal transfer rotor φH1 (φH2
(omitted)), carriers are sequentially transferred to the right side one picture element at a time, and similarly, during a predetermined horizontal transfer period, a clock pulse as shown in FIG. 7E is applied to the first gate region G1. If φ6 is supplied, the source region 30S
A pattern signal S is supplied to the side. is superimposed on the carrier based on the subject image and transferred. Therefore, the pattern signal S. If images are taken with the signals sequentially transferred to the horizontal shift register 3C, the pattern signal S is output from the terminal 6.
The superimposed imaging output S. can be obtained. Therefore, this imaging output S. As shown in Fig. 4, the process circuit 4
If the color image signal is supplied to the encoder 5 via the encoder 5 and then supplied to the receiver, an image with the desired number displayed in the desired location as shown in FIG. 1 will be obtained. It is something that can be done. As explained above, in the present invention, the imaging output SA obtained by the imaging system 1 and the pattern signal S obtained by the pattern generator 10 are used.

The gate circuit 3 uses the pattern signal obtained by the pattern generator 10 as part of the imaged content of the object 2 projected on the solid-state image sensor 3, rather than combining the two.
0 to the horizontal shift register 3C so that both signals are superimposed. In this way, if the horizontal shift register 3C is also used as a signal synthesizing means, it is possible to easily synthesize signals, and especially for the imaging output S. The entire circuit system from the beginning to the desired color signal can be shared. Therefore, it has the feature that the device can be significantly simplified. Also, in this example, the configuration is such that the synchronous system itself is also shared, so the configuration of the synchronous system itself is also reduced by 1/2.
In addition to this, since both can be completely synchronized, the genlock configuration required to synchronize the two is completely unnecessary, resulting in further simplification of the circuit configuration in combination with the above-mentioned configuration. It is possible to achieve this goal.

In the embodiments described above, various means can be used for superimposing a pattern signal as a part of the imaged content in addition to the means shown in FIG. 6.

For example, in order to transfer the pattern signal to this horizontal shift register 3C, a register for buffer 1 is provided, that is, a register for buffer 1 having the same number of bits as horizontal shift register 3C is provided, and this register is connected to terminal 31 in the same manner as described above. Through the pattern signal S. By supplying , it becomes possible to similarly superimpose a desired pattern on a part of the subject image.

[Brief explanation of the drawing]

FIG. 1 is a diagram used to explain the present invention, FIG. 2 is a system diagram showing an example of a color solid-state imaging device used to explain the invention, FIG. 3 is a configuration diagram showing an example of a solid-state imaging device, and FIG. 4 5 is a system diagram showing an example of a color solid-state imaging device according to the present invention, FIG. 5 is a diagram showing a region where an inserted image is constructed, and FIG. 6 is a schematic diagram showing an example of a solid-state imaging body suitable for applying the present invention. FIG. 7 is a waveform diagram for explaining its operation. 3 is a solid-state image pickup device, 10 is a pattern generator, 11 is a pattern generator, 7 is a synchronization board, 13 is an address counter, 5 is a color encoder, 3A is an image pickup section, 3B is a storage section, 3C is a horizontal shift register, 30 is a gate circuit, 31
is a supply terminal for pattern signal SO, 30S is a source region,
Gl and G2 are first and second gate regions, and φ6 is a clock pulse.

Claims (1)

[Claims] 1. A solid-state image sensor having a horizontal shift register for successive imaging outputs, a pattern signal generating device, a reference signal generating means for obtaining at least a clock for driving the solid-state image sensor, and the horizontal shift register and pattern signal generator. The pattern signal is supplied to the horizontal shift register through the gate circuit, thereby combining the image pickup output and the pattern signal from the horizontal shift register. An imaging device configured to obtain an imaging signal.