JPS5953638B2 - Three-value logic storage method using Josephson junction elements - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ternary logic storage system using a Josephson junction element in which the persistent current state of a superconducting current loop including the Josephson junction element corresponds to ternary logic.

In current electronic computers, calculations and information storage are generally performed based on binary logic.

In the case of such binary logic, the on/off state of a switch is basically associated with binary numbers "l" and "o", and Josephson junctions are used as information storage means using binary logic. It is also known to use elements.
Memory means using this Josephson junction element has the advantage of being capable of high-speed operation, high density, and extremely low power consumption. For example, as shown in FIG. 1, a bias current IB is passed through a bias line BL. When a write current of 1 W is applied to the write line M, more current flows from the Josephson junction element J1 side to the Josephson junction element J2 side, and by setting the bias current IB to zero, the persistent current in the direction of the solid line arrow increases. The superconducting current loop LP includes Josephson junction elements J1 and J2. Also, if the direction of the write current 1w is reversed,
A persistent current will flow in the direction of the dotted arrow. Therefore, by making the direction of the persistent current correspond to the binary numbers "1" and "0", it is possible to perform storage using binary logic.

And Josephson junction element J3 connected to readout line RL
By placing the superconducting current loop close to the superconducting current loop LP, readings can be taken corresponding to the direction of the persistent current.
Three-value logic has the following advantages in terms of logic circuits and memory circuits compared to the above-mentioned two-value logic.

(1) The number of digits required to process the same amount of information is small, and high-speed processing is possible.

(2) High utilization efficiency for the same transmission medium.

(3) High storage density. However, despite having the above-mentioned advantages, ternary logic circuits are hardly ever put into practical use.
This is because, if value logic processing were to be performed, the circuit configuration would become extremely complicated, and the above-mentioned advantages could not be fully demonstrated.

The present invention is based on the direction of persistent current in a superconducting current loop containing a Josephson junction element and the state of zero persistent current.
The purpose is to store value information and read out the ternary value information, and there are 7 types.

Examples will be described in detail below. FIG. 2 is an explanatory diagram of an embodiment of the present invention, in which Josephson junction elements Jl, J
A bias line BL is connected to the superconducting current loop LP including J2, and a write line WL is connected to the Josephson junction elements Jl, J2
Josephson junction elements J3 and J4, which are arranged close to the superconducting current loop LP and connected to the readout line RL, are arranged close to the superconducting current loop LP, and load resistors Rl and R2 are connected to the Josephson junction elements J3 and J4, respectively. The state where there is no persistent current in the superconducting current loop LP and the state where the persistent current flows in the direction of the solid line or the direction of the dotted line are made to correspond to three-value information. When writing, it is first necessary to erase the previous stored information, so a set current is passed through the bias line BL. This reset current IBL
is the critical current 1C1 of Josephson junction element Jl, J2,
The sum of IC2 is (1c1+IO2). In that case, Josephson junction elements Jl and J2 usually have the same configuration, so IBl>210=Icl+Ic2
A set current 1B1 is applied. As a result, Josephson junction elements Jl and J2 are brought into a voltage state, and when the set current 1B1 is made zero, the persistent current of the superconducting current loop LP becomes almost zero. After setting the reset current 1B1 to zero, the time until the Josephson junction elements Jl, J2 actually reach the zero voltage state is calculated by changing the inductance of the superconducting current loop LP to the voltage state of the Josephson junction elements Jl, J2. Letting the resistances be Ra and Rb, L/(Ra
+Rb), for example, Ra=Rb-0.5Ω, L=
100..., then V(Ra+Rb)=100 pS.

Therefore, after setting the current 1B1 to zero, L/(Ra+
Writing is performed after a period of time greater than Rb) has elapsed, and a bias current of 1B2 is applied to the bias line BL, and the write line WL corresponds to the three-value information of "11,""0", and '-1". A write current of 1 W is applied. In this case, the bias current 1B2 is, when the write current 1w is zero,
Critical current of Josephson junction element Jl, J2 1C1,1
This value is set to be smaller than C2.

Figure 3 shows the above-mentioned reset current 1B1 and bias current 1B.
2 and write current 1w. When the ternary information is 17, the write current 1w is positive as shown by the solid line, and when it is "01" it is zero as shown by the dotted line, and "-1". When , the polarity is negative as shown by the chain line.As a result, the persistent current is in three states in the direction of the solid line, zero, and in the direction of the dotted line in the superconducting current loop LP, and ternary information is stored. Fourth
The figure shows a Josephson junction element Jl, J with a write current of 1 W.
2 shows the change in critical current 1C1, 102 of 2. If the write current [w is zero with bias current B2 flowing, the bias current IB2 is
, J2 almost equally, and the state at that time is point A. When a write current of 1w flows based on information of 1″, BIB
Since the state becomes 21B2 and 1C1×1,102>1, Josephson junction element J1 transitions to the voltage state.

Further, when the write current 1w based on the information of "-1" flows through IB2, the state is at point C and ICl>-, IB2IC1<-, so Josephson junction element J2 transitions to the voltage state.

Figures 5A and 5B show the current 11, 12 versus voltage Vl, 2 characteristics of Josephson junction elements Jl, J2. When the write current 1w = "11, Josephson junction element J1 is A1
transition from point to voltage state.

However, since the Josephson junction element J2 is connected in parallel, only the Josephson junction element J1 cannot remain in the voltage state, and the operating point moves in the direction of the arrow A'
Reach the point. At the same time, Josephson junction element Jl
, J2 must be a bias current of 1B2, so Josephson junction element J2 has A
Move from 2 points to AI, resulting in 11x0,12≧IB
It becomes 2. After that, when the bias current 1B2 becomes zero, 1
1,12 decreases by approximately IB2/2, so 11)-
1B2/212 1B2/2. Therefore, a persistent current flows in the direction of the solid arrow in FIG. Also 1-1″
In the case of a write current of 1 w due to the information of , a persistent current flows in the direction of the dotted line arrow in Fig. 2 due to the operation opposite to the above-mentioned operation, and for the information of ``, the write current of 1 w is zero. Therefore, the persistent current becomes zero.

Readout is performed by passing a readout current of 1 s through the readout line RL, and the same relationship as explained in FIG. Therefore, depending on the state of persistent current, Josephson junction element J3
, J4 becomes a voltage state or both remain in a zero voltage state.

As a result, the direction of the current 1R becomes either a solid arrow, a dotted arrow, or zero. Therefore, by flowing a read current 1 s through the read line, ternary information can be read out depending on the state of the current 1 R. Note that if the read signal is to be extracted as a voltage, a resistor may be inserted into the line through which the current R flows. FIG. 6 shows a schematic perspective view of a memory element using the Josephson junction element shown in FIG. 2, and the same reference numerals as those in FIG. 2 indicate the same parts. Note that the crossing portions and overlapping portions of each line are insulated from each other by a well-known crossover technique or the like. As explained above, the present invention first provides a memory element having a superconducting current loop LP including two Josephson junction elements Jl, J2.
A reset current B1 larger than the sum of the critical currents of 2 and 2 is applied;
Thereby, the contents already stored are erased, and then a bias current IB2 smaller than the critical current of Josephson junction elements Jl and J2 is applied, and the write line WL is set to have positive and negative values corresponding to the three-value logic information. , zero, and a write current of 1 W is caused to flow in the superconducting current loop LP, thereby causing a permanent current to flow in the superconducting current loop LP in any of the states of clockwise rotation, counterclockwise rotation, and zero.
These three states are stored as three-value logic information, and the three-value logic information is stored in the superconducting current loop LP.
Two Josephson junction elements J3 and J4 placed close to each other
can be read out non-destructively by using it as a gate. Therefore,
It is possible to store ternary logic information in a memory element using a Josephson junction element, and it is possible to bring out the advantages of using a Josephson junction element as well as the advantages of using ternary logic.

[Brief explanation of the drawing]

Figure 1 shows a circuit of a memory element using a conventional Josephson junction element, Figure 2 shows a circuit according to an embodiment of the present invention, Figure 3 is a waveform diagram for explaining a write operation, and Figure 4 shows the criticality of a Josephson junction element. FIG. 5 is a diagram illustrating the dependence of current on write current; FIG. 5 is a diagram illustrating the operating point according to the current vs. voltage characteristic of a Josephson junction element; and FIG. 6 is a schematic perspective view of an embodiment corresponding to FIG. 2.

Claims (1)

[Claims] 1. In a memory element having a superconducting current loop including two Josephson junction elements, a reset current larger than the sum of the critical currents of the Josephson junction elements is passed through the superconducting current loop to store information by persistent current. Erase the
Next, a bias current smaller than the critical current of the Josephson junction element is caused to flow, and a write current corresponding to the ternary logic information is caused to flow through a write line disposed close to the Josephson junction element, whereby the A three-value device using a Josephson junction element, which stores three-value logic information as one of three states: a clockwise or counterclockwise persistent current flows in a conduction current loop, or no persistent current. Logical storage method.