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JPS5953639B2 - Three-value logic memory element using Josephson junction element - Google Patents
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JPS5953639B2 - Three-value logic memory element using Josephson junction element - Google Patents

Three-value logic memory element using Josephson junction element

Info

Publication number
JPS5953639B2
JPS5953639B2 JP52143188A JP14318877A JPS5953639B2 JP S5953639 B2 JPS5953639 B2 JP S5953639B2 JP 52143188 A JP52143188 A JP 52143188A JP 14318877 A JP14318877 A JP 14318877A JP S5953639 B2 JPS5953639 B2 JP S5953639B2
Authority
JP
Japan
Prior art keywords
josephson junction
magnetic field
current
external magnetic
current loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52143188A
Other languages
Japanese (ja)
Other versions
JPS5475239A (en
Inventor
信也 蓮尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP52143188A priority Critical patent/JPS5953639B2/en
Publication of JPS5475239A publication Critical patent/JPS5475239A/en
Publication of JPS5953639B2 publication Critical patent/JPS5953639B2/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5607Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using magnetic storage elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/44Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Description

【発明の詳細な説明】 本発明は、ジョセフソン接合素子を含む超伝導電流ルー
プにより磁束量子の状態を3値論理に対応ざせて記憶さ
せるジョセフソン接合素子を用いた3値論理記憶素子に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ternary logic storage element using a Josephson junction element that stores magnetic flux quantum states in correspondence with ternary logic using a superconducting current loop that includes the Josephson junction element. It is.

現在の電子計算機等に於いては、2値論理に基いて演算
処理や情報の記憶が行なわれているのが一般的である。
In current electronic computers, arithmetic processing and information storage are generally performed based on binary logic.

このような2値論理は、スイッチのオン、オフを2進数
の“l’’、“o”に対応させることを基本とするもの
であるから、トランジスタやダイオード等により演算回
路や記憶回路を容易に構成することができる。又ジョセ
フソン接合素子を用いた2値論理情報の記憶手段も既に
知られており、高速動作可能で、高密度化並び極低消費
電力化が容易である利点がある。このジョセフソン接合
素子を用いた記憶素子は、そのジョセフソン接合素子を
含む超伝導電流ループに流れる永久電流の方向を2値論
理に対応させるのが一般的である。これを更に極低電力
化する構成として、磁束量子Φ。
This kind of binary logic is based on making the on/off of a switch correspond to the binary numbers "l" and "o", so it is easy to construct arithmetic circuits and memory circuits using transistors, diodes, etc. In addition, binary logic information storage means using Josephson junction elements is already known, and has the advantage of being able to operate at high speed and easily achieving high density and extremely low power consumption. In a memory device using this Josephson junction element, the direction of persistent current flowing in a superconducting current loop including the Josephson junction element is generally made to correspond to binary logic. As a configuration, the magnetic flux quantum Φ.

(=−=2.07×10−15weber)に相当する
磁束を、ジョセフソン接合素子を含む超伝導電流ループ
内に出し入れする形式の記憶素子も提案されている。
A storage element has also been proposed in which a magnetic flux equivalent to (=-=2.07×10 −15 Weber) is introduced into and taken out of a superconducting current loop including a Josephson junction element.

又3値論理による情報の処理も種々提案されており、3
値論理を用いた場合には次のような利点を有するもので
ある。
Various information processing methods using ternary logic have also been proposed.
The use of value logic has the following advantages.

(1)同じ情報量の処理の為に必要なディジット数が少
なく、高速処理が可能である。
(1) The number of digits required to process the same amount of information is small, and high-speed processing is possible.

(2)同じ伝送媒体に対して利用効率が高い。(2) High utilization efficiency for the same transmission medium.

(3)記憶密度が高い。しかし、トランジスタやダイオ
ード等による回路で、3値論理による処理を行なわせる
と、回路構成が非常に複雑になり、前述の利点を充分に
発揮することができなかつた。
(3) High storage density. However, if a circuit using transistors, diodes, etc. is used to perform processing based on three-value logic, the circuit configuration becomes extremely complicated, and the above-mentioned advantages cannot be fully exhibited.

本発明は、ジョセフソン接合素子を含む超伝導電流ルー
プ内に磁束量子が1個有る場合と無い場合と更に有る場
合の磁束量子の向きに3値論理の゛01”、゛o’’、
−1’’を対応させて記憶させる記憶素子を提供するこ
とを目的とするものである。
The present invention uses three-valued logic ``01'', ``o'',
The object of the present invention is to provide a memory element that stores ``-1'' in correspondence with each other.

以下実施例について詳細に説明する。J 第1図に示す
ように、2個のジョセフソン接合素子J1、J2を含む
超伝導電流ループLPに外部磁界Heを印加すると、ジ
ョセフソン接合素子J1、J2がともに電圧状態になる
限界の電流値である臨界電流Icは、その外部磁界He
に対しj て第2図に示すように変化する。
Examples will be described in detail below. J As shown in Fig. 1, when an external magnetic field He is applied to the superconducting current loop LP including two Josephson junction elements J1 and J2, the current reaches the limit where both Josephson junction elements J1 and J2 are in a voltage state. The critical current Ic is the value of the external magnetic field He
j changes as shown in Figure 2.

この第2図の中央の曲線を゛o’’モードと称すると、
その゛0’’モードの中にあるような素子電流Iと外部
磁界Heと1りーを与えた場合、電流ループLP内に入
り得る磁束・Φは、磁束量子をΦ。
If we call the central curve in Figure 2 the ``o'' mode, then
When the device current I and the external magnetic fields He and 1 are given as in the "0" mode, the magnetic flux Φ that can enter the current loop LP is the magnetic flux quantum Φ.

とすると、一0.5くΦ/Φoく0.5・・・・・・(
1)の範囲となる。
Then, - 0.5 × Φ / Φo × 0.5 (
1).

この6ゲモードに隣接する曲線を61″モード及び″−
ピモードと称すると、゛11モードの曲線内の電流1と
外部磁界Heとを与えた場合、0.5≦Φ/Φo≦』.
5 ・・・・・・(2)又51″モード
に於いては1.5くΦ/Φoく−0.5......(
3)となる。
The curves adjacent to this 6 game mode are 61″ mode and ″−
If we call the phi mode, ``0.5≦Φ/Φo≦'' when a current 1 within the curve of the 11th mode and an external magnetic field He are applied.
5 ......(2) Also, in 51'' mode, 1.5 Φ/Φo - 0.5... (
3).

前述の60″,617,′−1″モードは斜線を施した
領域で重なつており、この領域内では3種類のモードが
存在し得ることを示すものである。
The aforementioned 60'', 617, and '-1'' modes overlap in the shaded area, indicating that three types of modes can exist within this area.

そこで、この3種類のモードに3値論理を対応させて情
報記憶を行なわせるものである。このような3値論理情
報を記憶させる為には電流ループLP内のインダクタン
スLl,L2に制約があり、L1+L2=Lとすると、
第2図に示すように3種類のモードが重なる為には、L
・EO O.3l8く?く1.465・・・・・・(4)Φ0の
関係が必要となる。
Therefore, information is stored by associating three-value logic with these three types of modes. In order to store such three-value logic information, there are restrictions on the inductances Ll and L2 in the current loop LP, and if L1+L2=L,
In order for the three types of modes to overlap as shown in Figure 2, L
・EO O. 3l8? 1.465 (4) The relationship of Φ0 is required.

なおIcOはジヨセフソン接合素子Jl,J2の臨界電
流を示す。例えばIcO=1mAとすると、(4)式は
0.658〔…〕くL〈3.03〔…〕 ・・・・・
・(5)となる。
Note that IcO indicates the critical current of Josephson junction elements Jl and J2. For example, if IcO=1mA, equation (4) is 0.658[...]<3.03[...]...
・It becomes (5).

前述のインダクタンスLが(4)式の条件より小さいと
、第3図に示すように、3種類のモードが重なる領域が
ないので,3値論理情報を記憶することができず、又イ
ンダクタンスLが(4)式の条件よ3り大きいと、第4
図に示すように、4種類以上のモードが重なる領域が生
じて、3値論理情報の記憶には使用できないものとなる
If the above-mentioned inductance L is smaller than the condition of equation (4), as shown in Figure 3, there is no region where the three types of modes overlap, so ternary logic information cannot be stored, and the inductance L becomes If the condition of equation (4) is greater than 3, then the fourth
As shown in the figure, an area where four or more types of modes overlap occurs and cannot be used for storing ternary logic information.

又インダクタンスLが(4)式の条件を満足するが、L
l8L2の場合には、例えば第5図に示すよう 4に、
非対称形の重なり領域が生じ、それによつて3値論理情
報の記憶が可能となる。
In addition, although the inductance L satisfies the condition of equation (4),
In the case of l8L2, for example, as shown in Figure 5, 4,
An asymmetrical overlap region is created, which allows storage of ternary logical information.

第1図に示す記憶素子に於いて、インダクタンスLl,
L2を(4)式の条件を満足するように選定し、例えば
磁束量子無しの601状態に於いて011を書込む場合
には、第6図に示すように、0→1の閾値線を越えるよ
うに制御すれば良いことになる。
In the memory element shown in FIG. 1, the inductance Ll,
If L2 is selected to satisfy the condition of equation (4) and, for example, when writing 011 in the 601 state with no magnetic flux quantum, it will exceed the 0→1 threshold line, as shown in Figure 6. It would be a good idea to control it like this.

その為に素子電流1と外部磁界Heとを同時に印加する
ことによつても可能であるが、外部磁界をHe,以上と
することによつても可能となる。即ち外部磁界Heのみ
による書込みが可能である。又”−ピを書込む場合は、
−He3以上の負方向の外部磁界を印加すれば良いこと
になる。又tl″或は61″の状態から″o等書込む場
合は、HelくHe<He3或は−He3くHe〈−H
elの外部磁界Heを印加すれば良いことになる。又前
述の書込用の磁界Hel,He3は、となる。
This can be done by simultaneously applying the element current 1 and the external magnetic field He, but it can also be done by setting the external magnetic field to He or more. That is, writing is possible using only the external magnetic field He. Also, when writing “-pi”,
It is sufficient to apply an external magnetic field in the negative direction of -He3 or more. Also, when writing "o" etc. from the state of tl" or 61", Heil He < He3 or -He3 He <-H
It is sufficient to apply an external magnetic field He of el. Further, the above-mentioned write magnetic fields He1 and He3 are as follows.

なおμ。は真空の透磁率1.257X10−6〔H/m
〕、Sは電流ループLPの面積である。電流ループLP
の面積SをS=1001tイとすると、0くHeく16
.46〔〜痛〕(0.207〔0e))・・・(8)1
.646〔Vm〕くHe3く32.91〔Vm〕(0.
414〔0e〕)・・・・・・(9)となる。
Furthermore, μ. is the magnetic permeability of vacuum 1.257X10-6 [H/m
], S is the area of the current loop LP. current loop LP
If the area S of is S=1001t, then 0kuHeku16
.. 46 [~pain] (0.207 [0e))...(8)1
.. 646 [Vm] × He3 × 32.91 [Vm] (0.
414[0e])...(9).

読出しの場合は、外部磁界と電流若しくはそれらの何れ
か一方の印加で行なうことができるが、破壊読出しとな
る。
In the case of reading, it can be performed by applying an external magnetic field and an electric current, or either one of them, but this is destructive reading.

例えば外部磁界だけ印加して読出しを行なう場合、He
lくHe<He3の外部磁界Heを印加すると、6−1
″の記憶内容の場合は、60″の状態に遷移する。又1
1″の記憶内容の場合は変化しないが、−He,〈He
〈−Helの外部磁界Heを印加すると、“01の状態
に遷移する。なお、その外部磁界Heを印加したときの
記憶内容が′−11であれば変化しない。又101の記
憶内容の場合、HelくHe<He3或は−He3〈H
eく−Helの何れかの外部磁界Heを印加しても変化
しない。前述の如き外部磁界の印加により状態遷移が生
じると、ジヨセフソン接合素子には瞬間的に電圧が発生
する。
For example, when reading by applying only an external magnetic field, He
When applying an external magnetic field He such that He<He3, 6-1
If the stored content is ``, the state transitions to 60''. Again 1
1'' does not change, but -He,〈He
When an external magnetic field He of 〈-Hel is applied, the state transitions to "01."If the stored content is '-11 when the external magnetic field He is applied, there is no change.Also, in the case of the stored content of 101, HelkuHe<He3 or -He3<H
It does not change even if any external magnetic field He is applied. When a state transition occurs due to the application of an external magnetic field as described above, a voltage is instantaneously generated in the Josephson junction element.

例えば0.1mの電圧が10PS程度の時間発生する。
従つてこの電圧を検知することにより、外部磁界との関
係によつて記憶内容を読出すことができる。しかし、外
部磁界のみを印加して読出す場合は、第1図のジヨセフ
ソン接合素子Jl,J2に発生する電圧は逆向きとなる
の 5で、電流ループLPと外部回路との接続点間の電
圧を検知しようとしても、打消し合つて何も現われない
ことになる。又電流だけ印加して読出す場合には、61
″と!丁”との何れの記憶内容の場合に於いても602
゛の状態に遷移し、611と″−1″と1の区別ができ
ないものとなる。そこで電流と外部磁界とを同時に印加
すれば、3値論理情報の記憶内容を読出すことができる
For example, a voltage of 0.1 m is generated for a period of about 10 PS.
Therefore, by detecting this voltage, the stored contents can be read out in relation to the external magnetic field. However, when reading by applying only an external magnetic field, the voltages generated in Josephson junction elements Jl and J2 in Figure 1 are in the opposite direction.5, so the voltage between the connection point of the current loop LP and the external circuit is Even if you try to detect them, they will cancel each other out and nothing will appear. Also, when reading by applying only current, 61
602 in the case of any memory contents of ``and! ding''
611, "-1", and 1 cannot be distinguished. Therefore, if a current and an external magnetic field are applied simultaneously, the stored contents of the ternary logic information can be read out.

即ち第7図に示すように、電流1の方向と外部磁界He
の方向及び大きさの選定により、即ち正方1向の電流、
正方向の磁界を印加すると10゛,T゛の状態では状態
の遷移はないが、Tl7の状態は60゛に遷移し、一方
負方向の電流、負方向の磁界を印加すると“−1″,虹
゛の状態では状態の遷移はないが61゛の状態は10゛
2に遷移するので、T′ jと′−rとを区別して読出
すことができる。なお“0″の記憶内容の場合には、外
部磁界のみ及び電流のみ印加した場合と同様に状態遷移
は生じない。又インダクタンスLl,L2を相違させて
おくことにより電流だけ印加して3値論理情報の読出し
を行なうことができる。即ちインダクタンスLl,L2
を相違させておくことにより、第5図に示すような非対
称形の特性となり、電流を正の方向に流したとき、″−
1゜゛の記憶内容であれば“0”の状態への遷移が生じ
るが、“1゛の記憶内容であれば10″の状態には遷移
せず、反対に電流を負の方向に流したとき、11″の記
憶内容であれば60″の状態に遷移することになる。そ
して電流を正の方向に流して状態遷移が生じると、電流
ループと外部回路との接続点間には正の電圧が生じ、電
流を負の方向に流して状態遷移が生じると、負の電圧が
生じる。前述の如く3値論理情報の読出しは2動作によ
つて行なわれ、何れの駆動条件によつても電圧が検出さ
れなければ゛0”、何れか一方の駆動条件で電圧が検出
されると61″、他方の駆動条件で電圧が検出されると
′−1゛の読出情報となる。
That is, as shown in FIG. 7, the direction of the current 1 and the external magnetic field He
By selecting the direction and magnitude of , that is, the current in one square direction,
When a positive magnetic field is applied, there is no state transition in the state of 10゛ and T゛, but the state of Tl7 changes to 60゛, while when a negative direction current and a negative magnetic field are applied, the state changes to "-1", In the rainbow state, there is no state transition, but in the 61° state there is a transition to 10°2, so T'j and '-r can be read out separately. Note that in the case of the stored content of "0", no state transition occurs as in the case where only the external magnetic field and only the current are applied. Furthermore, by making the inductances Ll and L2 different, it is possible to read out ternary logic information by applying only a current. That is, inductance Ll, L2
By making the
If the memory content is 1゜゛, a transition to the “0” state will occur, but if the memory content is “1゛”, the transition will not occur to the “10” state.On the contrary, when the current is passed in the negative direction , 11'', the state transitions to 60''. When current flows in the positive direction and a state transition occurs, a positive voltage is generated between the connection point between the current loop and the external circuit, and when current flows in the negative direction and a state transition occurs, a negative voltage is generated. occurs. As mentioned above, the reading of ternary logic information is performed by two operations; if no voltage is detected under any of the driving conditions, it will be ``0'', and if voltage is detected under either driving condition, it will be 61. '', if the voltage is detected under the other driving condition, the read information will be '-1''.

第8図は読出回路を含む本発明の実施例を示すもので、
2個のジヨセフソン接合素子Jl,J2とインダクタン
スLl,L2とを含む超伝導電流ループLP(7)A点
とB点との間に負荷抵抗R1と線Cとを接続し、この線
Cに近接してジヨセフソン接合素子J3,J4を配置し
、これらのジヨセフソン接合素子J3,J4の直列回路
と並列に負荷抵抗R2,R3の直列回路を接続し、ジヨ
セフソン接合素子J3,J4の接続点と負荷抵抗R2,
R3の接続点との間に出力線路Dを接続する。読出用の
電流1と外部磁界Heとをそれぞれ正の方向に印加する
と、記憶内容が′−1゛のときのみ線Cには矢印方向に
状態遷移に伴なうA,B点間の電圧による電流が流れる
。そしてバイアス電流1Rを流しておくと、ジヨセフソ
ン接合素子J3(又はJ4)だけ電圧状態となり、出力
線路Dには矢印方向の電流が流れる。又読出用の電流I
と外部磁界Heとをそれぞれ負の方向に印加すると、記
憶内容がT”のときのみ出力線路Dには矢印と反対方向
に電流が流れる。なお記憶内容が“0”であれば、出力
線路Dには電流1及び外部磁界Heの方向に関係なく電
流が流れない。第9図は第8図の回路構成の概略斜視図
を示し、第8図と同一符号は同一部分であり、Hは超伝
導電流ループLPに外部磁界Heを加える為の電流を流
す線路である。
FIG. 8 shows an embodiment of the present invention including a readout circuit.
A superconducting current loop LP including two Josephson junction elements Jl, J2 and inductances Ll, L2 (7) A load resistor R1 and a line C are connected between points A and B, and a wire C is connected in the vicinity of this line C. Then, the series circuit of load resistors R2 and R3 is connected in parallel with the series circuit of these Josephson junction elements J3 and J4, and the connection point of Josephson junction elements J3 and J4 is connected to the load resistance. R2,
An output line D is connected between the connection point of R3. When a reading current 1 and an external magnetic field He are applied in the positive direction, only when the memory content is '-1', line C shows a voltage due to the voltage between points A and B due to state transition in the direction of the arrow. Current flows. When a bias current 1R is allowed to flow, only Josephson junction element J3 (or J4) becomes a voltage state, and a current flows in the output line D in the direction of the arrow. Also, the read current I
and an external magnetic field He are applied in the negative direction, a current flows in the direction opposite to the arrow in the output line D only when the memory content is "T".If the memory content is "0", the output line D No current flows regardless of the direction of the current 1 and the external magnetic field He. Fig. 9 shows a schematic perspective view of the circuit configuration of Fig. 8, where the same reference numerals as in Fig. 8 indicate the same parts, and H indicates superposition. This is a line through which a current flows to apply an external magnetic field He to the conduction current loop LP.

そして超伝導電流ループLPは両側のジヨセフソン接合
素子Jl,J2を挟んだ上下の線路により構成され、イ
ンダクタンスはその上下の線路の幅、厚さ及び長さの選
定により(4)式の条件を満足する値に構成されている
。このような記憶素子は、絶縁基板上に多数形成して記
憶装置を構成するものであり、記憶素子は微小面積とす
ることが可能であるから、大容量の記憶装置とすること
も容易であり、又消費電力は一般の半導体集積記憶素子
に比較して2〜3桁小さくすることができるので、高密
度化が容易となる。更に3値論理記憶素子であるから、
大容量の情報記憶が可能となる。以上説明したように、
本発明は、2個のジヨセフソン接合素子Jl,J2を含
む超伝導電流ループLPのインダクタンスLを(4)式
の条件によつて定めることにより、磁束量子Φ。
The superconducting current loop LP is composed of upper and lower lines sandwiching Josephson junction elements Jl and J2 on both sides, and the inductance satisfies the condition of equation (4) by selecting the width, thickness, and length of the upper and lower lines. is configured to a value of A large number of such memory elements are formed on an insulating substrate to constitute a memory device, and since the memory element can have a minute area, it is easy to create a large-capacity memory device. Furthermore, since the power consumption can be reduced by two to three orders of magnitude compared to a general semiconductor integrated memory element, it becomes easy to increase the density. Furthermore, since it is a ternary logic storage element,
Large capacity information storage becomes possible. As explained above,
In the present invention, the magnetic flux quantum Φ is determined by determining the inductance L of the superconducting current loop LP including two Josephson junction elements Jl and J2 according to the condition of equation (4).

1個を正方向、逆方向又は無しの3種類の状態とするこ
とができ、その3種類の状態を3値論理情報に対応させ
て記憶させるものであつて、ジヨセフソン接合素子を用
いた記憶素子により3値論理情報を記憶させることがで
きる。
A memory element using a Josephson junction element, which can have one state in three types: forward direction, reverse direction, or none, and stores the three types of states in correspondence with three-valued logic information. It is possible to store ternary logical information.

従つて極低消費電力且つ高密度記憶を容易に実現するこ
とができる。
Therefore, extremely low power consumption and high density storage can be easily achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の説明図、第2図乃至第5図は
、超伝導電流ループのインダクタンスによる外部磁界対
臨界電流特性曲線図、第6図及び第7図は書込み及び読
出し動作の説明図、第8図よ検出回路を含む本発明の実
施例の回路図、第91は第8図の回路構成の記憶素子の
概略斜視図で)る。 J1〜J4はジヨセフソン接合素子、Ll,、2はイン
ダクタンス、LPは超伝導電流ループ、L1〜R3は負
荷抵抗、Heは外部磁界でぁる。
Fig. 1 is an explanatory diagram of an embodiment of the present invention, Figs. 2 to 5 are external magnetic field versus critical current characteristic curves due to inductance of a superconducting current loop, and Figs. 6 and 7 are writing and reading operations. FIG. 8 is a circuit diagram of an embodiment of the present invention including a detection circuit, and FIG. 91 is a schematic perspective view of a memory element having the circuit configuration of FIG. 8. J1 to J4 are Josephson junction elements, Ll, 2 are inductances, LP is a superconducting current loop, L1 to R3 are load resistances, and He is an external magnetic field.

Claims (1)

【特許請求の範囲】[Claims] 1 ジョセフソン接合素子を2個含む超伝導電流ループ
のインダクタンスLを、前記ジョセフソン接合素子の臨
界電流をIc_0、磁束量子をΦ_0としたとき、0.
318≦[L・Lc_0]/[Φ_0]≦1.465の
条件を満足する値とし、前記超伝導電流ループに磁束量
子1個を正方向、逆方向又は無しの3種類の状態として
記憶させ、前記3種類の状態を3値論理情報に対応させ
たことを特徴とするジョセフソン接合素子を用いた3値
論理記憶素子。
1 The inductance L of a superconducting current loop including two Josephson junction elements is 0.0, where the critical current of the Josephson junction element is Ic_0 and the magnetic flux quantum is Φ_0.
The value satisfies the condition of 318≦[L・Lc_0]/[Φ_0]≦1.465, and one magnetic flux quantum is stored in the superconducting current loop as three types of states: forward direction, reverse direction, or none, A ternary logic storage element using a Josephson junction element, characterized in that the three types of states correspond to ternary logic information.
JP52143188A 1977-11-29 1977-11-29 Three-value logic memory element using Josephson junction element Expired JPS5953639B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52143188A JPS5953639B2 (en) 1977-11-29 1977-11-29 Three-value logic memory element using Josephson junction element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52143188A JPS5953639B2 (en) 1977-11-29 1977-11-29 Three-value logic memory element using Josephson junction element

Publications (2)

Publication Number Publication Date
JPS5475239A JPS5475239A (en) 1979-06-15
JPS5953639B2 true JPS5953639B2 (en) 1984-12-26

Family

ID=15332916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52143188A Expired JPS5953639B2 (en) 1977-11-29 1977-11-29 Three-value logic memory element using Josephson junction element

Country Status (1)

Country Link
JP (1) JPS5953639B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62165789U (en) * 1986-04-08 1987-10-21

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62165789U (en) * 1986-04-08 1987-10-21

Also Published As

Publication number Publication date
JPS5475239A (en) 1979-06-15

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