JPS6010454B2 - pulse generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse generator used for frequency setting of a receiver such as an audio tuner or a transceiver.

Generally, a plurality of detected parts are set at regular intervals on a moving body such as a rotating body, and the detected parts are detected by a first and a second detector in different phases. The rising or falling edge of the pulse output from the first detector is input to the addition/subtraction counter, and the outputs from the first and second detectors are calculated to issue an addition or subtraction command. A pulse generating device is known.

That is, to explain using the waveform diagram of FIG. 29, the output pulse A from the first detector is input to the addition/subtraction counter at the falling edge a, and the outputs from the first and second detectors at this falling edge are Pulses A and B are calculated to determine whether to add or subtract the falling signal. By the way, when this type of pulse generator is used to set the frequency of a transceiver, etc., when setting the rotating body by rotating it in the forward direction using a setting dial with a scale, there is a point where it should be stopped at the count number n. When I rotated too much and stopped at the n11 position, I then turned it in the opposite direction and stopped at the n position.Although the dial displayed M as expected, the addition/subtraction counter changed from n11 to n. At the time of transition, the pulse A from the first detector has a rising edge b, so this is not counted (subtracted) and the count number remains n+1.

In other words, the dial display and the actual count do not match. To improve this, we obtain independent pulses at the rise and fall of the pulses output from either of the detectors, and use these pulses to count additions or subtractions. A generator has been proposed. However, with this device, if the position where the dial is stopped is at the boundary between whether or not a pulse is output from the detector, vibrations may occur in the detector or the detected part even though the dial is not operated. Even if it moves slightly, a chattering pulse is generated and the counter is counted.
Furthermore, as input conditions to the counter, it depends on the state when the dial is stopped. There are two types of rotation directions, right or left, right before the stop of the rotation.Depending on these conditions, miscounts or misjudgments may occur. Embodiments of the Invention The object of the present invention is to provide a pulse generation device which performs appropriate logical processing using a sequential circuit based on input pulses, thereby solving all the drawbacks of the above-mentioned subsystems at once.Embodiments of the Invention will be explained according to the drawings. The first and second figures also show the first and second detectors 1 and 2 and the parts to be detected by them.

In other words, a slit-shaped detected portion 4 is attached to a moving body 3 rotating in a clockwise rotation U or a left rotation D.
is set, and as the moving body 3 moves, the slit-shaped detected portion 4 is connected to the light-emitting element a (2a) and the light-receiving element ib.
(2b) A first detector such as a transmission type photo sensor, and a second detector 2 are used for detection. Of course, the movable body 3 may be one that reciprocates linearly, and instead of the slit, a black and white mark may be used to detect it with a reflective photo sensor. Furthermore, the detected portion 4 and the sensing bodies 1 and 2 may each be a magnet, a Hall element, or the like. As shown in FIG. 1, the positions of the first and second detectors 1 and 2 with respect to the detected part 4 are shifted from each other along the direction of movement of the moving body 3. Accordingly, the first detector 1 and the second
The detected part tortoise is detected with a phase difference of, for example, 900 from that of the detector 2 .

FIG. 3 is a circuit showing an example of the t signal processing section. In the same figure, Officer G and 2 are the first and second officers explained in the figure.
, the first and second input pulses P, ?, which have different phases from each other, are generated by the detectors 1 and 2. P2 is occurring.

Note that an amplifier circuit or a Schmitt circuit (not shown) may be connected to the rear stage of the detectors 1 and 2, respectively. In the circuit group constituting the first circuit that receives the first and second input pulses P and P2, for example, the second and third product circuits 6 and 9 each constituted by an AND gate. Made of crab.

For example, the first input pulse P is
The fourth circuit group constitutes the second product which receives the inverted input pulse P, which is inverted by the second input pulse P, and the second input pulse 2. There is. The circuit forming the first sum receiving each output pulse of the circuit group forming the i-th product is composed of, for example, an OR gate. The first sequential circuit is formed by the circuit group cod forming the product and the circuit Fujin forming the sum. Turtle Milk Ma 2nd
This circuit constitutes a second sum that receives each output pulse of the circuit group constituting the product of . ``The circuit turtle forming the second product and the circuit turtle 5 forming the second sum form a second sequential circuit. 16 is the first and second input pulse P, , P2. These input pulses P, , P2 are inverted by NOT gates 10 and 17, respectively, and constitute a third product. or first
It consists of 0 product circuits 18-21.

Reference numeral 22 denotes a circuit forming a third sum receiving each output pulse of the circuit group 16 forming the third product, and is formed of, for example, an OR gate.

Next, the inputs of each bond circuit 6-8, 11-13, and 18-21 will be explained.

The first product circuit 6 receives the output pulse S, of the circuit 14 constituting the first sum together with the first input pulse P, and the second thin circuit 7 receives the output pulse S, as the second input pulse. P2
The third product circuit 8 receives both the first and second input pulses P, , P2.

Further, the fourth circuit 11 is a circuit 15 constituting the second sum.
The fifth product circuit 12 receives the output pulse S2 together with the first input pulse P, the fifth product circuit 12 receives the output pulse S2 together with the second input pulse P2, and the sixth product circuit 13 receives the first inverted input pulse P. , and the second input pulse P2. Further, the seventh thin circuit 18 converts the output pulse S, of the circuit 14 constituting the first sum into a not gate 2, for example.
The inverted output pulse S, which is inverted at step 3, is the first input pulse P.
, and the eighth thin circuit 19 converts the output pulse S2 of the circuit 15 constituting the second sum into a second inverted input pulse P.
The output pulse S of the circuit 14, which is received together with the ninth product circuit 2 and constitutes the first sum, is input to the first inverted input pulse P.
, and the tenth thin circuit 21 receives, together with the second input pulse P2, an inverted output pulse S2 obtained by inverting the output pulse S2 of the circuit 15 constituting the second sum by a not gate 24, for example. Reference numeral 25 denotes a circuit that forms an exclusive sum, for example, an exclusive OR gate, and receives the output pulses S, , S2 of the circuit boxes 4, 15 that form the first and second sums.

The output C of the exclusive sum circuit 25 is used as a count signal of an addition/subtraction counter (not shown), and the output J of the third sum circuit 22 is used as an addition/subtraction determination signal.

4 to 27 show the waveforms of each pulse under various conditions of the circuit in FIG.
The figure shows the relationship between the rotational direction of the detected part 4 (Figure 1) and the signal level of the input pulses P, P2 when stopped. This shows what happens when chattering occurs, and the 20th
Figures 27 to 27 show the input/output relationship for inversion and fine adjustment after the power is turned on.

In addition, in the figure, the chain line X indicates the rotation U of the detected part 4 in FIG.
Alternatively, it shows the stopping point when the rotation is stopped from left rotation D and then left rotation D or right rotation U is performed. Also, P.・S,,S2・P2,S.・P,,P2・S2
1 shows the waveform of the output pulse of each product circuit 18 to 21 of the circuit group 16 forming the third product forming the addition/subtraction discrimination circuit, that is, the waveform of the input pulse to the circuit 22 forming the third sum. Figure 4: Rotate clockwise → stop both P and P2 at L level → rotate counterclockwise.

Figure 5: Left rotation → P, P2 both stop at L level → right rotation.

Figure 6: Rotate clockwise → P, stops at H level, P2 stops at L level → Rotates counterclockwise.

Figure 7: Counterclockwise rotation → P, stops, P2 stops at L → clockwise rotation.

Figure 8: Right rotation → P, . Both P2 stopped at the end → turned counterclockwise. Figure 9: Left rotation → P, , P2 both stop at 1 → clockwise rotation.

Figure 10: Rotate clockwise → P, stops at L, P2 stops at day → rotate counterclockwise.

Figure 1 1: Left rotation → P, stops at L, P2 stops at day → clockwise rotation.

As can be seen from FIG. 4, when the pulse generator with the above configuration is used, for example, to set the frequency of a transceiver,
When setting the moving body 3 (Fig. 1) by rotating it clockwise, if it rotates too far and stops at the n+1 position when it should stop at the counter number n, the setting dial (not shown) and the addition/subtraction counter will lose their count. Both numbers are n+1.

After that, when the counterclockwise rotation is performed to correct the above-mentioned overspeed, the input pulse P2 is counted at this point, as the fall during the clockwise rotation becomes a rise during the counterclockwise rotation, but at this time, as shown in the same figure. In this case, pulse J is at L level, and n11 is subtracted from n. Similarly, if you make a mistake by rotating counterclockwise to n-1 when it should be set to n, and then correcting it by rotating clockwise, the rising edge of the clockwise rotation becomes the falling edge of the counterclockwise rotation, and the count is counted at this point. At this time as well, the pulse J is at the L level and the counter subtracts from n to n-1. In this way, the counter is added and subtracted by correctly following the dial setting value, and as a result, the dial display and the actual count always match.

Note that this also serves as a countermeasure against overrun (over-rotation) and malfunction when detecting a rotating body or the like to which a click mechanism is attached. Further, as can be seen from FIGS. 4 to 11, the signal level of the first input pulse P, when the moving body is stopped, the signal level of the second input pulse P2, and the rotation direction of the moving body immediately before it stops. , when the count output C becomes H level under all eight conditions,
In other words, when the voltage rises, the addition/subtraction determination output J is always fixed at the day or L level, and no miscount or misjudgment occurs in the counter.

Next, the conditions shown in FIGS. 12 to 19 are as follows.

Figure 12: During clockwise rotation, chattering occurs at the rise of the first input pulse P.

Figure 13: Chattering occurs at the rise of the second input pulse P2 during counterclockwise rotation.

Figure 14: During clockwise rotation, chattering occurs at the falling edge of the first input pulse P.

Fig. 5: Chattering occurs at the falling edge of the second input pulse P2 during counterclockwise rotation.

Figure 16: During clockwise rotation, chattering occurs at the rise of the second input pulse P2.

Figure 17: During left rotation, chattering occurred at the rising edge of the first input pulse P.

Figure 18: During clockwise rotation, chattering occurs at the falling edge of the second input pulse P2.

Figure 19: During left rotation, chattering occurs at the falling edge of the first input pulse P.

As can be seen from the waveform diagrams in Figures 12 to 19 above,
In the rotating direction of the moving object, when chattering occurs under any of the eight conditions of the rising and falling edges of each of the input pulses P and P2, chattering occurs in the addition/subtraction discrimination signal J. However, at this time, the count signal C is fixed to either the H level or the 1 level, so the count does not occur.

In addition, as shown in FIG. 1, the detectors 1 and 2 are approximately 9
Since they are arranged with a phase difference of 0.00, when one is at the boundary between on and off, the other is completely on or off, and the input pulses P, , P2 do not cause chattering at the same time. Furthermore, as can be seen from Figures 20 to 27, with this circuit configuration, no matter what logic level the circuit is at when the power is turned on, or whether it is rotated clockwise or counterclockwise, it will work normally. Counting is done, ie, no additional power reset circuitry is required in the circuit. FIG. 28 is a diagram illustrating the circuit of the signal processing section of FIG. 3 using a pooled algebra formula, and parts having the same functions as each circuit in FIG. 3 are given the same reference numerals.

That is, in the embodiment shown in FIG.
8, 11 to 13, 18 to 21 are the AND gates;
The circuit 10 configuring the inversion; the gates 7, 23, and 24 were constructed using NOT gates, and the circuit 25 configuring the exclusive sum was constructed using an exclusive OR gate. If so, these circuits may be composed of any logic elements.

As described in detail above, according to the pulse generator according to the present invention, the signal level state of the input pulses P, ? The state of the logic level in the circuit when it is turned on, corrections due to over-speed and reverse rotation when setting the dial, etc.
Under no circumstances will miscounts or misjudgments occur.

[Brief explanation of the drawings] Fig. 1 is a front view showing the arrangement relationship between a moving body and the first and second detectors; Fig. 2 is a side view of the same, and Fig. 3 is an example of the signal processing unit. Figures 4 to 27 are waveform diagrams of each pulse under various conditions to explain the operation, Figure 28 is a diagram schematized using the Pool 0 algebraic formula, and Figure 29 is It is a waveform diagram for explaining the counting state of the conventional pulse generator.
None, circuit forming the third product, 9...Circuit group forming the second product, 11-13...Fourth none, circuit forming the sixth product, 14. ...Circuit constituting the first sum, 15...Circuit constituting the second sum, 1
6...Circuit group constituting the third product, 19-21
...Circuit constituting the 7th to 10th products, 22.
. . . Circuit forming the third sum, 25... Circuit forming the exclusive sum. Figure 1 Figure 2 Figure 29 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure Heron Boat

Claims (1)

[Claims] 1 A circuit group 5 constituting a first product that receives first and second input pulses P_1 and P_2 having different phases output from detectors arranged with a phase difference of about 90° from each other.
and the inverted input pulse @P_1 of the first input pulse P_1
a circuit group 9 forming a second product that receives @ and a second input pulse P_2; a circuit 14 forming a first sum receiving each output pulse of the circuit group 5 forming the first product; a circuit 15 forming a second sum receiving each output pulse of the circuit group 9 forming a second product; and a circuit 15 forming a second sum receiving each output pulse of the circuit group 9 forming a second product;
_1, P_2 and their inverted input pulses @P_1@, @
A circuit group 16 forming a third product receiving P_2@;
A circuit 22 forming the third sum receives each output pulse of the circuit group 16 forming the third product. a first receiving an output pulse S_1 together with a first input pulse P_1;
The circuit 6 constituting the product of
It consists of a circuit 7 that configures a second product received together with the input pulse P_2 of , and a circuit 8 that configures a third product that receives both the first and second input pulses P_1 and P_2. The constituting circuit group 9 is the circuit 1 constituting the second sum.
5 output pulse S_2 as the first inverted input pulse @P_1
A circuit 11 constituting a fourth product received together with @■, a circuit 12 constituting a fifth product receiving the output pulse S_2 together with the second input pulse P_2, and a circuit 12 constituting a fifth product receiving the output pulse S_2 together with the second input pulse P_2; The circuit group 13 that forms the sixth product receives both the input pulse P_2 of the input pulse P_2, and the circuit group 16 that forms the third product receives the inverted output pulse @S_1@ of the circuit 14 that forms the first sum. the circuit 18 which constitutes the seventh product received together with the input pulse P_1 of 1 and the eighth product which receives the output pulse S_2 of the circuit 15 which constitutes the second sum together with the second inverted input pulse @P_2@ a circuit 19, a circuit 20 forming a ninth product which receives the output pulse S_1 of the circuit 14 forming the first sum together with a first inverted input pulse @P_1@, and a circuit 15 forming the second sum. A circuit 21 constituting a tenth product receiving the inverted output pulse @S_2@ together with the second input pulse P_2
a circuit 14 comprising a first sum and a second sum;
Pulse generation characterized in that the output C of a circuit 25 forming an exclusive sum receiving 15 output pulses S_1 and S_2 is used as a count signal, and the output J of a circuit 22 forming a third sum is used as an addition/subtraction discrimination signal. Device.