JPS6015278B2 - Drive circuit for thin film EL element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit that prevents the phenomenon of erasing written picture elements that occurs during write driving of a thin film EL element with memory.

The structure and characteristics of the thin film EL matrix element with memory are explained in Japanese Patent Application No. 83767/1983 filed by the applicant entitled "Drive Circuit for Large Capacity/Gender Display Element" (see Japanese Patent Application Publication No. 52-6412) and others. However, I will briefly explain it again.

In a thin film EL display device, transparent electrodes are arranged in stripes on a glass substrate, and on this, for example, Y203, Si3N4, Ti0
2. A dielectric material such as Ai203 is further applied, for example, M
N-doped ZnS (yellow light emitting), etc., and on top of that, Y203, Si3N4, Ti02, AI203
A dielectric material such as the above is deposited to a thickness of 500 to 10,000 A using thin film techniques such as vapor deposition or sputtering to form a double-insulated three-layer structure, and a striped electrode is placed on top of the dielectric material in a direction orthogonal to the transparent electrode. are arranged to form a matrix electrode.

In a three-layer thin film EL display with such a structure, the first
When one of the electrode groups and one of the second electrode group are selected and an appropriate alternating current voltage is applied, a small area sandwiched between the two electrodes crosses and emits light. This corresponds to one picture element on the screen. By combining these, characters, symbol patterns, etc. are displayed. ELs with this type of structure have superior characteristics in terms of brightness, lifespan, and stability compared to conventional distributed EL elements, but this EL has a new effect between applied voltage and luminance. Shows hysteresis characteristics.

When first applying a pulse of voltage amplitude V, the brightness is at a low level of brightness B,. Here, the sustaining voltage V, is V,>V, where Vth is the light emission function voltage. When the sustaining voltage V, is continuously applied, the brightness B, is maintained. Next, write voltage V2
When V is applied, the brightness increases all at once to a high level of brightness &, and even if the voltage is returned to the maintenance voltage V again within a certain period of time, the brightness settles to the previous brightness B, which is higher brightness &. The brightness B2 is maintained by continuously applying the sustaining voltage V. In this state, when the erase voltage V3 is next applied, the brightness level decreases rapidly, and when it is returned to the sustaining voltage V, it settles to the previous low level of brightness B. This hysteresis phenomenon can take any small loop depending on the amplitude, pulse width (not shown), and pulse frequency of the write voltage. That is, it is also possible to display halftones. A major feature of this EL display device, which other display devices do not have, is that once a write voltage or erase voltage is applied, each picture element continues to emit light without losing the gradation given to it by the sustain pulse. It is.

Each of the above voltages varies depending on the physical conditions of composition and film thickness, manufacturing conditions, and applied waveform, but in a prototype example, Vth
=200V, V, :210V, V2=210~280V
, V3=190V. The present invention relates to a driving circuit for a three-layer thin film EL display device, and a circuit according to an embodiment of the present invention is shown in FIG. 1 and will be described below.

10 is the thin film EL element, here the transparent electrode 11
A row of X electrodes X, ~Xm consisting of an aluminum electrode 12
Only the row Y fin poles Y, ~Yn are shown.

The thin film L element has a reference electrode r used at the time of read drive at the right end of the x electrode. 20 is a positive sustaining voltage ys to the Y electrode,
In this circuit, transistor 2 is connected from power supply line A.
1 and 22, and each electrode Y, ~Yn is a diode 2.
Connect via 01, . . .

30 is a switching circuit that leads the X electrode to ground, and a high voltage transistor 31 is connected to each electrode X, ~Xm.
is connected between electrodes X, ~Xm and ground.

The base of this transistor has a diode 3 connected to the sustain signal SUS4 and the readout signal READ applied to the line B.
A write signal WRITE, an erase signal ERASE and a sustain signal SUS4 applied via lines C and C are applied via an analog switch 33 operated by a horizontal binary address signal. The transistors 31, . . . act as switching elements that apply sustain pulses to the entire surface of the thin film EL element, and also act as switching elements that select electrodes during smart erasing and reading. 40 is a circuit that supplies a positive sustaining voltage Vs from line D to all × electrodes, and a transistor 41 is operated by a sustaining signal SUS3 applied to line 8.
, 42, and each electrode X, ~Xm is a diode 43
．． Connected via...

50 is a circuit that leads all Y electrodes P, ~Yn to ground,
Each electrode is a diode 51. . . , to the transistor 52 operated by the sustain signal SUS2.

60 is a switching circuit for selecting the Y electrodes and Yn, and a high voltage switching transistor 61, . . . and a diode 6 is connected between each electrode and the voltage V of the power supply line F.
2. . . . are connected, and the transistor 61 is selectively operated by a decoder 63 operated in response to a vertical binary address signal.

The decoder 63 is configured to directly drive the base of the transistor 61 with a high voltage transistor, or to level shift the binary address signal using an opto-isolator or the like and drive the base of the transistor 61 with an output of about 5 volts. be done. The power supply line F selectively outputs a write voltage, an erase voltage, and a read voltage according to the operation mode of the thin-film EL element by a circuit shown in FIG. 2, which will be described later. The above voltage is applied to one. 70 is a selective switching circuit which connects the collectors of the transistors 71, . . . to the X electrodes and selects the X electrode.

The emitters of the transistors 71, . . . are all connected to an output current detection resistor R. Transistor 71,... ... is an analog multiplexer 72 which receives a binary address signal and whose output is supplied to the base.
The on/off of one transistor is selectively controlled by. This analog multiplexer has RCA C
D-4051 is suitable. The analog multiplexer is made up of MOS transistors, and since the MOS transistors are voltage-controlled elements, the input gate capacitance is as small as several pF or less, so no current flows after a small transient current flows. Moreover, the resistance for current detection R
, are clamped by diodes connected in antiparallel, so the potential drop across both ends does not exceed 0.7V. Therefore, the address input of the analog multiplexer is only 0.7 V lower than the output of the binary address circuit, and at this level there is no problem at all with the operation of the decoder in the analog multiplexer. Especially C-MOS
If this is used, the logic operation does not require much current, and only the base current of the selection transistor flows, resulting in very little power consumption. Reference numeral 80 is an output circuit, and a transistor 81 is used to control all the
When the electrode is grounded, this transistor is turned on by the signals SUS4 and READ obtained through the inverter 82, and is used to generate a reference current in the resistor R2 to remove the erase current during logic logic.

At this time, in order to prevent the base current of the transistor 81 from flowing to the current detection resistor R2, a constant voltage is always supplied while the transistor 81 is off, and only when the transistor 81 is on, the capacitor C is configured together with the resistor R3. The transistor 81 is turned on for a time equal to a time constant (=C, R3), and the base current flows between the capacitor C and the base emitter of the resistor R3.
The amplifier 83 receives the read current obtained through the resistor R, and the reference current obtained through the resistor R2, and removes the in-phase signal component, ie, the displacement current in the successive current. The output of this amplifier 83 is connected to a bell detection and determination circuit to detect the light emitting state (written state and erased state) of the selected picture element of the thin film EL element. FIG. 2 shows a power supply circuit that supplies the sustain voltage, commit voltage, erase voltage, and reset voltage in the circuit of FIG. Maintaining voltage ys on lines A and D
, is supplied.

The transistor 102 is constantly supplied with base current by a resistor R4 inserted between the collector and base of this transistor, and is always turned on. Also, transistor 10
A parallel circuit of a resistor R5 and a capacitor C2, and a full erase transistor 103 are inserted between the base of the transistor 2 and the ground.
The entire erase signal ALERA is applied to the base of the transistor 103.
When SE is applied, transistor 103 is turned on and the base of transistor 102 is grounded. Therefore, the voltages of the power supply lines A and D become equal to or lower than the sustain voltage, that is, equal to or lower than the erase voltage. However, transistor 1
Since the capacitor C2 and the resistor R5 are connected to the base of the transistor 102, the voltage drop between the collector and emitter of the transistor 102 decreases according to this time constant (about several hundred seconds), and gradually recovers to the maintenance voltage ys. do. Since the power supply lines A and D supply voltage to the lines A and 40 of the circuit 20 and D, the switching operations of the circuits 20, 30, 40, and 50 apply a maintaining voltage to all electrodes of the thin film EL element from the X electrode or from the Y electrode. Vs or an erase voltage is applied, and the thin film EL element alternately performs sustain drive and full erase drive. Transistor 104 is set by resistors R6 and R7 to provide an erase voltage on line 105.

Transistors 106 and 107 operated by the erase signal ERASE are inserted in the line 105, and when the erase signal is applied, the power supply line F' of the circuit 60 supplies an erase voltage. When the erase signal ERASE is generated, a horizontal binary address signal is applied to the analog switch 33 to select the transistor 31, and a vertical binary address signal is applied to the decoder 63 to select the X electrode and Y electrode containing the selected picture element. is added to select transistor 61. Transistor 108 provides a read voltage on line 109. The transistor 108 is turned on and off by the transistor 11 operated by the read signal READ. When the output signal READ is obtained, in order to select the x electrode and the Y electrode that include the selected picture element, one of the transistors 61 is turned on and only one of the transistors 31 is turned off as described above. Therefore, transistor 71
One of them is turned on. The readout output then appears at resistor R, which passes through common mode rejection amplifier 83 to detect the readout signal. Transistors 111 and 112 are always on and charge capacitor C3 to the polarity shown.

When the write signal WRITE is applied, the inverter 11
3, the base potential of the transistor 112 is set to 0 potential to turn it off. On the other hand, the signal WRITE turns on transistors 1 14, 1 15, and 116, raising one side of capacitor C3 to the potential of power supply 101, thus turning off transistor 111, and charging power supply 101 and capacitor C3 to line 117. Supply the total voltage of the voltage. The charging voltage of capacitor C3 is the write voltage and power supply 1.
Line 11 is set to the voltage difference between the voltages of 01 and 01.
A write voltage is obtained at 7. When a write signal is obtained, one of the transistors 61 and one of the transistors 31 are turned on by operating as described above in order to select the X electrode and Y electrode including the selected picture element. Further, to explain the case of optical erasing operation with reference to the time chart of FIG. 3, by adding sustain pulses SUB1 to SUS4, circuits 20 and 30,
When performing alternating sustain drive from 0 and 50' and optical erasing drive, when the voltage across the thin film EL element is 0, pulse a of sustain pulse SUS2 and pulse b of SUS4 are added to The transistors 31, . . . between the electrode and the ground, and the transistor 52 between the Y electrode and the ground are turned on to short-circuit the X electrode and the Y electrode.

When the above pulses a and b are applied at the same time, a trigger pulse C of the xenon lamp (not shown) is output,
The thin film EL element is irradiated with light from the xenon lamp. Due to this light irradiation, the polarized charges accumulated at the interface of the EL layer are
It is relaxed and erased by photoconduction in the L layer. The relaxation current due to photo erasure is the transistor 31,...
In addition to flowing through diodes 201 and 202
In the present invention, a polarization relaxation current circuit is constructed by using transistors 31, . By forming many circuits through which polarization relaxation current flows, photo erasure is facilitated. During this optical erasing, both ends of the thin film L element are short-circuited by the diode 201, transistor 31, .
However, the sustain pulse frequency is about 500 Hz, whereas the repetition frequency of a normal xenon lamp is about 40 Hz. Therefore, even if optical erasing is performed continuously, it is possible to proceed to the next operation such as writing by simply waiting for one cycle of optical erasing.
As a practical matter, the above-mentioned prohibition control is unnecessary. The operation of the thin film EL element other than optical erasing will be explained with reference to the time chart of FIG. 3. In the optical writing drive, when the sustain driving pulse is applied, the xenon trigger pulse d is applied, and optical writing is performed.

Note that when performing this optical writing drive, there are no pulses a and b, and a time chart is shown by dotted lines in the portions of pulses a and b. If the xenon lamp irradiates the entire surface of the thin film EL element with light during the optical erasing and optical writing driving described above, simultaneous erasing and writing of the entire surface are performed.

Furthermore, if the xenon lamp partially irradiates light onto the thin film EL element, partial light erasing and partial light writing will be performed. When performing the start-up drive, the start-up pulse RE
AD occurs during a period in which there is no sustain pulse and supplies a logic start pulse to line F'.

At the same time, the decoder 63 operates to turn on the transistor 61 connected to the Y electrode including the selected picture element. Further, the applog multiplexer 33 operates to turn on the transistor 31 connected to the electrode other than the X electrode including the selected picture element,
Further, the analog multiplexer 72 operates to turn on the transistor 71 connected to the X electrode including the selected feed element, and supplies the output to the readout circuit 80 . When the casting pulse is supplied, 0 pulse voltage e is applied to the selected picture element, and no voltage is applied to the non-selected picture element. When electrically writing or erasing, the pulse WRITE or E
When RASE occurs, a write pulse voltage g or an erase pulse fin pressure f is applied to line F only to the selected picture element by the decoder 63 and analog multiplexer 33.

In Fig. 3, a circuit 30 and a pulse h are applied after the application of the sustain pulse and after the application of the write and erase pulses. as short as possible, and discharge the charge remaining due to the application of these pulses,
This is to prevent breakdown of the thin film EL element.

In addition, there is a small time margin between each operation of sustain writing, erasing, optical writing, and optical erasing, but this is because the transistor cannot turn off immediately due to the influence of the accumulated charge at the base. This is because it frees up As described above, the thin film EL device is manufactured as shown in FIGS. 1 and 2.
The illustrated circuit performs electrical sustain drive, full erase drive, selective erase drive, selective write drive, selective output drive, and optical erase drive.

By the way, in the selective write drive described above, one selection transistor 61, . . . is connected to each Y electrode, and two selection transistors 31, . . . are connected to each X electrode.
, 71... are connected, the stray capacitance values of the X and Y electrodes due to the collector-emitter capacitance of the transistor are different, and as a result, a voltage almost equal to the erase voltage is applied to the half-selected write picture element. Half-selected picture elements are erased.

This phenomenon will be explained below using FIGS. 4 to 6.

FIG. 4 shows an equivalent circuit diagram when writing to a selected picture element.

In the figure, CE is the capacitance of one pixel, and Csv is the stray capacitance of one Y electrode, which includes the capacitance of the Y electrode itself and the collector-emitter capacitance of the transistor 61. CsH is a stray capacitance per X electrode and includes the collector-emitter capacitance of the transistors 31 and 71. In this figure, the X electrode, Y electrode, and each driver are connected by a flat cable. Although there is also the stray capacitance of this cable, the stray capacitance of each electrode, the X electrode and the Y electrode, is equal, so there is no unbalance during driving. This is omitted because it is not the cause. Note that the transistors 61 and 31 corresponding to one of the Y electrodes Yj and one of the X electrodes Xi selected for writing are in an on state, respectively.
These collector-emitter capacitances (stray capacitances) Csv and CsH do not exist, and Yj and Xi are short-circuited. FIG. 5a shows a simplified circuit in the circuit of FIG. 4 by connecting electrodes of the same potential.

(n-1)Csv is a collection of unselected (Yi≠) stray capacitances on the Y electrode side, and (m-1)CsH is an unselected (Yi≠) stray capacitance on the Y electrode side.
This is a summary of the stray capacitances on the X electrode side of (Xi≠). In addition, (n-1) CE is the total capacitance of the half-selected picture elements connected to the × electrode (Xi), and (m-1) C8 is the total capacitance of the half-selected picture elements connected to the Y electrode (Yi). represents. (n-1)(
m-1) C8 is the total capacitance of non-selected picture elements that intersect at points other than the selected electrodes i and Yi.

Combine the Yi line and Yj≠ line in Figure 5a into one line,
When further simplified, it becomes as shown in FIG. 5b.

In the circuit of Figure 5b, since mill and nill are present, (m-1) (n-1) CE is very large compared to other capacitances and can be considered infinite and can be removed, so this equivalent circuit is It can be rewritten as shown in FIG. From Figure 6, the half-selected picture on the Y electrode (Yj) (total capacitance (m-1)
The voltage applied to the electrode (denoted by CE) is Vv, × electrode (
If the voltage applied to the half-selected picture element (represented by the total capacitance (n-1) CE) on Xj) is VH, then VV=; brush a
V8 ‐…‐‐'11VH=;Chapter 3 V8...■ Here C,=(m11)C80(n11)CsvC2=
(n-1)C80(m-1)SsH.

In the actual circuit, the capacitance Csv is the reverse series capacitance between the diode 62 and the collector-emitter of the PNP transistor 61, and is approximately 1.5 pF, and the capacitance CsH is the reverse parallel capacitance of the two NPN transistors 31 and 71. Therefore, it is about 6 pF.

For example, in a 6-inch thin film EL matrix element, there are 180 Y electrodes and 240 X electrodes, the capacitance Cs per pixel is 3 pF, the write voltage Vw is 210 V, and the sustain voltage Vs is 1 pF.
When the voltage is 80V, Vv=140V and VH=70V.
In this way, voltage Vv is twice as high as voltage VH. By the way, the erasing voltage of the thin film EL element has an optimum fin pressure near 145V, and when a voltage in the range of 10 to 20 V above and below this voltage is applied to the thin film 8L element, it acts in the erasing direction. Since the above voltage Vv is 140y, this voltage obviously acts as an erasing voltage, and when writing is performed to other pixels on the X electrode where the writing picture element is located, the number of times of writing increases in the scorchness of the writing picture element. It decreases markedly according to

This phenomenon is thought to be caused by the difference in stray capacitance between the × electrode and the Y electrode.

In view of the above points, the present invention makes the stray capacitance of each X electrode and Y electrode equal.

Since the difference between the capacitances Csv and CsH is 4.5 pF, if a capacitance of 4.5 pF is added to each Y electrode, the above voltage Vv=VH=105V. 105V is below the threshold voltage of the thin film EL element, and even if this voltage is applied, the thin film EL element does not perform any operation.

The present invention is further characterized by paying attention to the fact that the capacitance per picture element is 3 pF, and using this capacitance as equivalent to connecting each Y electrode.

In the present invention, in the circuit shown in FIG. 1, one X electrode of the thin film 5 L element, for example, the rightmost X electrode C, is set as a capacitance distribution compensation electrode, and a transistor 30 is connected to this electrode C from a power supply line G.
1, a write voltage is applied only during write drive. Further, a transistor 302 is connected between the electrode C and the ground, and a start pulse SUS4 and a start pulse READ are applied to the base of the transistor 302, and the electrode C is grounded during read drive and sustain drive. According to the present invention, a write voltage is applied to the electrode C during write drive,
Substantially, one pixel capacitor is added to each Y electrode, and the capacitance Csv becomes 4.5 pF.

Therefore, from equations 1 and 2 above, the voltage Vv=120V and Vke=9. Since this voltage is below the threshold voltage of the thin film EL element, the thin film EL element does not perform any operation (erasing). Furthermore, since the electrode C is grounded during read driving, there is no adverse effect on the read output.

As described above, according to the present invention, by connecting a compensating capacitor, the difference in stray capacitance between the can be prevented. Moreover, in the above embodiment, since the compensation capacitor is added using one x electrode, the effort of connecting one capacitor to each Y electrode and the location where the capacitor is arranged can be omitted.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of one embodiment of the circuit of the present invention, Fig. 2 is a power supply circuit for applying each required voltage to each part of Fig. 1, and Fig. 3 is a timing diagram for explaining optical erasing drive. chart, 4th
6 to 6 are equivalent circuit diagrams of the thin film EL element during write driving. 10: Thin film EL element, X, ~Xm: X electrode, Y, ~Yn
: Y electrode, 20: Sustaining voltage supply circuit, 30: Switching circuit, 40: Sustaining voltage supply circuit, 50: Earth circuit,
60: switching circuit, 70: selective readout switching circuit, 80: output circuit, 201, 202: diode, C: capacitance distribution compensation electrode. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] 1. Capacitance distribution compensation in which a capacitor equal to the difference in stray capacitance between the X electrode and the Y electrode is formed in either the X electrode or the Y electrode in a drive circuit for a thin film EL element having an X electrode and a Y electrode that are orthogonal to each other. 1. A drive circuit for a thin film EL element, characterized in that it is provided with an electrode.