JPS6034873B2 - solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in solid-state imaging devices, particularly solid-state imaging devices that utilize an interline shift method.

First, in order to facilitate understanding of the present invention, a solid-state imaging device using an interline shift method will be explained. FIG. 1 shows its basic configuration, in which a plurality of light receiving sections 1, each serving as a picture element, are arranged in the row (horizontal) direction and the column (vertical) direction on a common semiconductor substrate. On one side of C
Vertical shift registers 2 having a CD (charge coupled device) structure are arranged, and a common shift register 3 having a CCD structure is provided at one end of each shift register 2. The vertical shift register 2 has a transfer section provided corresponding to each adjacent light receiving section 1, and transfers minority carriers generated in each light receiving section 1 according to the amount of light received for each vertical line. , to the corresponding transfer section of the corresponding vertical shift register 2, and in each of these shift registers 2, the charge of each transfer section is shifted to the horizontal shift register 3, and from the output terminal t of this shift register 3, one horizontal The signals are sequentially extracted line by line. 2 and 3 show an example of a specific structure of such a conventional solid-state imaging device. For example, a P-type semiconductor substrate 4 has a plurality of light-receiving agents S.
and S2, and a vertical shift register 2 is provided adjacent to each column of these light receiving sections. The light-receiving parts S and S2 are constructed by coating a sensor electrode 6 made of a transparent conductive film on a substrate 4 via an insulating layer 5a of a predetermined thickness, for example, a P-type high concentration layer. They are separated by a channel stopper region 7. The channel stopper area 7 has a main channel stopper area 7A parallel to the vertical shift register 2 and an auxiliary channel stopper area 7B extending perpendicularly thereto. The columns are separated, and the light receiving sections S and S2 are separated in the vertical direction by the auxiliary channel stopper region 7B. On the other hand, the vertical shift register section 2 has a transfer section corresponding to each light receiving section S and S2, and has, for example, two-phase clock pulses and ? 2, carriers are transferred in the direction of arrow a, and each transfer section has a transfer gate region and a storage gate region. That is, the transfer section to which the clock pulse ◇ is applied has a transfer gate region 0, T and a storage gate region S, S, and also has a clock pulse ◇.
The transfer section to which 2 is applied is the transfer gate region 2T.
and storage gate area? 2S.
Here, the storage gate regions J.S.
An insulating layer such as a Si02 layer 5b under M is formed thinly, and the transfer gate regions T and )2S are electrodes ◇, M' and ? made of polycrystalline silicon, respectively. The 2M insulating layer, for example, the Sj02 layer 5c, is the storage gate region, and the Sj02 layer 5c is
,? Formed thicker than 2S, common clock pulse ◇,
Or? When 2 is applied, the storage gate region ◇, S
Alternatively, the potential well below the transfer gate is made deeper than the potential well below T or T. Between each storage gate region ◇, S and ◇2S and the light receiving section S and S2, carriers from the light receiving section S and S2 are clock pulsed. , and J2 are provided with gate regions ST and ST2 for transferring data to the vertical shift register section 2, which are formed by depositing an electrode 13 made of polycrystalline silicon on an insulating layer 5d of a predetermined thickness, for example, a Si02 layer. It consists of 8 is an overflow drain region made of a semiconductor layer of a conductivity type opposite to that of the substrate 4;
G and OG2 are gate regions provided between the overflow drain region 8 and each light receiving section S and S2, respectively, and excess carriers generated in each light receiving section S and S2 are transferred to this gate region OG. and OG2 to the overflow drain region 8.

Reference numeral 9 denotes a light-shielding layer made of, for example, mountain vapor deposition, which is deposited on the entire surface of the light-receiving portion S and other portions except S2.

In the imaging device having such a configuration, when a predetermined positive voltage 0s is commonly applied to the sensor electrode 6 of each light receiving section S and S2, a deep potential well 10 is formed under the sensor electrode 6. Signal charges 11 are accumulated according to the amount of received light.

For example, two-phase clock pulses to be applied to the vertical shift register 2 at the start of transfer from this state? , and 2 are respectively ◇, = 10V, gu2 = OV, while the sensor -
If the voltage of the electrode 6 is ◇s=OV, a potential well indicated by 12 is formed, and the charge 11 accumulated under the light receiving part S is transferred to the storage gate region 0, S through the gate region T. be done. On the other hand, the signal charge in the light receiving part S2 is blocked by the potential barrier under the gate region ST2, and the signal charge is blocked by the potential barrier under the gate region ST2. It doesn't flow in the evening. Thus, for example, if the odd field's corresponding charge is a clock pulse applied to the vertical shift register, and ? 2 is shifted vertically through shift register 2 and transferred to horizontal shift register 3. After the transfer of the charges corresponding to the odd-numbered field is completed, the charges of the light-receiving section S2 corresponding to the even-numbered field are transferred in the same manner. By the way, in the solid-state imaging device having such a configuration, a common potential is applied to each corresponding gate region, transfer gate region, and storage gate region, that is, the gate region ST. and transfer gate region ◇, T and storage gate region small, S during clock pulse,
A clock pulse 02 is applied to the gate region T2, the transfer gate region 2T, and the storage gate region, and the gate region ST, (or ST2)
and transfer gate area? , T (or ◇2T) are desirably similar to each other.
d and 5c are formed in the same oxidation process to have the same thickness, and both electrodes 13 and ◇, M' (or J2M')
If they can be integrally formed using the same electrode, this type of solid-state imaging device will be easier to manufacture, and the simultaneous potential conditions will also be the same, which is preferable.

However, conventionally, as shown in FIG.
(or ST2) and transfer gate region), T (or ST2T) are formed in such a relationship that they are perpendicular to each other.
It is surprising that the electrodes of 2) and the transfer gate region ◇, T (or J2T) are formed with the same electrode. For this reason,
For example, the Si02 layer 5d in the gate region and the Si02 layer 5c in the transfer gate region are formed in separate steps, and the gate region ST, (or SL) and the storage gate region? , S (or 2S) are formed with a common electrode, and the electrodes of the transfer gate region 3, T (or ◇2T) are formed separately. Therefore, not only does the manufacturing process become complicated, but the game
It is difficult to make the thicknesses of the Si02 layers 5d and 5c in the transfer gate region and the transfer gate region exactly the same, and it is difficult to make the surface charge QSS or threshold voltage Vth of the two regions equal. In view of the above points, the present invention has a structure in which the gate region and the transfer gate region can be formed at the same time so that their electrodes are common, thereby facilitating manufacturing and at the same time reducing the surface potential of the gate region and the transfer gate region. The present invention provides a highly reliable interbody imaging device of this type.

Hereinafter, the present invention will be explained using FIGS. 4 and 5.
FIG. 4 is a plan view of the main part, and FIG. 5 is a sectional view taken along the line BB.

In each figure, parts corresponding to those in FIGS. 2 and 3 are designated by the same reference numerals. In the solid-state imaging device according to the present invention, the storage gate region? , S and a transfer gate area, a transfer section consisting of a small, T, and a storage gate area? 2S and transfer gate region ◇A vertical shift register consisting of 2T transfer sections arranged alternately.A plurality of light receiving sections S and S2 are arranged on one side of the vertical shift register 2, and each light receiving section S and storage gate region, S between each light receiving part S2 and the storage gate area? Gate regions ST and ST2 are provided between each light receiving section S.2S, respectively. and S2 are separated by an auxiliary channel stopper region 7B extending from the main channel stopper region 7A.

The main auxiliary channel stopper region 7B extends perpendicularly to the channel stopper region 7A, and its free end 7c is inclined obliquely to the direction in which the vertical shift register 2 extends. Then, gate regions ST and ST2 are provided at positions corresponding to the inclined end 7c of the auxiliary channel stopper region 78, and the storage gates are connected from the light-receiving agents S and S2 to the storage gates S and ? The charge transfer direction b to 2S is configured to be oblique to the charge transfer direction a in the vertical shift register section 2, that is, the angle 8 formed by both transfer directions is 6×900, for example, 8=450. .
The transfer gate regions T, J2T and gate regions ST, ST2 are formed by their respective thick insulating layers, e.g.
The layers 5c and 5d are formed to have the same thickness through the same oxidation process, and both SiO2 layers are formed through the same electrode formation process.
A common electrode, for example made of polycrystalline silicon, continuous on layers 5c and 5d and common for each corresponding horizontal line? , M' and 2M are deposited and formed.

In this case, the transfer gate region ◇. T (or J2T
) and gate region 6T, (or ST2) is Q
Half 90°, for example 1350, so common electrodes 0, M on both regions, T (or 2T) and ST, (or SL)
' (or 02M'), there will be no problem such as disconnection at the part where the two areas are in contact. Also, storage gate area J,
S and OS are formed by depositing electrodes ◇, M and 2M made of polycrystalline silicon, for example, so as to be common to each corresponding horizontal line via a thin Si02 layer 5b.

Clock pulse? ．． is applied to each electrode ◇. M and small,
M' are commonly connected to each other at one end and each electrode is applied with a clock pulse of 2? 2M and? 2M are commonly connected to each other at the other end. An overflow drain region 8 having a conductivity type opposite to that of the substrate is provided on one side of each light receiving section S and S2, and this overflow drain region 8 and each light receiving section S
, and S2 are provided with gate regions OG and OG2 that form a potential barrier for causing the surplus carriers to flow into the overflow drain region 8, and further, for example, AI evaporation is performed on the entire surface of the other parts except for the light receiving parts S and S2. The formation of the light shielding layer 9 is the same as in FIG. 2. Since the operation of this configuration is exactly the same as that shown in FIGS. 2 and 3, detailed explanation thereof will be omitted.

According to the present invention described above, in the interline shift type solid-state imaging device, the charge transfer direction b from the light receiving sections S and S2 to the storage gate sections G, S and ◇2S is the charge transfer direction in the vertical shift register section 2. gate regions ST and ST2 provided between the light receiving portions S and S2 and the storage gate regions ◇, S and ◇2S, and the transfer gate region of the shift register portion 2. , T and 02T electrodes are common electrodes? , M and 2M'.
and ST2 and transfer gate region ◇, T and ◇2T
By making simultaneous formation possible, the manufacturing process itself becomes simple and the manufacturing conditions are relaxed.

By arranging the channel stopper region 7C obliquely, there is an effect of preventing the charge from flowing back to the light receiving section during the charge transfer of the vertical register. In addition, gate regions 6T and ST
2 and the transfer gate area of shift register section 2? ，
Since the insulating layers and electrodes of T and ◇2T are formed at the same time, the insulating layers have the same thickness, and therefore the surface charge Q$ or threshold voltage Vth in the gate region and transfer gate region is Therefore, the surface potentials under both regions T, T, and ST, ST2 are approximately the same, and a highly reliable solid-state imaging device can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a basic configuration diagram of an interline shift type solid-state imaging device, Figs. 2 and 3 are a plan view of the main parts showing the conventional concrete structure thereof, and a cross-sectional view taken along the line A-A. 5 and 5 are a plan view of a main part and a sectional view taken along line B-B of the same, showing an example of a kindergarten imaging device according to the present invention. S and S2 are light receiving parts, T and 2T are transfer gate regions, ◇, S and ? 2S is a storage gate region, ST and ST2 are gate regions, 7 is a channel stopper region, and 8 is an overflow drain region. Figure 1 Figure 3 Figure 2 Figure 4 Figure 5

Claims (1)

[Claims] 1. A shift register section in which transfer gate sections and storage gate sections are arranged alternately, a light receiving section arranged on one side of the shift register section, and a gate section provided between the storage gate section and the light receiving section. a boundary of the light receiving section in contact with the shift register section is oblique with respect to a direction perpendicular to a charge transfer direction in the shift register section, and electrodes of the transfer gate section and the gate section are formed of a common electrode. A solid-state imaging device consisting of