JPS607425B2 - Signal discrimination circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal discrimination circuit that can discriminate a voice signal from an intermittent signal such as a busy tone, a continuous signal such as a dial tone, or no signal.

For example, in an answering machine, the device is intermittently kept in operation by the customer's voice signal coming through the telephone line, and the customer's voice signal is completely recorded on the device's recording tape. When a user finishes using the device and puts down the handset, depending on the area, a busy tone or dial tone is sent from the station to the device, or there is no signal. 1
0 seconds), it is necessary to restore the device to the standby state.

However, the busy tone or dial tone described above may cause the device to malfunction, making it impossible to restore the device to the standby state. Conventionally,
There is an example in which a filter circuit is used to prevent the above-mentioned malfunction. However, this circuit has disadvantages in that it is prone to malfunction due to harmonics and is complex in terms of circuitry. The present invention improves the above-mentioned drawbacks and provides a signal discrimination circuit which is economical, has a small number of parts, is easy to adjust, and can be expected to operate reliably.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The operation of an embodiment of the present invention will be specifically explained below with reference to the accompanying drawings showing one embodiment of the present invention.

FIG. 1 is a circuit example, and FIG. 2 is a timing chart showing its operating points.

First, the main components and circuits in FIG. 1 will be briefly described.

IN' is an input terminal into which a customer's voice signal, busy tone, dial tone, etc. are input. Transistors QI and Q2 are Schmitt circuits that shape the input signal. Transistor Q3 and capacitor C2 form a rectifier circuit. IC1 to IC4 are frequency dividing circuits each consisting of a flip-flop circuit using, for example, two SN747 circuits. Transistors Q4 to Q7 are timer circuits, and as will be described later, when the output level of 4 above changes due to an audio signal, this timer circuit is repeatedly charged to keep the load relay Y in the operating state. Although not shown, the device is maintained in operation via a relay circuit (not shown). Now, in FIG. 1, although not shown, the rectified output of the calling signal is applied to one end of the capacitor C4, energizing the relay Y, and the above-mentioned C
A bias is applied to one end of 4 to keep relay Y in operation. Then, when the application tape finishes running, the customer's voice signal is applied to the above-mentioned input terminal state. The period from time axis to to t18 is an example of the audio signal applied to the input terminal IN'.

Since the amplitude of the audio signal changes every moment, the transistor Q1
, Q2's Schmitt circuit output is as shown in diagram B. Furthermore, since this output is applied to the rectifier circuit of transistor Q3, its collector voltage becomes as shown in diagram C. However, IC
The output Q (or Q) of each flip-flop changes at the time when each clock pulse input terminal CP of IC4 changes from an H level to an L level. This frequency dividing circuit of ICI to IC4 is well known, but the D diagram is the IC turtle, and the E diagram is the I
In C2, the F diagram is the output waveform of each Q terminal of IC3, the G diagram is the output waveform of each Q terminal of IC4, and the H diagram is the output waveform of the Q terminal of IC4. According to observations, the amplitude of the audio signal changes about 6 to 10 times per second on average, so the time axis t7 in diagrams G and H
, t15, the change in the output of IC4 is 1 to 1 every 1 to 2 seconds.
You can get it about twice. Q of IC4?
Since small capacitance capacitors C6 and C7 are connected to the Q terminal, the actual point at which the output changes from L level to H level is delayed and becomes t7' and t15', so t7 to t7r. Between t15 and t15', no bias is applied to the base of transistor Q4 through resistors RI0 and R15, so Q4 is OFF, and t7' and t
At 15', Q4 is turned on. In this way, when Q4 switches from OFF to ON, transistor Q5 turns OFF due to the reverse bias from capacitor C3.
At this time, the timer capacitor C4 is rapidly set to a predetermined potential (approximately 11V in the embodiment) via the resistor R13 and the diode D (because in the circuit of the present invention, malfunction will not occur even if R13 is set to a low resistance value). ) can be charged up to. As mentioned above, the reason why the timer capacitor C4 can be charged by the Q and Q outputs of IC4 is to increase the charging efficiency of C4, but the load resistor R13 of Q5
It is also possible to charge C4 with only the Q output or one of the Q outputs by making C4 smaller and charging C4 faster.

Note that once C4 is charged to a predetermined potential, this charge can hold relay Y continuously for about a few seconds, and within that few seconds, C4 is repeatedly charged by the next sound that is added and continues without restoring relay Y. and keep it in working condition. "Explanation of operation when busy tone is input" The time axis tl9 and later in FIG. 2 is a timing chart when a busy tone is input.

Since the mid-word sound is a 09 step, an intermission signal is sent, and a 0.5 step interrupt signal, when the rectified output of this signal is divided, as is clear from the above, the Q and Q outputs of IC4 are G, The waveform will be like after tlg in diagram H, so tl9~
During t33, the Q and Q outputs of IC4 are flat, transistor Q4 is ON, and therefore transistor Q5 is also maintained in the ON state, so capacitor C4 is not charged, and therefore the charge of C4 is directed toward the base side of transistor Q6. As shown in Figure 1, the voltage is gradually discharged, and when the voltage drops by about 3 V', the relay Y is restored and the device is returned to the standby state. "Explanation of operation when dial tone is input" In this case as well, as is clear from the above explanation, since the frequency-divided input level is constant, either Q or Q output of IC4 will be high.
Alternatively, the timer capacitor C4 cannot be charged because the L level is kept at a constant value, and therefore, in the embodiment, the relay Y can be restored after several seconds.

"Explanation of operation when the input is no signal" In this case as well, the frequency-divided input is surprised, so the Q and Q outputs of IC4 maintain a constant value of H or L level, and C4 cannot be charged, as described above. Similarly, relay Y can be restored after a few seconds.

As explained above in detail about the present invention, ``Because the signal discrimination circuit uses a frequency dividing circuit of a digital IC, the number of parts is small and it is economical. The amplitude of intermittent signals such as busy tone may vary depending on the country.
Although the periods are different, the signal discrimination circuit of the present invention is characterized in that the period and amplitude of the input intermittent sound are not selected as long as the period changes about once or twice per second.

However, the present invention is not limited to the examples described above and illustrated, and can be modified and utilized in various ways without changing the gist of the present invention.

For example, a rectifying and smoothing circuit is installed before the Schmitt circuit of Q1 and Q2 to shape the envelope signal, or the timer capacitor C4 is charged when a signal other than audio is input, and the charging value is set to a predetermined value. It would be possible to take such measures to restore the relay Y without going beyond the gist of the present invention.

[Brief explanation of the drawing]

FIG. 1 shows a signal discrimination circuit showing one embodiment. FIG. 2 is a timing chart showing the operating points of the circuit. Next, Kanzu Besei “

Claims (1)

[Claims] 1 A several-stage frequency divider circuit that receives as input the direct current output of each of the above-mentioned signals, which are envelopes of voice signals, intermittent signals such as busy tone, continuous signals such as dial tone, or no signals, and the frequency divider circuit. a timer circuit that is charged by a single output of the circuit and reset after a few seconds; and means for repeatedly charging the timer circuit with the output of the frequency divider circuit that occurs within a set time of the timer circuit in the case of the audio signal; The above intermittent signal,
means for restoring the timer circuit without applying the output of the frequency dividing circuit within the set time of the timer circuit in the case of a continuous signal or no signal; and a telephone line closing circuit maintained by the output of the timer circuit. , a signal discrimination circuit between audio signals and other signals.