JPS6113245B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a digital calculation type process control device. More specifically, the present invention includes:
The present invention relates to a process control device which performs proportional and integral calculations in a positional manner using a processor, and which can effectively prevent reset wind-up.

(Prior Art) A digital arithmetic type process control device is constructed using the arithmetic functions of a computer or a microprocessor (hereinafter simply referred to as a processor). Processors determine the control output by performing PID (proportional, integral, differential) calculations, etc., but traditionally the calculation algorithms in processors have been designed to facilitate manual/automatic bumpless switching, prevent reset/windup, and prevent processor failure. Velocity type calculations were often adopted due to the ease of countermeasures. However, velocity type calculation is a method in which the calculation output gives the amount of change in the operating end, and is based on I operation, so it is not suitable for performing only P operation or PD operation. Further, even in the case of PID operation, an output pullback phenomenon based on P and D operations always occurs near the saturation point of the control output, which is disadvantageous.

A position type calculation process control device commonly used in analog control can be considered as a device that is suitable for P and PD operations and does not cause the output pullback phenomenon.

(Problem to be solved by the invention) However, when position type calculation is performed using a digital processor, the output of the position type calculation gives the position of the operating end (valve opening degree), and it is based on proportional operation. Since it is an arithmetic method that adds integral and differential operations, there are problems in that manual/automatic bumpless switching, reset/windup prevention measures, etc. must be solved at the same time.

Here, the purpose of the present invention is to solve these problems with a simple configuration, and to provide a positional type operation,
It is an object of the present invention to provide a digital calculation type process control device that can perform reset and wind-up prevention.

(Means for Solving the Problems) The present invention provides at least proportional,
The feature is that the integral calculation is performed by a processor, and when an excessive deviation continues for a long period of time, the value of the integral calculation term is reset with a delay due to the time constant of the integration.

(Example) The present invention will be explained below with reference to the drawings. FIG. 1 is a conceptual block diagram of an embodiment of the present invention. In FIG. 1, 1 is a processor (for example, a microprocessor), 21 to 26 are analog comparators provided on its input side, 3 is a digital-to-analog converter (DA converter) provided on its output side, and 4 5 is a semiconductor switch, 5 is an amplifier, 6 is a hold capacitor provided at its input end, 7 is a manually operated switch, and 8 is a manual/automatic changeover switch.

Analog comparators 21, 22, 23, 24, 2
Amplifier 5 is connected to one input terminal of 5 and 26, respectively.
output, measured value Mn of process variable, set value SP,
Proportional gain Kp, integral time T _I , and derivative time T
_D is given as an analog voltage, and the output voltage of the DA converter 3 is commonly given to the other input terminal. These constitute a mechanism for converting an analog input signal into a digital signal and inputting it into the processor 1. That is, the processor 1 sequentially sets the digital output signal to "1" starting from the MSB, and converts this one by one into an analog voltage using the DA converter 3.
This voltage is compared with the respective input voltages in the analog comparators 21 to 26, and the logic value of each bit of the digital signal is determined successively in accordance with the comparison output of a desired analog comparator. The value of the established digital signal is equal to the desired analog comparator input voltage. Analog comparators 21 to 26 are 1
Each time one input signal is taken in, the switching is performed in order, and each input signal is sequentially converted into a digital signal and taken in by the processor 1. Such a configuration has the advantage of eliminating the need for an analog-to-digital converter.

Processor 1 calculates a position-type control output based on the received input signal, and transfers this control output to the DA.
The converter 3 converts the voltage into an analog voltage, and charges the hold capacitor 6 through the semiconductor switch 4. The voltage of capacitor 6 is amplified by amplifier 5,
given to the controlled object. The input impedance of the amplifier 5 is set sufficiently high so that attenuation of the charge on the hold capacitor 6 does not become a problem.

The acquisition of input signals and the calculation of control outputs are repeated at a constant sampling period. The sampling period is set to about 0.1 sec, for example.

The voltage of the hold capacitor 6 can be increased or decreased as desired by the operator during manual control. That is, when the manual operation switch 7 is turned on the + side or the - side, current from a DC constant current source (not shown) flows into or out of the hold capacitor 6, changing the voltage of the hold capacitor 6. Therefore, this allows manual control of the controlled object. When switching to manual control, the latest value of the control output of processor 1 is held in the hold capacitor 6, and manual control can be started using that value as a starting point, so switching from automatic control to manual control is bumpless. I can do it. In addition, in the manual control state, when the manual operation switch 7 is not operated (non-operated), the manual operation output read through the comparator 21 is held digitally, so that the manual output does not drift. I'm trying to prevent it from happening.

In the device configured as described above, the control output in the processor 1 is calculated by the following equation (in the case of PI operation).

Yn=Kp{e _o +Δt/T _I Σe _o } (1) Here, Yn...control output e _o ...deviation Δt...sampling period Kp...proportional gain T _I ...integration time In other words, processor 1 is the position produces a PI control output of the form. In equation (1), if the integral term is B, then
We get the following equation.

Yn=Kpe _o +B (2) In equation (2), the value of B is adjusted as appropriate during manual-automatic switching, proportional gain switching, and reset/windup prevention. In adjusting the value of B, the value of the integral term is actually adjusted. Such calculations are performed by the program of the processor 1, and for convenience of explanation, they can be shown conceptually as shown in FIG. 2.

Adjustment of B during manual-automatic switching is performed as follows. When switching from manual control to automatic control, processor 1 uses the manual control output (output of amplifier 5) read just before, proportional gain _Kp , and deviation e _o to determine the value of B using the following equation. .

B=Y _M −Kpe _o (3) Then, if the value of equation (3) is set as the integral term B of the first control output Y _A after automatic switching, Y _A = Kpe _o + B = Kpe _o + Y _M −Kpe _o =Y _M (4), and no fluctuation in the control output occurs before and after manual-automatic switching. In other words, switching from manual control to automatic control can be performed bumplessly. Note that switching from automatic control to manual control can be performed bumplessly using the capacitor 6 as described above. Therefore, manual-automatic switching can be performed bumplessly in both directions.

Next, the adjustment of B during reset/windup prevention, which is a feature of the present invention, is performed as follows. If a large deviation continues for a long time and the value of the integral term continues to change in one direction, the proportional/integral output will reach the limit value of the PI limiter. Processor 1 then calculates the proportional gain Kp and the deviation e _o reached at that time.
Using the limit value L (H _L or L _L ) of the PI limiter, the value of B is determined by the following equation, and this is reset with a delay due to the integral time constant.

B=L−Kpe _o (5) Then, the control output becomes Y _o =Kpe _o +B = Kpe _o +L+Kpe _o =L (6) and is limited to match the limit value L of the PI limiter. As long as the proportional/integral output reaches the limit value L, such an operation is repeated for each sampling. As the deviation e _o becomes larger, the integral term B becomes smaller and smaller according to equation (5). this is,
Reset windup can be prevented by moving the proportional band in the opposite direction to the normal integral operation that is not affected by the PI limiter. e
When _o becomes excessive, if we control with B=0%,
When Kpe _o >100%, the output y=L, and the proportional operation restarts from Kpe _o =100%, and when Kpe _o <100%, the proportional term is utilized. Also, when using batch control, a preload value F is introduced, and when the above e _o is excessive, B =
By limiting it by F, the starting point of the proportional operation can be appropriately moved to obtain an optimal response.

As mentioned above, the present invention moves the proportional band by integrating the integral term in the opposite direction at the time of limiter B=L−Kpe _o using the integration time constant. Shown below. That is, when applied to the PI limiter, the polarity of the deviation signal e _o is inverted and integrated as shown in (c). Then, when it stabilizes, it will stop like in the image below.
By performing backward integration using an integral time constant in this manner, it is possible to prevent reset windup, which has the advantage of being resistant to noise.

In the above description, an example of a processor that saves analog/digital converters has been given, but the processor may have a general configuration using an analog/digital converter and a digital/analog converter as shown in FIG. Furthermore, although the example of a single-loop controller has been given, the present invention can also be applied to a device that controls multiple loops.

FIG. 4 is a flowchart for explaining in more detail the operation of the apparatus according to the present invention.

First, after turning on the power, in step 1, each flag controlling the program is initialized.
In step 2, the sampling period is detected, and in step 3, the measured value Mn, set value SP, output value Y _A or Y _M , and PI (D) constant are read, and these values are D/A converted. Store the result in internal memory. In step 4, it is determined whether the control is automatic or manual. If the control is automatic, the process branches to step 5, and if the control is manual, the process branches to step 6. If it is in the automatic control state, in step 5 it is checked whether it is the first time for automatic adjustment calculation. This is the first time after the power is turned on or immediately after switching from manual to automatic, and in this case, the process branches to step 7. In step 7, the integral term B is calculated by Y _M -Kp· _eo , and the result of this calculation is stored in the integral register of the internal memory, and the next sampling period is obtained. In step 5, if it is not the first time, move on to step 8, where
Perform PI calculation. The PI calculation here is step 7.
Set the integral term B to its initial value (Bn-1)
A predetermined PI(D) calculation is performed as follows. This calculation result is compared with a predetermined limit value L in step 9, and if it is smaller than L, it is outputted in step 10. Also, in step 9,
If it is larger than L, the process branches to step 11, where the integral term B=L−Kp・e _o is calculated, and
So that the value of the integral term can be given by the result of this operation,
It is reset with a delay due to an integral time constant, and in step 12, Y _A =Kp·e _o +B _o is calculated based on this reset integral term, and in step 10, this calculation result is output.

On the other hand, if it is determined in step 4 that it is in the manual control state, the process branches to step 6, where it is checked whether it is in the manual operation state or not.
If the manual output value Y M already stored in the internal memory is not in manual operation, a digital hold operation is performed in which the manual output value Y _M already stored in the internal memory is stored in the memory again as an output hold value, and in step 10, this digital Outputs hold value _YM .

As is clear from the above operations, when switching from the manual control state to the automatic control state, step 4,
Bumpless switching can be achieved by operations 5 and 7, and reset/windup can be prevented by
This is realized by the operations in steps 9, 11, and 12. In addition, even in the manual control state, the manual output drift can be prevented in the non-operating state in step 6.
61.

(Effects of the Invention) As explained above, the present invention uses a processor to perform at least the PI operation by position type calculation that does not, in principle, cause a pullback phenomenon, and when an excessive deviation continues for a long period of time, the value of the integral operation term is changed. It is now reset with a delay due to the integration time constant. Therefore, according to the present invention, it is possible to obtain a digital calculation type process control device with a simple configuration that takes advantage of position type calculations and can effectively perform reset and windup prevention without being affected by noise or the like.

[Brief explanation of drawings]

Fig. 1 is a conceptual block diagram of an embodiment of the present invention, Fig. 2 is a conceptual diagram of calculation, Fig. 3 is a conceptual block diagram of another embodiment of the present invention, and Fig. 4 is a conceptual block diagram of an apparatus according to the present invention. This is a flowchart for explaining the operation. 1...Processor, 21-26...Analog comparator, 3...Digital/analog converter, 4...
...Semiconductor switch, 5...Amplifier, 6...Capacitor, 7...Manual operation switch, 8...A/M changeover switch.

Claims (1)

[Claims] 1. A processor, a DA converter that converts a digital signal from the processor into an analog signal,
An analog signal holding means for sample-holding the output signal of the DA converter using a signal from the processor, and a signal reading means for reading at least the measured value, the setting value, and the proportional gain Kp into the processor; The processor uses position type calculations and at least proportional/integral calculations to read in the proportional gain Kp at the sampling period Δt via the signal reading means, the deviation e _o between the measured value and the set value, and the integration time T.
The automatic control output Y _A (=Kp{e _o +Δt/T _I Σ e _o }) is obtained using _I , and when the automatic control output Y _A exceeds a predetermined limit value L, the proportional gain Kp and the deviation e _o
The value of the integral term B=(Δt/T _I KpΣe _o ) is expressed as
A process control device characterized in that reset is performed with a delay due to an integral time constant as given by L-Kp· _eo .