JPS5942321B2 - process control equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital process control device.

A digital arithmetic type process control device is constructed using the arithmetic functions of a computer or a microprocessor (hereinafter simply referred to as a processor).

The processor determines the control output by performing PID (proportional, integral, differential) calculations, etc., but conventionally, the calculations in the processor are based on the ease of manual/automatic bumpless switching, reset/windup prevention measures, and processor failure measures. Velocity type calculations were often adopted due to their ease of calculation. However, since velocity type calculation is based on I operation, it is not suitable for performing only P operation or PD operation. Further, even in the case of PID operation, an output pullback phenomenon occurs due to P and D operations near the saturation point of the control output, which is disadvantageous. A position type calculation process control device is considered to be suitable for P operation and PD operation and does not cause the output pullback phenomenon.

Here, the present invention configures a device using a processor that performs digital calculations, and even if a proportional band (proportional gain) is set in a state where there is a deviation,
The objective is to provide a device that does not cause fluctuations in automatic control output.

One feature of the present invention is that at least the PI operation is performed by position type calculation, and the value of the integral calculation term is reset when the proportional gain Kp is changed.

The present invention will be explained below with reference to the drawings.

FIG. 1 is a conceptual block diagram of an embodiment of the present invention. In FIG. 1, 1 is a processor (for example, a microprocessor), 21 to 26 are analog comparators provided on its input side, 3 is a digital-to-analog converter (DA converter) provided on its output side, and 4 is a semiconductor switch, 5 is an amplifier,
6 is a hold capacitor provided at the input end of the amplifier 5, 7 is a manual operation switch, and 8 is a manual/automatic changeover switch. Analog comparators 21, 22, 23, 24
. The output voltage of the DA converter 3 is commonly applied to the terminals. These constitute a mechanism for converting an analog input signal into a digital signal and inputting it into the processor 1. That is, processor 1
sets the digital output signal to [1] in order starting from the MSB, converts it into an analog voltage in the DA converter 3 one by one, compares this voltage with each input voltage in the analog comparators 21 to 26, and converts the digital output signal to [1] in order from the MSB. The logic value of each bit of the digital signal is determined successively in accordance with the comparison outputs of the two analog comparators. The value of the established digital signal is equal to the desired analog comparator input voltage. Analog comparator 2
1 to 26 are switched in order each time one input signal is completed, and each input signal is sequentially converted into a digital signal and is input into the processor 1. Such a configuration also has the advantage of eliminating the need for an analog-to-digital converter.
The processor 1 calculates a position-type control output based on input signals such as the measured value Mn, the set value SPl, the proportional gain Kp, the integral time T, and the differential time, and converts this control output into D.
A converter 3 converts it into an analog voltage, and semiconductor switch 4
The hold capacitor 6 is charged through the hold capacitor 6.

The voltage of the capacitor 6 is amplified by the amplifier 5 and applied to the controlled object. The input impedance of the amplifier 5 is set sufficiently high so that attenuation of the charge on the hold capacitor 6 does not become a problem. The acquisition of input signals and the calculation of control outputs are repeated at a constant sampling period.

The sampling period is set to about 0.1 sec, for example. The voltage of the hold capacitor 6 can be increased or decreased as desired by the operator during manual control. That is, when the manual operation switch 7 is turned to the + side or one side,
Current from a DC constant current source (not shown) flows into or out of the hold capacitor 6, changing the voltage of the hold capacitor 6. Therefore, this allows manual control of the controlled object. When switching to manual control, the latest value of the control output of processor 1 is held in the hold capacitor 6, and manual control can be started using that value as a starting point, so switching from automatic control to manual control is bumpless. I can do it. Now, in the device configured as described above, the calculation of the control output in the processor 1 is performed by the following equation (in the case of PI operation).

That is, processor 1 produces a position-type PI control output.

In equation (1), if the integral term is B, the following equation is obtained.
Here, if the proportional gain Kp is changed to Kp', (2)
In the equation, the proportional term Kp-En becomes Kp'·EO, so if left as is, the control output YO will fluctuate, which is undesirable.

Therefore, in this device, the processor 1 performs the following operation to reset the value of the integral term B when changing the proportional gain Kp. That is, when the proportional gain is switched to Kp', the processor 1 uses the control output YA read immediately before, the new proportional gain Kp', and the deviation En to determine the value of the integral term B according to equation (3). . When the value of the integral term B is reset according to equation (3), the initial control output yl after switching the proportional gain becomes as shown in equation (4), and the fluctuation of the control output before and after switching the proportional gain Kp is Does not occur.

That is, the proportional gain Kp can be switched bumplessly. Such calculations are performed by the program of the processor 1, and for convenience of explanation, they are shown in a conceptual diagram as shown in FIG.

Further, a flowchart of the above operation can be shown in FIG. In addition, in FIG. 3 70-1, the flow of other operations such as manual-automatic switching is omitted. The explanation according to this flow is as follows. (1) After turning on the power, control the flow. Initialize flags. (
2) Sense the sampling period.

(3) Measured value Mn, set value SP, output value Yl. Performs A/D conversion of the PID constant and stores the result in internal memory. (4) Check whether the proportional gain Kp has been changed.

(5) If there is no change in Kp, perform the PI(D) calculation as shown in equation (1). (6) Output the calculation result.

(7) In step (4), if Kp is changed, integral term B is calculated by equation (3), and the result of this calculation is reset to integral term B in equation (1).

(8) In the next cycle, if (Kp' - Kpi - 0 (if there is no change in Kp), in step (5), the integral term B reset in step (7) is set to its initial value. The P(D) calculation is performed as follows.As is clear from the above flow, when changing the proportional gain Kp, the change is performed bumplessly by the steps (4) and (7) above. can be done.

In the above explanation, we have given an example of a type of processor that saves analog/digital converters, but as shown in Fig. It may be a composition.

Furthermore, although the example of a single-loop controller has been given, the present invention can also be applied to a device that controls multiple loops. As described above, in the present invention, at least the PI operation is performed by position type calculation using a processor, and the value of the integral calculation term is reset when the comparison gain is changed.

Therefore, according to the present invention, it is possible to obtain a digital calculation type process control device that takes advantage of position type calculation and can effectively perform bumpless switching of proportional gain. Therefore, the device according to the present invention is effective when the proportional gain is set by an external computer or the like.

[Brief explanation of the drawing]

FIG. 1 is a conceptual configuration diagram of an embodiment of the present invention, FIG. 2 is a conceptual diagram of calculations, FIG. 3 is a flowchart showing the flow of operation, and FIG. 4 is a conceptual configuration diagram of another embodiment of the present invention. It is a diagram. 1...Processor, 21-26...Analog comparator, 3...Digital/analog converter, 4...Semiconductor switch, 5...・・・
Amplifier, 6... Capacitor, 7... Manual operation switch, 8... A/M changeover switch.

Claims (1)

[Claims] 1 A processor, comprising a signal reading means for reading into the processor at least a measured value, a set value, a proportional gain Kp, and an integral time T_I, and the processor reads the signal by at least a proportional/integral calculation using a position type calculation. The automatic control output Y_A (
=Kp{e_n+Δt/T_IΣe_n}) and when changing the proportional gain Kp, the automatic control output Y_A
and a new proportional gain Kp' and deviation e_n to reset the value of an integral term B (=\Kp\Δt/T_IΣe_n) as given by the following equation. .