JPS6130290B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a CRT display device that is equipped with a plurality of CRT display devices and at the same time indicates each CRT screen using a single light pen.

Figure 1 shows an existing model with two CRT displays.
This shows the internal structure of a CRT display device. In the figure, reference numeral 1 indicates a synchronization signal generation circuit which receives a clock pulse φc and generates a horizontal synchronization signal R and a vertical synchronization signal V, and reference numeral 2 indicates a horizontal synchronization signal generating circuit for the first CRT 3 and second CRT 4, which receives both synchronization signals H and V. and horizontal and vertical deflection circuits for creating vertical deflection signals;
An address counter 8 for outputting address signals to the second storage devices 6 and 7 is a light pen, and a latch circuit 9 for detecting an address corresponding to the coordinates indicated by the light pen 8 is associated therewith. The latch circuit 9 is applied with the address signal from the address counter 5, a bright line detection signal l from the light pen 8, and a light pen switch signal SW that is automatically turned on when the light pen 8 presses the CRT screen. ing. Reference numeral 10 denotes a write data control circuit to which the address latched by the latch circuit 9 is applied, and rewrites the contents of the first and second storage devices 6 and 7 as appropriate. Reference numeral 11 designates which storage devices 6 and 7 are to be accessed in this rewriting operation; 12 and 13 designate the digital signals stored in the first and second storage devices 6 and 7; , second CRT display 3, 4
These are first and second D/A conversion circuits that convert into analog signals suitable for display.

The display data introduced into the storage devices 6 and 7 is displayed on the CRT displays 3 and 4 via D/A conversion circuits 12 and 13. In that state, any
When the CRT display 3, 4 screen is pointed with the light pen 8, the output of the address counter 5 is latched by the latch circuit 9 at that time. The address latched by the latch circuit 9 corresponds to the coordinates indicated by the light pen 8, and the write data control circuit 10
The contents of the storage devices 6 and 7 are rewritten by inputting the data to the storage devices 6 and 7.
is designated by the designation switch 11.

According to this configuration, the write data control circuit 10 cannot determine which CRT display device the signal from the light pen 8 is obtained from, and the light pen 8 is instructed by the designation switch 11.
It was made compatible with CRT displays.

However, using the designated switch 11 to correspond to the CRT display and the light pen in this way requires considerable skill and is not easy to operate.

The present invention was made in view of these problems, and it automatically corresponds to the CRT display indicated by the light pen.
This will be explained in detail with reference to the figures and subsequent figures.

In FIG. 2, 1, to 10 and 12, 13 are a synchronization signal generation circuit, a write data control circuit, and a D/A conversion circuit, which are different from those in FIG. Where to do it is light pen 8
and the latch circuit 9, and the fact that the CRT discrimination circuit 14 is provided between the first and second storage devices 6, 7 and the first,
CRT between the second D/A conversion circuits 12 and 13
This is where gate circuits 15 and 16, which open and close depending on the signal from the discrimination circuit 14, are inserted. this
The CRT discrimination circuit 14 receives the pen switch signal SW from the light pen 8 and the bright line detection signal l.
Also, gate signals a and b for opening and closing gate circuits 15 and 16, a latch timing signal h for the latch circuit 9, and a CRT for the write data control circuit 10.
A discrimination signal f is output.

Then, when gate signal a is obtained, gate 15
is closed to inhibit the content output of the first storage device 6 and lower the brightness of the first CRT display 3, and similarly, the gate 16 is closed in response to the gate signal b to inhibit the output of the contents of the first storage device 6.
When the CRT display 4 is configured to be dark, the bright line detection signals l ₁ and l ₂ from the light pen 8 are obtained only when the brightness of each corresponding CRT 3 and 4 is high, as shown in FIG.

FIG. 3 shows the internal configuration of the CRT discrimination circuit 14. In the figure, 20 is a shift register that converts the pen switch signal SW into pulses r ₁ , r ₂ , r ₃ synchronized with the vertical synchronizing signal V, and among these pulses, r ₂ ,
r ₃ is input to the gate 21 to form a gate signal a that opens and closes the gate circuit 15, r ₁ and r ₂ form a gate signal b that opens and closes the gate circuit 16 by the gate 22, and r ₁ , r ₃ are applied to the gate 23 to form a CRT determination period signal d. A counter 24 counts the vertical synchronizing signal V while the CRT determination period signal d is obtained, and its counting output g is input to the latch 25. Reference numeral 26 denotes a gate to which the CRT determination period signal d and the bright line detection signal l are input, and a set signal m for setting the first RS flip-flop 27 is obtained. This first flip-flop 27 outputs an output signal P.
is input to the latch 25 and latches the count output g of the counter 24 to obtain the CRT discrimination signal f. 28 is a gate to which the pulse rs and the bright line detection signal l are input, and a set signal q for setting the second RS flip-flop 29 is obtained. This second RS
Flip-flop 29 receives latch timing signal h
It is reset for each field according to the vertical synchronizing signal V. Reference numeral 30 denotes a rising edge detection circuit for detecting the rising edge of pulse _r1 , and the counter 24, latch 25, and first RS flip-flop 27 are reset by the detection signal e.

In such a configuration, the light pen 8 is the first
When the CRT display 3 screen is indicated, the bright line detection signal l ₁ and gate 26 output m ₁ are output as shown in Fig. 4.
The flip-flop 27 output P ₁ and the CRT discrimination signal f ₁ are obtained, and when the light pen 8 points to the second CRT display 4 screen, l ₂ , m ₂ , P ₂ , and f ₂ are obtained, respectively. , after the light pen switch signal SW is turned on, the discrimination signal f ₁ becomes "0" and f ₂ becomes "1" after the second field, and as a result, this signal f becomes
This is a signal to determine whether the display is pointing. Therefore, this discrimination signal f has exactly the same function as the designation by the estimation switch 11 shown in FIG. Access will be made selectively.

As is clear from the above description, the present invention is applicable to CRT
The configuration is such that the discrimination circuit can obtain a CRT discrimination signal that indicates which of multiple CRT displays the light pen is pointing to, so it can be used automatically without the need for an external switch to specify the CRT display. As a result, the problem of erroneous operation in this type of CRT display device is resolved and the operability is improved. Further, the device of the present invention has a first,
A second gate circuit is installed, and the light pen is
The bright lines of the first and second CRT displays are selectively and temporarily lowered during the period of determining whether the CRT display has been touched, which simplifies the processing of the CRT discrimination circuit and facilitates CRT discrimination. The signal can be stabilized.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a conventional device, Figure 2 is a block diagram showing the configuration of the device of the present invention, and Figure 3 is a block diagram showing the configuration of the device of the present invention.
The figure is a block diagram showing the internal configuration of the main parts.
The figure is a waveform diagram for explaining the operation of the device of the present invention, in which 3 and 4 are CRT display devices, 6 and 7 are storage devices,
8 is light pan, 9 is latch circuit, 14 is CRT
The discrimination circuits are shown respectively.

Claims (1)

[Claims] 1. A clock generation section that generates a clock pulse φc, a synchronization signal generation section that forms a composite synchronization signal based on the clock pulse, and a first and second clock generation section that performs a display operation in response to deflection based on the composite synchronization signal.
2CRT display, first and second storage devices for storing screen information to be displayed on each screen of the first and second CRT display, and designating addresses of the first and second storage devices in response to the clock pulse; a single light pen; a latch circuit for taking from the address counter an address on the screen specified by the light pen in response to a pen touch signal and a bright line detection signal from the light pen; The address latched by the circuit is applied, and this address is applied to the first or second CRT display according to the designation of the first or second CRT display.
In a CRT display device comprising a write data control circuit provided to a storage device, the pen touch signal and the luminance detection signal are applied, and first and second gate signals a and b, each having a different gate period, are provided.
and a CRT discrimination signal f indicating which of the first and second CRT display units the light pen is pointing to;
a CRT discriminating circuit that generates a latch timing signal h that determines the latch operation timing of the latch circuit; and a CRT discriminating circuit that receives and selects the first gate signal a that is connected between the first storage device and the first CRT display. a first gate circuit that closes the gate when the first gate signal is significant;
2. A CRT comprising a second gate circuit connected between the CRT display device and a second gate circuit that receives the second gate signal b and closes the gate when the second gate signal b is significant.
Display device.