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JPS6133419B2 - - Google Patents
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JPS6133419B2 - - Google Patents

Info

Publication number
JPS6133419B2
JPS6133419B2 JP53156038A JP15603878A JPS6133419B2 JP S6133419 B2 JPS6133419 B2 JP S6133419B2 JP 53156038 A JP53156038 A JP 53156038A JP 15603878 A JP15603878 A JP 15603878A JP S6133419 B2 JPS6133419 B2 JP S6133419B2
Authority
JP
Japan
Prior art keywords
signal
return
transmission
section
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53156038A
Other languages
Japanese (ja)
Other versions
JPS5580943A (en
Inventor
Motoharu Terada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP15603878A priority Critical patent/JPS5580943A/en
Publication of JPS5580943A publication Critical patent/JPS5580943A/en
Publication of JPS6133419B2 publication Critical patent/JPS6133419B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/08Intermediate station arrangements, e.g. for branching, for tapping-off

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Description

【発明の詳細な説明】 本発明は、中央制御盤より専用2心線の伝送線
を介して多数の端末器にベースバンド伝送により
電力と制御信号とを伝送し、電流モードにて返送
信号を返送して中央制御盤で処理する時分割専用
線多重伝送装置の中継器に関し、その目的は伝送
線の線路抵抗、浮遊容量等で伝送波形が歪むのを
防止して伝送可能距離を著るしく延長できるよう
にして大規模なビル監視等においても1システム
の中央制御盤で多数の端末器を制御できるように
することにあり、他の目的とするところは、各中
継器における信号レベルが変動しても、返送信号
の検出を確実に行なうことのできる中継器を提供
することにある。
DETAILED DESCRIPTION OF THE INVENTION The present invention transmits power and control signals from a central control panel to a large number of terminal devices by baseband transmission via a dedicated two-core transmission line, and sends back signals in current mode. Regarding repeaters for time-division leased line multiplex transmission equipment that send back signals and process them at a central control board, the purpose of this is to prevent the transmission waveform from being distorted due to line resistance, stray capacitance, etc. of the transmission line, and to significantly increase the possible transmission distance. The purpose is to make it possible to extend the range so that a large number of terminals can be controlled by a single system central control panel even in large-scale building monitoring, etc. Another purpose is to prevent the signal level at each repeater from changing. An object of the present invention is to provide a repeater that can reliably detect a returned signal even if the signal is returned.

第1図は本発明に係る専用線多重伝送装置のブ
ロツク回路図で、1は中央制御盤、2は中継器、
3は端末器で、4は商用電源であり、中央制御盤
1より第2図aのような信号を送出する。即ち、
1端末器当り第2図aのように開始信号S1、端末
器番地信号S2、制御データ信号S3および返送デー
タ待機信号S4から構成される信号を中央制御盤1
より送出する。端末器3から出力される第2図b
のような返送データ信号S5は、返送データ待機信
号S4に重畳された形で第2図c又は第2図dのよ
うな返送信号として中央制御盤1へ返送される。
第2図cは電圧モード波形、第2図dは電流モー
ド波形である。この1端末器当りの信号は、端末
器数だけ直列にサイクリツクに伝送線5上に乗
り、中央制御盤1と端末器3でそれぞれ信号処理
される。
FIG. 1 is a block circuit diagram of a dedicated line multiplex transmission device according to the present invention, in which 1 is a central control panel, 2 is a repeater,
3 is a terminal device, 4 is a commercial power supply, and the central control panel 1 sends out signals as shown in FIG. 2a. That is,
As shown in FIG. 2a, each terminal transmits a signal consisting of a start signal S 1 , a terminal address signal S 2 , a control data signal S 3 and a return data standby signal S 4 to the central control panel 1.
Send from Figure 2b output from the terminal 3
The return data signal S5 is superimposed on the return data standby signal S4 and is sent back to the central control board 1 as a return signal as shown in FIG. 2c or 2d.
FIG. 2c is a voltage mode waveform, and FIG. 2d is a current mode waveform. This signal per terminal device is serially and cyclically carried on the transmission line 5 by the number of terminal devices, and is processed by the central control panel 1 and the terminal device 3, respectively.

本発明はこの専用線多重伝送装置の中継器に関
するものでは、以下実施例により詳細に説明す
る。
The present invention, which relates to a repeater for this leased line multiplex transmission equipment, will be explained in detail with reference to embodiments below.

第3図において、6は信号検出部で、伝送線5
から中央制御盤1送出の信号をとり出すもので、
電圧整形駆動出力部7で電圧整形し、駆動アツプ
して出力する。この入力8より出力9への方向が
電圧整形系としておく。10は伝送線5に直列に
接続した抵抗で、この抵抗10の電圧により返送
信号検出部11で返送信号をとり出す。12は返
送ゲート号発生部であり、13は線路短絡部で、
返送信号を電流モードにして中央制御盤1へ返送
する。電圧整形駆動出力部7と返送信号検出部1
1は中央制御盤1内のものと同様で、信号検出部
6と線路短絡部13は端末器3内のものと同様の
構成としておく。
In FIG. 3, 6 is a signal detection section, and the transmission line 5
This is to extract the signal sent from the central control panel 1.
A voltage shaping drive output section 7 shapes the voltage, drives it up, and outputs it. The direction from this input 8 to the output 9 is assumed to be a voltage shaping system. Reference numeral 10 denotes a resistor connected in series to the transmission line 5, and the voltage across this resistor 10 causes a return signal detecting section 11 to extract the return signal. 12 is a return gate signal generation part, 13 is a line short circuit part,
The return signal is set to current mode and sent back to the central control panel 1. Voltage shaping drive output section 7 and return signal detection section 1
1 is the same as that in the central control panel 1, and the signal detecting section 6 and line shorting section 13 are of the same configuration as those in the terminal device 3.

返送信号検出部11は第4図のように、OPア
ンプ14,15、比較器16などで構成され、返
送信号期間とそれ以外の定常時の制御信号期間と
を判別し、定常時の制御信号を抵抗R7とコンデ
ンサCで積分することによつて基準電圧VRを発
生し、この基準電圧と電流モードの返送信号が伝
送線直列抵抗10で電圧変換された電圧レベルと
を比較器16で比較して返送信号を検出する。こ
こで、返送ゲート信号発生部12は、第5図の返
送期間Tで返送信号が積分されて基準電圧が上昇
することを防止するために返送期間中積分回路を
信号が回避するようにゲート信号を発生するもの
である。尚、第5図aは伝送信号波形図、同図b
は返送ゲート信号波形図である。
As shown in FIG. 4, the return signal detection unit 11 is composed of OP amplifiers 14, 15, a comparator 16, etc., and distinguishes between a return signal period and a control signal period in a steady state, and detects a control signal in a steady state. is integrated by a resistor R7 and a capacitor C to generate a reference voltage VR , and a comparator 16 compares this reference voltage with the voltage level obtained by converting the current mode return signal into a voltage by a transmission line series resistor 10. Compare and detect the returned signal. Here, the return gate signal generating section 12 generates a gate signal so that the signal avoids the integrating circuit during the return period in order to prevent the reference voltage from increasing due to integration of the return signal during the return period T shown in FIG. is generated. In addition, Fig. 5a is a transmission signal waveform diagram, and Fig. 5b is a diagram of the transmission signal waveform.
is a return gate signal waveform diagram.

返送ゲート信号発生部12は、第6図のように
開始信号判別部17、制御信号数カウント部1
8、フリツプフロツプ19、基本パルス発生器2
0および返送データ待期信号終了判別部21によ
り構成しておく。22は信号入力であり、23は
返送ゲート信号出力である。従来、返送ゲート信
号は、中央制御盤1内の伝送信号作成途上で第2
図の返送データ待期信号S4を与える信号から作ら
れているが、本発明にあつては、でき上つた伝送
信号から中継器2内でゲート信号をとり出すもの
である。
The return gate signal generating section 12 includes a start signal determining section 17 and a control signal number counting section 1 as shown in FIG.
8, flip-flop 19, basic pulse generator 2
0 and a return data waiting signal end determination unit 21. 22 is a signal input, and 23 is a return gate signal output. Conventionally, the return gate signal was sent to the second gate in the process of creating the transmission signal in the central control panel 1.
Although the gate signal is generated from the signal that provides the return data waiting signal S4 shown in the figure, in the present invention, the gate signal is extracted within the repeater 2 from the completed transmission signal.

基本パルス発生器20の出力パルスは伝送信号
の周波数の数倍高い周波数とし、各種信号をノイ
ズと混同しないように判別させるために必要なも
のである。まず、基本パルスで開始信号S1を開始
信号判別部17で判別し、つぎの制御信号(ここ
では端末器番地信号S2、制御データ信号S3を指
す)の数を制御信号数カウント部18でカウント
し、全制御信号が出終つた後、フリツプフロツプ
19をトリガし、一方、基本パルスで返送データ
待期信号の終了を返送データ待期信号終了判別部
21で判別し、フリツプフロツプ19をリセツト
する。このフリツプフロツプ19の出力が返送ゲ
ート信号となる。
The output pulses of the basic pulse generator 20 have a frequency several times higher than the frequency of the transmission signal, which is necessary for distinguishing various signals so as not to confuse them with noise. First, the start signal S 1 is determined by the basic pulse in the start signal discriminator 17, and the number of the next control signals (in this case refers to the terminal device address signal S 2 and the control data signal S 3 ) is determined by the control signal number counter 18. After all the control signals have been output, the flip-flop 19 is triggered, and on the other hand, the end of the return data wait signal is determined by the return data wait signal end determination section 21 using the basic pulse, and the flip-flop 19 is reset. . The output of this flip-flop 19 becomes the return gate signal.

第7図は返送ゲート信号発生部12の具体回路
図で、24は第1カウンタで、その設定値Aは伝
送信号中、最も巾が狭いパルスで基本パルスがカ
ウントし得る値であり、設定値Bは開始信号S1
基本パルスカウントする値、設定値CはB+2〜
3の値で開始信号S1と返送データ待期信号S4とを
区別している。ただし、開始信号S1の巾は返送デ
ータ待期信号S4の巾より狭いことを前提としてい
る。25は第2カウンタで、設定値Nは制御信号
のパルス数に設定してある。26はフリツプフロ
ツプであり、27,28,29はANDゲートで
ある。第8図は第7図の各部の信号波形図であ
る。
FIG. 7 is a specific circuit diagram of the return gate signal generating section 12, where 24 is a first counter, and its set value A is the narrowest pulse in the transmission signal and is the value that can be counted as a basic pulse. B is the value for basic pulse counting with start signal S 1 , and setting value C is B+2 ~
The value 3 distinguishes the start signal S1 from the return data waiting signal S4 . However, it is assumed that the width of the start signal S1 is narrower than the width of the return data waiting signal S4 . 25 is a second counter, and the set value N is set to the number of pulses of the control signal. 26 is a flip-flop, and 27, 28, and 29 are AND gates. FIG. 8 is a signal waveform diagram of each part of FIG. 7.

叙上のように本発明は、信号検出部により伝送
線からとり出した信号を電圧整形駆動出力部によ
り電圧整形、駆動アツプして出力し、伝送線に直
列接続した抵抗を介して返送信号検出部により返
送信号をとり出すようにするとともに返送ゲート
信号発生部を設け、前記返送信号を線路短絡部に
より電流モードにして返送する如くしたから、伝
送線の線路抵抗、浮遊容量等で伝送波形が歪むの
を防止でき、伝送可能距離を著るしく延長でき、
大規模なビル監視等においても1システムの中央
制御盤で多数の端末器を制御でき、又、電流検出
抵抗の両端間のピーク電圧を検出し、返送信号検
出用電圧比較器の基準電圧を該ピーク電圧に応じ
て変化させると共に、伝送信号のパルス数をカウ
ントして制御データ信号終了時点から次の開始信
号までの区間を検出し、該区間中は上記ピーク電
圧の検出を停止するようにしたので、伝送線の長
さや実装される端末器数などにより中継器が受信
する信号レベルが大きく変動しても、返送信号検
出用の基準レベルがそれに追従し、返送信号を確
実に検出して中継できるという効果を奏するもの
であり、これによつて電流モードによる返送信号
の中継を実質上可能にしたものである。
As described above, the present invention outputs a signal taken out from a transmission line by a signal detection section, voltage-shapes it by a voltage-shaping drive output section, drives it up, and detects a return signal via a resistor connected in series with the transmission line. Since the return signal is taken out by the section and a return gate signal generator is provided, and the return signal is returned in current mode by the line short circuit section, the transmission waveform is affected by the line resistance, stray capacitance, etc. of the transmission line. It can prevent distortion and significantly extend the transmission distance.
Even in large-scale building monitoring, it is possible to control a large number of terminals with one central control panel, and it also detects the peak voltage across the current detection resistor and adjusts the reference voltage of the voltage comparator for return signal detection. In addition to changing the peak voltage according to the peak voltage, the number of pulses of the transmission signal is counted to detect the interval from the end of the control data signal to the next start signal, and the detection of the peak voltage is stopped during the interval. Therefore, even if the signal level received by the repeater varies greatly depending on the length of the transmission line or the number of terminals installed, the reference level for detecting the returned signal will follow it, and the returned signal will be reliably detected and relayed. This has the effect of making it possible to substantially relay the return signal in current mode.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る専用線多重伝送装置のブ
ロツク回路図、第2図a〜dは同上の信号波形
図、第3図は本発明中継器の一実施例のブロツク
回路図、第4図は同上の返送信号検出部の回路
図、第5図a,bは同上の要部信号波形図、第6
図は同上の返送ゲート信号発生部のブロツク回路
図、第7図は同上の具体回路図、第8図a〜jは
同上の要部信号波形図である。 5…伝送線、6…信号検出部、7…電圧整形駆
動出力部、10…抵抗、11…返送信号検出部、
12…返送ゲート信号発生部、13…線路短絡
部、17…開始信号判別部、18…制御信号数カ
ウント部、19…フリツプフロツプ、20…基本
パルス発生器、21…返送データ待期信号終了判
別部。
FIG. 1 is a block circuit diagram of a dedicated line multiplex transmission device according to the present invention, FIGS. 2 a to d are signal waveform diagrams of the same as above, FIG. The figure is a circuit diagram of the return signal detection section same as above, Figures 5a and b are main part signal waveform diagrams same as above, and Figure 6
This figure is a block circuit diagram of the return gate signal generating section same as above, FIG. 7 is a specific circuit diagram same as above, and FIGS. 8 a to 8 j are main part signal waveform diagrams same as above. 5... Transmission line, 6... Signal detection section, 7... Voltage shaping drive output section, 10... Resistor, 11... Return signal detection section,
12...Return gate signal generation section, 13...Line short circuit section, 17...Start signal discrimination section, 18...Control signal number counting section, 19...Flip-flop, 20...Basic pulse generator, 21...Return data waiting signal end discrimination section .

Claims (1)

【特許請求の範囲】[Claims] 1 中央制御盤より専用伝送線を介して複数の端
未器へ開始信号、端未器番地信号、制御データ信
号及び返送データ待期信号を含む一定パルス数の
伝送信号を伝送し、各端末器より返送データ待期
信号のパルス区間中に伝送線に短絡することによ
り返送信号を返送する時分割多重伝送装置の伝送
線の途中に介装され、伝送信号を検出する信号検
出部と、検出した信号を増幅、整形して再送出す
る電圧整形駆動出力部と、伝送線に直列接続され
た電流検出用抵抗により返送信号を検出する返送
信号検出部と、該返送信号を電流モードで再送出
する線路短絡部とよりなる中継器において、上記
電流検出抵抗の両端間のピーク電圧を検出し、返
送信号検出用電圧比較器の基準電圧を該ピーク電
圧に応じて変化させる手段と、伝送信号のパルス
数とカウントして制御データ信号終了時点から次
の開始信号までの区間を検出し、該区間中は上記
ピーク電圧の検出を停止せしめる手段とを備えて
成ることを特徴とする専用線多重伝送装置の中継
器。
1 Transmit a fixed number of transmission signals including a start signal, a terminal address signal, a control data signal, and a return data waiting signal to multiple terminal devices from the central control panel via a dedicated transmission line, and A signal detection section is inserted in the transmission line of a time division multiplex transmission device that returns the return signal by short-circuiting the transmission line during the pulse interval of the return data waiting signal, and detects the transmission signal; A voltage shaping drive output section that amplifies and shapes the signal and retransmits it; a return signal detection section that detects the return signal using a current detection resistor connected in series with the transmission line; and a return signal detection section that retransmits the return signal in current mode. In the repeater consisting of a line short-circuit section, means for detecting the peak voltage between both ends of the current detection resistor and changing the reference voltage of the voltage comparator for detecting the return signal in accordance with the peak voltage, and a pulse of the transmission signal. A leased line multiplex transmission device characterized by comprising means for counting the number of signals and detecting an interval from the end point of the control data signal to the next start signal, and stopping detection of the peak voltage during the interval. relay.
JP15603878A 1978-12-15 1978-12-15 Repeater for private line multiple transmission device Granted JPS5580943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15603878A JPS5580943A (en) 1978-12-15 1978-12-15 Repeater for private line multiple transmission device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15603878A JPS5580943A (en) 1978-12-15 1978-12-15 Repeater for private line multiple transmission device

Publications (2)

Publication Number Publication Date
JPS5580943A JPS5580943A (en) 1980-06-18
JPS6133419B2 true JPS6133419B2 (en) 1986-08-01

Family

ID=15618954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15603878A Granted JPS5580943A (en) 1978-12-15 1978-12-15 Repeater for private line multiple transmission device

Country Status (1)

Country Link
JP (1) JPS5580943A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0669184B2 (en) * 1986-07-28 1994-08-31 日本ビクター株式会社 Interface circuit
JPS63174747U (en) * 1988-05-12 1988-11-14

Also Published As

Publication number Publication date
JPS5580943A (en) 1980-06-18

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