JPS6230390B2 - - Google Patents
Info
- Publication number
- JPS6230390B2 JPS6230390B2 JP54157884A JP15788479A JPS6230390B2 JP S6230390 B2 JPS6230390 B2 JP S6230390B2 JP 54157884 A JP54157884 A JP 54157884A JP 15788479 A JP15788479 A JP 15788479A JP S6230390 B2 JPS6230390 B2 JP S6230390B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- voltage
- section
- constant current
- cmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 8
- 230000000295 complement effect Effects 0.000 claims description 3
- 230000007423 decrease Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
Landscapes
- Control Of Electrical Variables (AREA)
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
Description
【発明の詳細な説明】
本発明は水晶振動子を時間基準源とし、該振動
子の周波数を時刻表示装置まで分周する手段を有
するコンプリメンタリーMOS集積回路(以下
CMOS・ICと略す)を用いた水晶発振式電子時
計に関し、特にCMOS・ICの一部に印加される
電圧の供給に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention utilizes a complementary MOS integrated circuit (hereinafter referred to as "complementary MOS integrated circuit") which uses a crystal oscillator as a time reference source and has means for dividing the frequency of the oscillator up to a time display device.
It relates to crystal oscillation type electronic watches using CMOS IC (abbreviated as CMOS IC), and particularly relates to the supply of voltage applied to a part of CMOS IC.
従来より用いられている水晶発振式電子時計の
構成は、第1図に示す如く(発振部11、分周部
12、表示駆動部13、時刻表示装置14およ
び、電源15等からなつている。このうち発振部
や分周部等からなるCMOS・ICには、正常な動
作を続けるために必要な最低限度の電圧(以下V
eodと略す)が存在する。電池を電源とする時計
において、電池寿命を長くするためには、
CMOS・ICの消費電力を減少させるのみなら
ず。Veodも下げておく必要がある。しかしなが
ら、一般にCMOS・ICでは消費電力が少ない程
Veodが高いという特性があり、このことが低消
電でかつVeodの低いCMOS・ICの作成を困難に
している。 The structure of a conventionally used crystal oscillation type electronic timepiece is as shown in FIG. 1 (composed of an oscillating section 11, a frequency dividing section 12, a display driving section 13, a time display device 14, a power source 15, etc.). Among these, CMOS ICs consisting of oscillation parts, frequency division parts, etc. are equipped with the minimum voltage (hereinafter referred to as VV) required to continue normal operation.
(abbreviated as eod ) exists. In order to extend the battery life of watches powered by batteries,
It not only reduces the power consumption of CMOS/IC. It is also necessary to lower V eod . However, CMOS ICs generally have a characteristic that the lower the power consumption, the higher the V eod , and this makes it difficult to create a CMOS IC that consumes less power and has a low V eod .
本発明は、CMOS・ICの一部に印加される電
圧の供給方法を工夫することによつて上記問題点
を除去するよう供したもので、その一実施例を第
2図に示した。第2図において21,22,2
3,24,25はそれぞれ第1図の11,12,
13,14,15に相当する。26は定電流特性
を有する回路もしくは素子、27は抵抗である。
第2図の例では、少なくとも21の部分に用いら
れるMOSトランジスタのしきい電圧は、第1図
に使用されるMOSトランジスタのしきい電圧よ
りも絶対値を小さくしておき、印加電圧が低い場
合でも発振しやすくしてやる必要がある。 The present invention aims to eliminate the above-mentioned problems by devising a method of supplying voltage applied to a part of the CMOS IC, and one embodiment thereof is shown in FIG. 2. 21, 22, 2 in Figure 2
3, 24, 25 are 11, 12, and 12 in Figure 1, respectively.
Corresponds to 13, 14, and 15. 26 is a circuit or element having constant current characteristics, and 27 is a resistor.
In the example in Figure 2, the threshold voltage of the MOS transistor used in at least the section 21 is set to a smaller absolute value than the threshold voltage of the MOS transistor used in Figure 1, and when the applied voltage is low, However, it is necessary to make it easier to oscillate.
本発明の特徴は、定電流特性を有する回路また
は素子と抵抗との直列接続により電源電圧を分割
し、前記抵抗の両端の電圧をCMOS・ICの一部
に印加することである。26は定電流特性を有す
るから、電源電圧が低下した場合でも、抵抗27
と発振部21を流れる電流の和は変化しない。今
電源電圧を下げていつたとき、発振部21の発振
が停止しそうになつたと仮定すると、発振部21
を流れる電流が減少し始めるわけであるから、そ
の分だけ抵抗27を流れる電流が増加する。した
がつて抵抗27の両端の電圧は上昇し、その結果
発振部21は再び発振しやすい状態になる。結局
電源電圧が低下しても、定電流特性素子26の定
電流特性が失なわれない範囲ならば、発振部21
は発振を続けることができ、見掛け上Veodが下
がることになる。消費電力については、定電流特
性素子26を流れる電流値と抵抗27の抵抗値、
および発振部21に使用されるMOSトランジス
タのしきい電圧等を適当に選ぶことにより、第1
図の場合よりも増加しないようにすることができ
る。また、発振状態では発振部21のインピーダ
ンスの値が上下するが、発振部21が最も低イン
ピーダンスになつたときには、定電流特性素子2
6を流れる電流のうち、抵抗27に流れ込む電流
が最少になるわけであるから、抵抗27の両端の
電圧すなわち発振部21に印加される電圧が最低
になり、第2図の構成そのものが、発振部21で
の消費電力を減少させる方式になつている。した
がつて、第2図の構成により、消費電力を増加さ
せずにVeodを下げることができる。 A feature of the present invention is that the power supply voltage is divided by a series connection of a circuit or element having constant current characteristics and a resistor, and the voltage across the resistor is applied to a part of the CMOS IC. Since the resistor 26 has constant current characteristics, even if the power supply voltage decreases, the resistor 27
The sum of the currents flowing through the oscillating section 21 does not change. Assuming that the oscillation section 21 is about to stop oscillating when the power supply voltage is lowered, the oscillation section 21
Since the current flowing through the resistor 27 begins to decrease, the current flowing through the resistor 27 increases accordingly. Therefore, the voltage across the resistor 27 increases, and as a result, the oscillating section 21 becomes susceptible to oscillation again. As long as the constant current characteristic of the constant current characteristic element 26 is not lost even if the power supply voltage decreases, the oscillation section 21
can continue to oscillate, and V eod will apparently decrease. Regarding power consumption, the current value flowing through the constant current characteristic element 26, the resistance value of the resistor 27,
By appropriately selecting the threshold voltage etc. of the MOS transistor used in the oscillation section
It is possible to prevent the increase from increasing as compared to the case shown in the figure. Further, in the oscillation state, the impedance value of the oscillating section 21 increases and decreases, but when the oscillating section 21 reaches the lowest impedance, the constant current characteristic element 2
Among the currents flowing through the resistor 27, the current flowing into the resistor 27 becomes the minimum, so the voltage across the resistor 27, that is, the voltage applied to the oscillation section 21 becomes the minimum, and the configuration shown in FIG. The system is designed to reduce power consumption in the section 21. Therefore, with the configuration shown in FIG. 2, V eod can be lowered without increasing power consumption.
第2図の例では、抵抗27の両端の電圧を発振
部に印加しているが、他の入力インピーダンスの
高い回路に印加するならば、これは定電圧源とな
る。この場合電源電圧が変動しても抵抗27の両
端の電圧は変化しないから、この電圧を印加され
る回路のVeodが見掛け上下がることは明らかで
ある。 In the example of FIG. 2, the voltage across the resistor 27 is applied to the oscillation section, but if applied to another circuit with high input impedance, this becomes a constant voltage source. In this case, even if the power supply voltage fluctuates, the voltage across the resistor 27 does not change, so it is clear that the V eod of the circuit to which this voltage is applied will apparently rise or fall.
本発明の第2の特徴は、定電流特性を有する素
子としてMNOSトランジスタを用いることであ
り、その回路構成の一実施例を第3図に示した。
第3図において301はMNOSトランジスタであ
り、302は第2図における抵抗27の抵抗に相
当する。MNOSトランジスタには前憶保持性があ
り、一度オン状態にしておけば、電源電圧が変動
しても、MNOSトランジスタを貫通する電流はほ
とんど変化しない。またその電流値は、ゲート部
に注入する電荷量やしきい電圧等を調整すること
により、任意の値に設定できる。 The second feature of the present invention is that an MNOS transistor is used as the element having constant current characteristics, and an example of the circuit configuration thereof is shown in FIG.
In FIG. 3, 301 is an MNOS transistor, and 302 corresponds to the resistance of resistor 27 in FIG. The MNOS transistor has a memory retention property, and once it is turned on, the current passing through the MNOS transistor hardly changes even if the power supply voltage fluctuates. Further, the current value can be set to an arbitrary value by adjusting the amount of charge injected into the gate portion, the threshold voltage, etc.
MNOSトランジスタはCMOS・ICと同一チツ
プ上に形成可能であり、抵抗302を拡散層や多
結晶シリコン等で形成するならば、本発明におけ
る付加回路のすべてをCMOS・ICと同一チツプ
上に作成することができる。 The MNOS transistor can be formed on the same chip as the CMOS/IC, and if the resistor 302 is formed of a diffusion layer, polycrystalline silicon, etc., all of the additional circuits in the present invention can be formed on the same chip as the CMOS/IC. be able to.
本発明により、消費電力を増加させることなし
に、Veodの低いCMOS・ICを提供することが可
能になり、その効果は非常に大きい。 According to the present invention, it is possible to provide a CMOS IC with low V eod without increasing power consumption, and the effect is very large.
第1図は従来方式の電子時計のブロツキングダ
イアグラム。第2図は本発明による電子時計の構
成を示す構成図、第3図は本発明の電子時計を
MNOSトランジスタを用いて実現した場合の要部
回路図である。
11,21…発振部、12,22…分周部、1
3,23…表示駆動部、14,24…時刻表示装
置、15,25…電源、26…定電流特性を有す
る回路又は素子、27,302…抵抗、301…
MNOSトランジスタ。
Figure 1 is a blocking diagram of a conventional electronic clock. Figure 2 is a configuration diagram showing the configuration of an electronic timepiece according to the present invention, and Figure 3 is a diagram showing the configuration of an electronic timepiece according to the present invention.
FIG. 3 is a circuit diagram of the main part when realized using MNOS transistors. 11, 21... Oscillation section, 12, 22... Frequency division section, 1
3, 23... Display drive section, 14, 24... Time display device, 15, 25... Power supply, 26... Circuit or element having constant current characteristics, 27, 302... Resistor, 301...
MNOS transistor.
Claims (1)
子の周波数を分周する手段を有するコンプリメン
タリーMOS集積回路を用いた水晶発振式電子時
計において、定電流特性を有する回路もしくは素
子と、抵抗とを直列接続とし、電源電圧を分割
し、前記抵抗の両端の電圧を、前記集積回路の一
部に供給する如く構成にしたことを特徴とする水
晶発振式電子時計。 2 定電流特性を有する素子はMNOSトランジス
タから成ることを特徴とする特許請求の範囲第1
項記載の水晶発振式電子時計。[Scope of Claims] 1. A circuit having constant current characteristics in a crystal oscillation electronic timepiece using a complementary MOS integrated circuit that uses a crystal oscillator as a time reference source and has means for dividing the frequency of the crystal oscillator. Alternatively, a crystal oscillation electronic timepiece characterized in that an element and a resistor are connected in series, a power supply voltage is divided, and the voltage across the resistor is supplied to a part of the integrated circuit. 2. Claim 1, characterized in that the element having constant current characteristics is an MNOS transistor.
The crystal oscillation type electronic clock described in Section 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15788479A JPS5679983A (en) | 1979-12-05 | 1979-12-05 | Quartz oscillation type electronic timepiece |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15788479A JPS5679983A (en) | 1979-12-05 | 1979-12-05 | Quartz oscillation type electronic timepiece |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5679983A JPS5679983A (en) | 1981-06-30 |
| JPS6230390B2 true JPS6230390B2 (en) | 1987-07-02 |
Family
ID=15659516
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15788479A Granted JPS5679983A (en) | 1979-12-05 | 1979-12-05 | Quartz oscillation type electronic timepiece |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5679983A (en) |
-
1979
- 1979-12-05 JP JP15788479A patent/JPS5679983A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5679983A (en) | 1981-06-30 |
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