JPS6262075B2 - - Google Patents
Info
- Publication number
- JPS6262075B2 JPS6262075B2 JP16707982A JP16707982A JPS6262075B2 JP S6262075 B2 JPS6262075 B2 JP S6262075B2 JP 16707982 A JP16707982 A JP 16707982A JP 16707982 A JP16707982 A JP 16707982A JP S6262075 B2 JPS6262075 B2 JP S6262075B2
- Authority
- JP
- Japan
- Prior art keywords
- incident position
- resistance
- semiconductor device
- detecting
- particle beam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/29—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to radiation having very short wavelengths, e.g. X-rays, gamma-rays or corpuscular radiation
Landscapes
- Measurement Of Radiation (AREA)
- Light Receiving Elements (AREA)
- Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
Description
【発明の詳細な説明】
本発明は、ある伝導型の半導体基板の一方の面
にそれとは逆の伝導型の抵抗層を設け、前記抵抗
層に入射した粒子線等によつて生成された変換電
流を前記抵抗層により分割し複数の電極から取り
出し粒子線等の入射位置を検出する粒子線等の入
射位置検出用半導体装置に関する。Detailed Description of the Invention The present invention provides a resistance layer of an opposite conductivity type on one side of a semiconductor substrate of a certain conductivity type, and a conversion generated by a particle beam or the like incident on the resistance layer. The present invention relates to a semiconductor device for detecting the incident position of a particle beam, etc., in which a current is divided by the resistive layer and extracted from a plurality of electrodes to detect the incident position of the particle beam, etc.
光スポツトや粒子線の入射位置を計測する装置
としてテレビジヨン技術を用いた走査型のものが
広く知られている。 A scanning type device using television technology is widely known as a device for measuring the incident position of a light spot or a particle beam.
近時、前記走査によらないで粒子線等の入射位
置を検出できる粒子線等の入射位置検出用半導体
装置が開発され、使用されるに至つている。 Recently, semiconductor devices for detecting the incident position of particle beams, etc., which are capable of detecting the incident position of particle beams, etc. without using the above-mentioned scanning, have been developed and are being used.
まずこの粒子線等の入射位置検出用半導体装置
の基本的な構成と動作を簡単に説明する。 First, the basic configuration and operation of this semiconductor device for detecting the incident position of particle beams, etc. will be briefly explained.
第1図は従来の入射位置検出用半導体装置の構
成を説明するための略図である。 FIG. 1 is a schematic diagram for explaining the configuration of a conventional semiconductor device for detecting an incident position.
第1図a,b、およびcは、それぞれ表面分割
型の入射位置検出用半導体装置の斜視図、断面
図、および平面図である。従来の表面分割型の入
射位置検出用半導体装置は各図に示されているよ
うにある伝導型を示す半導体基板1の片面に反対
の伝導型の抵抗層2を形成してある。抵抗層2の
形状は正方形または長方形であり、その抵抗層2
の辺に沿つて辺の長さの一定の割合の部分に電極
3が形成されている。 FIGS. 1a, 1b, and 1c are a perspective view, a sectional view, and a plan view, respectively, of a surface-divided type semiconductor device for detecting an incident position. In the conventional surface-divided semiconductor device for detecting the incident position, as shown in each figure, a resistive layer 2 of the opposite conductivity type is formed on one surface of a semiconductor substrate 1 of a certain conductivity type. The shape of the resistance layer 2 is square or rectangular, and the resistance layer 2
Electrodes 3 are formed along the sides at a certain ratio of the length of the sides.
また第1図d,e,fは、それぞれ両面分割型
の入射位置検出用半導体装置の斜視図、断面図、
および平面図である。半導体基板1上に形成され
た、基板とは反対の伝導型を持つ正方形または長
方形の抵抗層2の一組の向かい合う辺に沿つて電
極3が形成され、また半導体基板1裏面には全面
に基板と同じ伝導型の抵抗層5が形成されてい
る。そして裏面には前記表面の電極3と直交する
対辺に沿つて電極4が形成されている。 1d, e, and f are a perspective view, a cross-sectional view, and a cross-sectional view, respectively, of a double-sided split type semiconductor device for detecting the incident position.
and a plan view. Electrodes 3 are formed on a semiconductor substrate 1 along a pair of opposite sides of a square or rectangular resistance layer 2 having a conductivity type opposite to that of the substrate. A resistance layer 5 of the same conductivity type is formed. An electrode 4 is formed on the back surface along the opposite side orthogonal to the electrode 3 on the front surface.
座標軸を第1図のcおよびfのように正方形ま
たは長方形の抵抗層の中心点を通り、抵抗層の辺
と平行になるように取り、電極と交わる点を±1
とする。 The coordinate axes are set so that they pass through the center point of the square or rectangular resistance layer and are parallel to the sides of the resistance layer as shown in c and f in Figure 1, and the points where they intersect with the electrodes are set at ±1.
shall be.
表面分割型入射位置検出用半導体装置の電極3
の、3の、3の、3のを接地し、電極5
のにp−n接合が逆バイアスとなるように電圧
をかけておく。 Electrode 3 of surface-divided type incident position detection semiconductor device
, 3, 3, 3 are grounded, and the electrode 5
However, a voltage is applied so that the p-n junction becomes reverse biased.
また両面分割型入射位置検出用半導体装置の電
極3の、3のと、電極3の、3のとの間
にp−n接合が逆バイアスとなるようにバイアス
をかけておく。 Further, a bias is applied between the electrodes 3 and 3 of the double-sided split type incident position detection semiconductor device so that the pn junction is reverse biased.
抵抗層の上の任意の座標(x、y)の点に光ス
ポツトや粒子線が照射されると内部効果によつて
発生した励起キヤリアはp−n接合で分離され、
表面分割型の入射位置検出用半導体装置ではその
一方のキヤリアが抵抗層2で分割され、電極3の
〜に流れ込む。3のの電流をI1、3のの
電流をI2、3のの電流をI3、3のの電流をI4
とすると、
X=(I3−I1)/(I3+I1)
Y=(I2−I4)/(I2+I4)
の計算をすることにより(x、y)に対応した位
置出力を得ることができる。 When a light spot or particle beam is irradiated onto a point at arbitrary coordinates (x, y) on the resistive layer, excited carriers generated by internal effects are separated at the p-n junction.
In the surface-divided semiconductor device for detecting the incident position, one of the carriers is divided by the resistive layer 2 and flows into the electrodes 3 . The current of 3 is I 1 , the current of 3 is I 2 , the current of 3 is I 3 , the current of 3 is I 4
Then , by calculating _ _ _ _ You can get the output.
両面分割型の入射位置検出用半導体装置ではp
−n接合で分離されたキヤリアのうち一方は表面
に設けられた抵抗層2で分割された電極3のと
に流れ込み、他方は裏面の抵抗層5で分割され
た電極4のとに流れる。 In the double-sided split type semiconductor device for detecting the incident position, p
One of the carriers separated by the -n junction flows into the electrode 3 divided by the resistance layer 2 provided on the front surface, and the other flows into the electrode 4 divided by the resistance layer 5 provided on the back surface.
X=(I3−I1)/(I3+I1)
Y=(I2−I4)/(I2+I4)
の計算をすることにより(x、y)に対応した位
置出力を得ることができる。By calculating X = (I 3 - I 1 ) / (I 3 + I 1 ) Y = (I 2 - I 4 ) / (I 2 + I 4 ), obtain the position output corresponding to (x, y). be able to.
表面分割型の入射位置検出用半導体装置と両面
分割型の入射位置検出用半導体装置は互いに他方
にはない長所と短所を持つている。 The surface-split type semiconductor device for detecting the incident position and the double-side split type semiconductor device for detecting the incident position each have advantages and disadvantages that the other does not have.
次に両入射位置検出用半導体装置の位置出力特
性を説明する。第2図は両入射位置検出用半導体
装置の位置出力特性を示すグラフであつて同図A
は表面分割型の入射位置検出用半導体装置の位置
出力特性、同図Bは両面分割型の入射位置検出用
半導体装置の位置出力特性を示している。いずれ
の型のものも、13mm×13mmの抵抗層2内の10mm×
10mmの領域内をx軸、y軸にそれぞれ平行に一定
ピツチで光スポツトを移動させて得られた前述の
X、Yの出力特性をグラフ化したものである。 Next, the position output characteristics of the semiconductor device for detecting both incident positions will be explained. Figure 2 is a graph showing the position output characteristics of both incident position detection semiconductor devices;
B shows the position output characteristics of a surface-split type semiconductor device for detecting the incident position, and FIG. Both types have a 10mm x
This is a graph of the aforementioned X and Y output characteristics obtained by moving a light spot at a constant pitch within a 10 mm area parallel to the x and y axes.
第2図Aに示す表面分割型の入射位置検出用半
導体装置では、測定のための光スポツトは碁盤の
目を形成するように一定ピツチで移動させている
のに、出力図形のピツチは一定ではなく周辺部に
おいてピツチが狭くなつている。これに対して第
2図Bに示す両面分割型の入射位置検出用半導体
装置の出力特性はピツチはほぼ一定となつていて
歪が少ない。 In the surface-divided semiconductor device for incident position detection shown in FIG. 2A, the light spot for measurement is moved at a constant pitch to form a grid, but the pitch of the output figure is not constant. The pitch is narrower at the periphery. On the other hand, the output characteristics of the double-sided split type semiconductor device for detecting the incident position shown in FIG. 2B have a substantially constant pitch and little distortion.
両面分割型の入射位置検出用半導体装置は、前
述のように出力特性が優れているが、基板1の裏
面に抵抗層5を形成する必要があるため、基板1
内にある結晶欠陥をゲツタリングするのが困難で
ある。そのため、表面分割型の入射位置検出用半
導体装置に比較して接合もれ電流がはるかに大き
くなり、接合もれ電流は10倍〜100倍に達する。
また、この種の入射位置検出用半導体装置におい
て入力(光パルス、粒子など)の位置変動が速い
場合、もしくは入力がパルスである時には出力波
形の応答を速くするためp−n接合の逆バイアス
電圧を大きくする必要がある。表面分割型の入射
位置検出用半導体装置ではバイアスを基板の裏面
電極(第1図a図)から加えているため、抵抗
層側の電極に接続された増幅器と無関係に任意に
大きなバイアス電圧の印加が可能である。 The double-sided split type semiconductor device for incident position detection has excellent output characteristics as described above, but since it is necessary to form the resistance layer 5 on the back surface of the substrate 1,
It is difficult to getter the crystal defects inside. Therefore, the junction leakage current becomes much larger than that of a surface-divided semiconductor device for detecting the incident position, reaching 10 to 100 times as much junction leakage current.
In addition, in this type of semiconductor device for incident position detection, when the position of the input (light pulse, particle, etc.) changes quickly, or when the input is a pulse, a reverse bias voltage of the p-n junction is applied in order to speed up the response of the output waveform. needs to be made larger. In the surface-split type semiconductor device for detecting the incident position, bias is applied from the back electrode of the substrate (Figure 1a), so an arbitrarily large bias voltage can be applied regardless of the amplifier connected to the electrode on the resistance layer side. is possible.
これに対し、両面分割型の入射位置検出用半導
体装置は表と裏の信号電極間にバイアス電圧を加
えるために信号電極から得られる出力は信号+バ
イアス電圧が重なつたものとなる。この出力から
信号分だけを抜き出す第1の方法として、増幅器
でバイアス電圧分だけ引算する方法がある。この
とき、バイアス電圧と出力信号の振幅との和が増
幅器の動作電圧よりも低くなければならないの
で、バイアス電圧の設定可能な範囲は制限され
る。 On the other hand, since a double-sided split type semiconductor device for detecting an incident position applies a bias voltage between the front and back signal electrodes, the output obtained from the signal electrodes is a combination of the signal and the bias voltage. A first method for extracting only the signal component from this output is to subtract the bias voltage component using an amplifier. At this time, since the sum of the bias voltage and the amplitude of the output signal must be lower than the operating voltage of the amplifier, the range in which the bias voltage can be set is limited.
例えばオペアンプを用いているときにバイアス
電圧は15V以下に制限され、出力信号の振幅も同
様に制限される。 For example, when using an operational amplifier, the bias voltage is limited to 15V or less, and the amplitude of the output signal is similarly limited.
第2の方法として、入射位置検出用半導体装置
の信号電極と増幅器をコンデンサ結合としてバイ
アス電圧の直流分をカツトし、信号のパルス成分
だけを抜き出す方法がある。バイアス電圧を自由
に高く設定できるという利点があるがパルスの繰
返し周期または信号強度の変動(信号の入力位置
によつても出力信号の強度は変動する)により、
取り出された信号の平均レベルが変動し、位置の
演算を行う場合の精度を損なう虞がある。位置の
精度を犠牲にしても応答速度を上げる必要がある
場合にはこの方式が適している。 As a second method, there is a method in which the signal electrode of the semiconductor device for detecting the incident position and the amplifier are coupled with a capacitor to cut out the DC component of the bias voltage and extract only the pulse component of the signal. It has the advantage of being able to freely set the bias voltage to a high value, but due to fluctuations in the pulse repetition period or signal strength (the output signal strength also fluctuates depending on the signal input position),
The average level of the extracted signal may fluctuate, which may impair the accuracy when calculating the position. This method is suitable when it is necessary to increase response speed even at the expense of positional accuracy.
以上を要約すると、位置出力の歪は両面分割型
の入射位置検出用半導体装置の方が少ないが、両
面分割型の入射位置検出用半導体装置はもれ電流
が大きくp−n接合の逆バイアスの印加方式が複
雑であると言うことになる。 To summarize the above, the distortion in the position output is smaller in the double-sided split type semiconductor device for detecting the incident position, but the semiconductor device for detecting the incident position with the double-sided split type has a large leakage current due to the reverse bias of the p-n junction. This means that the application method is complicated.
本発明は前述の問題点を解決するためになされ
たものであつて、その目的は、もれ電流が小さく
逆バイアス電圧の印加が容易でかつ位置出力の歪
の小さい粒子線等の入射位置検出用半導体装置を
提供することにある。 The present invention has been made in order to solve the above-mentioned problems, and its purpose is to detect the incident position of a particle beam, etc. with a small leakage current, easy application of a reverse bias voltage, and small distortion of the position output. An object of the present invention is to provide a semiconductor device for use in a semiconductor device.
前記目的を達成するために本発明による粒子線
等の入射位置を検出する入射位置検出用半導体装
置は、ある伝導型の半導体基板の一方の面にそれ
とは逆の伝導型の抵抗層を設け、前記抵抗層に入
射した粒子線等によつて生成された変換電流を前
記抵抗層により分割し複数の電極から取り出し粒
子線等の入射位置を検出する粒子線等の入射位置
検出用半導体装置において、前記抵抗層を4つの
円弧状の抵抗線でその抵抗線の接続点が正方形ま
たは矩形の各角に位置するように囲み前記抵抗線
の接続点から電流を取り出し、取り出した電流を
演算して粒子線等の入射位置に関する出力を得る
演算回路を有し、前記抵抗層のシート抵抗値と円
弧状の抵抗線との間に
Ri=r□/ri(i=1、……4)
ただし Riは円弧状抵抗線の線抵抗率
r□は抵抗層のシート抵抗値
riは円弧状抵抗線の曲率半径
の関係を与えて構成されている。 In order to achieve the above object, an incident position detection semiconductor device for detecting the incident position of a particle beam or the like according to the present invention includes a semiconductor substrate of a certain conductivity type and a resistive layer of the opposite conductivity type provided on one surface of the semiconductor substrate, In a semiconductor device for detecting an incident position of a particle beam, etc., in which a converted current generated by a particle beam or the like incident on the resistance layer is divided by the resistance layer and extracted from a plurality of electrodes to detect the incident position of the particle beam, etc. The resistance layer is surrounded by four arc-shaped resistance wires such that the connection points of the resistance wires are located at each corner of a square or rectangle, a current is extracted from the connection points of the resistance wires, and the extracted current is calculated to generate particles. It has an arithmetic circuit that obtains an output regarding the incident position of a wire, etc., and Ri=r□/ri (i=1,...4) between the sheet resistance value of the resistance layer and the arc-shaped resistance wire. The linear resistivity of the arc-shaped resistance wire r□ is the sheet resistance value of the resistance layer, and ri is the relationship between the radius of curvature of the arc-shaped resistance wire.
以下、図面等を参照して本発明をさらに詳しく
説明する。 Hereinafter, the present invention will be explained in more detail with reference to the drawings and the like.
第3図は本発明による装置の実施例を示す平面
図および縦断面図である。 FIG. 3 is a plan view and a longitudinal sectional view showing an embodiment of the device according to the present invention.
この実施例装置は光スポツトの位置を検出対象
とするものである。 This embodiment of the apparatus detects the position of a light spot.
半導体基板11としてn型シリコン(Si)ウエ
ーハ、比抵抗3〜5kΩcm、厚さ200μmのものを
使用する。この半導体基板11の一方の面は鏡面
研摩、他方の面はサンドブラストする。 As the semiconductor substrate 11, an n-type silicon (Si) wafer with a specific resistance of 3 to 5 kΩcm and a thickness of 200 μm is used. One surface of this semiconductor substrate 11 is mirror polished, and the other surface is sandblasted.
半導体基板11のサンドブラストしてある方の
面にリンを拡散をして、深さ30μmのn型拡散層
12を形成する。 Phosphorus is diffused onto the sandblasted surface of the semiconductor substrate 11 to form an n-type diffusion layer 12 with a depth of 30 μm.
次に、半導体基板11を熱酸化し、全面に次の
ホウ素拡散のマスクとなる厚いSiO2を成長させ
る。次に鏡面研摩側の半導体基板1上の1辺の長
さ14mmの正方形の頂点を結ぶ半径acmの弧の部分
に沿つて幅150μmの線状のSiO2をフオトリソグ
ラフイーによつて除去する。そしてこの部分にホ
ウ素を熱拡散により拡散し、弧の部分の長さの方
向の単位長さ(1cm)当りの抵抗が全工程終了後
R〔Ω/cm〕となるように調節した。この線状の
弧の部分の抵抗をボーダー抵抗部13と言うこと
にする。再び半導体基板11を酸化し、ボーダー
抵抗部13の上にSiO2を5000Å成長させる。次
にホトリソグラフイーによりボーダー抵抗13で
囲まれている領域のSiO2を孔明けする。この
時、ボーダー抵抗部13にもオーバラツプして
SiO2を取り除くようにする。オーバラツプの幅
は50μmである。 Next, the semiconductor substrate 11 is thermally oxidized to grow thick SiO 2 on the entire surface, which will serve as a mask for the next boron diffusion. Next, a linear SiO 2 film having a width of 150 μm is removed by photolithography along an arc having a radius of acm connecting the vertices of a square with a side length of 14 mm on the semiconductor substrate 1 on the mirror-polished side. Then, boron was diffused into this part by thermal diffusion, and the resistance per unit length (1 cm) in the length direction of the arc part was adjusted to be R [Ω/cm] after the completion of all steps. The resistance of this linear arc portion will be referred to as a border resistance portion 13. The semiconductor substrate 11 is oxidized again, and SiO 2 is grown to a thickness of 5000 Å on the border resistance portion 13. Next, a hole is formed in the SiO 2 in the area surrounded by the border resistor 13 by photolithography. At this time, the border resistance section 13 is also overlapped.
Try to remove SiO2 . The width of the overlap is 50 μm.
この半導体基板11を熱酸化し、孔明け部の上
にSiO2を1500Å成長させた。 This semiconductor substrate 11 was thermally oxidized, and SiO 2 was grown to a thickness of 1500 Å on the hole.
次に半導体基板の前記パターンの側に加速エネ
ルギー75keVでボロンイオンを注入した。 Next, boron ions were implanted into the pattern side of the semiconductor substrate at an acceleration energy of 75 keV.
注入後、基板をN2雰囲気中でアニールする。
アニール後のイオン注入部(前記ボーダー抵抗1
3によつて囲まれた内側部分)のシート抵抗値r
□(Ω/□)はR=r□/aとなるように調整さ
れた。 After implantation, the substrate is annealed in a N2 atmosphere.
Ion implantation part after annealing (the border resistance 1
The sheet resistance value r of the inner part surrounded by 3)
□ (Ω/□) was adjusted so that R=r□/a.
ボーダー抵抗部13によつて囲まれたイオン注
入部を受光部14と言うことにする。ボーダー抵
抗部13の四隅の頂点の部分にボーダー抵抗部1
3からはみ出さないようにして100μmφのSiO2
をフオトリソグラフイーによつて穴あけし、さら
に150μmφのAl電極15が同心円状に形成され
た。半導体基板11の裏面(パターンの無い側)
には金(Au)が蒸着され、半導体基板と合金し
て裏面の電極とした。半導体基板はダイシングに
よつてチツプとされ、5ピンセラミツクケースに
ダイボンデイングとワイヤーボンデイング接続す
る。チツプの寸法は15mm×15mmであり、ボーダー
抵抗部13の抵抗率Rは12kΩ/cm、弧の半径a
は2.5cm、受光部のシート抵抗は30kΩ/□であつ
た。 The ion implantation section surrounded by the border resistance section 13 will be referred to as a light receiving section 14. The border resistance part 1 is placed at the apex of the four corners of the border resistance part 13.
SiO 2 of 100μmφ without protruding from 3.
A hole was made using photolithography, and an Al electrode 15 with a diameter of 150 μm was formed concentrically. Back side of semiconductor substrate 11 (side without pattern)
Gold (Au) was vapor-deposited on the surface and alloyed with the semiconductor substrate to form an electrode on the back surface. The semiconductor substrate is diced into chips and connected to a 5-pin ceramic case by die bonding and wire bonding. The dimensions of the chip are 15 mm x 15 mm, the resistivity R of the border resistance part 13 is 12 kΩ/cm, and the radius of the arc is a.
was 2.5 cm, and the sheet resistance of the light receiving part was 30 kΩ/□.
第4図は以上のごとき方法で製作された素子を
使つて位置検出をする演算回路のブロツク図であ
る。 FIG. 4 is a block diagram of an arithmetic circuit for position detection using the elements manufactured by the method described above.
C1〜C4は電流−電圧変換器である。この電流
−電圧変換器入力の電位は接地電位となつてい
て、光電変換された光電流信号が流れ込み、電圧
に変換された信号V1〜V4をそれぞれ出力する。 C1 to C4 are current-voltage converters. The input potential of this current-voltage converter is set to the ground potential, and a photocurrent signal that has been photoelectrically converted flows into it, and outputs signals V 1 to V 4 that have been converted into voltages, respectively.
A1〜A5は加算器である。加算器A1には前記電
流−電圧変換器の出力V2とV3が接続されその和
の信号V2+V3が出力される。加算器A2には前記
電流−電圧変換器の出力V1とV4が接続されその
和の信号V1+V4が出力される。加算器A3には前
記電流−電圧変換器の出力V1とV2が接続されそ
の和の信号V1+V2を出力する。加算器A4には前
記電流−電圧変換器の出力V3とV4が接続されそ
の和の信号V3+V4が出力される。 A1 to A5 are adders. The outputs V2 and V3 of the current-voltage converter are connected to the adder A1 , and the sum signal V2 + V3 is output. The outputs V1 and V4 of the current-voltage converter are connected to the adder A2 , and the sum signal V1 + V4 is output. The outputs V1 and V2 of the current-voltage converter are connected to the adder A3 , and outputs the sum signal V1 + V2 . The outputs V3 and V4 of the current-voltage converter are connected to the adder A4 , and the sum signal V3 + V4 is output.
加算器A5には前記加算器A3とA4の出力が接続
されその和の信号(V1+V2+V3+V4)が出力され
ている。 The outputs of the adders A 3 and A 4 are connected to the adder A 5 , and the sum signal (V 1 +V 2 +V 3 +V 4 ) is output.
減算器S1には前記加算器A1とA2の出力が接続
され、(V2+V3)−(V1+V4)を出力している。同
様に減算器S2には前記加算器A3とA4の出力が接
続され、(V1+V2)−(V3+V4)を出力している。 The outputs of the adders A 1 and A 2 are connected to the subtracter S 1 and outputs (V 2 +V 3 )−(V 1 +V 4 ). Similarly, the outputs of the adders A 3 and A 4 are connected to the subtracter S 2 and outputs (V 1 +V 2 )−(V 3 +V 4 ).
除算器D1は前記減算器S1と加算器A5の出力か
ら、入射点のX座標に対応する下記のX信号出力
を送出する。 The divider D 1 sends out the following X signal output corresponding to the X coordinate of the incident point from the outputs of the subtracter S 1 and adder A 5 .
X=〔(V2+V3)−(V1+V4)〕/(V1
+V2+V3+V4)
除算器D2は前記減算器S2と加算器A5の出力か
ら、入射点のY座標に対応する下記のY信号出力
を送出する。 X = [(V 2 + V 3 ) - (V 1 + V 4 )]/(V 1 + V 2 + V 3 + V 4 ) The divider D 2 calculates the input point from the outputs of the subtracter S 2 and adder A 5 . Sends the following Y signal output corresponding to the Y coordinate.
Y=〔(V1+V2)−(V3+V4)〕/(V1
+V2+V3+V4)
前記装置の素子面上受光部14の中央10mm×10
mm内を一定ピツチで光スポツトを照射させながら
移動し、前述した第4図の構成の回路を用いて位
置演算をさせた結果を第5図に示す。 Y = [(V 1 + V 2 ) - (V 3 + V 4 )]/(V 1 + V 2 + V 3 + V 4 ) Center 10 mm x 10 of the light receiving section 14 on the element surface of the device
FIG. 5 shows the results of position calculation using the circuit configured as shown in FIG. 4 described above while moving within mm while irradiating a light spot at a constant pitch.
第5図から明らかなように位置演算出力のピツ
チはほぼ一定で、直線の歪も小さい。 As is clear from FIG. 5, the pitch of the position calculation output is almost constant, and the distortion of the straight line is small.
同一の基板の厚み方向構造を持つ従来の表面分
割型の入射位置検出用半導体装置と比べて、位置
出力特性が改善されていることは明らかである。 It is clear that the position output characteristics are improved compared to conventional surface-divided semiconductor devices for detecting incident positions that have the same structure in the thickness direction of the substrate.
次に本発明により、表面分割型の入射位置検出
用半導体装置の位置出力特性が改善される理由を
説明する。 Next, the reason why the present invention improves the position output characteristics of the surface-divided type semiconductor device for detecting the incident position will be explained.
第6図に示すように無限大の長さに延びた2つ
の平行な電極の間に均一な抵抗層63が形成され
ている場合を想定して、図のようにx座標軸を取
る。 Assuming that a uniform resistance layer 63 is formed between two parallel electrodes extending to an infinite length as shown in FIG. 6, the x-coordinate axis is taken as shown in the figure.
電極61と電極62を接地する。x=x1の点に
電流源Iが接続されれば電極61と62に流入す
る電極I1とI2とx1との関係は
x1=(I2−I1)/(I2+I1)
となる。 Electrode 61 and electrode 62 are grounded. If the current source I is connected to the point x = x 1 , the relationship between the electrodes I 1 , I 2 and x 1 flowing into the electrodes 61 and 62 is x 1 = (I 2 - I 1 ) / (I 2 + I 1 ).
したがつて、このような状態の電極を作れば、
位置の直線性は最良となり、位置誤差は零となる
はずである。 Therefore, if we create an electrode in this state,
The linearity of the position should be the best and the position error should be zero.
ところで第7図のように均一で無限の広さの抵
抗層72の中に半径a(cm)の孔があいていて、
円周に沿つて線抵抗71が付けられているとす
る。線抵抗71の抵抗率をR(Ω/cm)とし、抵
抗層72のシート抵抗をr(Ω/□)とする。円
の中心Oを通るようにx軸を取り、−x軸から角
度θを取る。均一な電流J(A/cm)がx方向に
流れていてその電流が円形の孔によつて乱されな
いとするとθ=0からθ=θ1の間の線抵抗には
Ja sinθの電流が流れ込む。 By the way, as shown in FIG. 7, there is a hole with a radius of a (cm) in the uniform and infinitely wide resistance layer 72.
It is assumed that a wire resistance 71 is attached along the circumference. Let the resistivity of the wire resistance 71 be R (Ω/cm), and the sheet resistance of the resistance layer 72 be r (Ω/□). Take the x-axis so that it passes through the center O of the circle, and take the angle θ from the -x-axis. If a uniform current J (A/cm) is flowing in the x direction and is not disturbed by the circular hole, then the line resistance between θ=0 and θ= θ1 is
A current of Ja sinθ flows into the current.
この電流がθ=θ1とθ=θ1+dθの間の線
抵抗に起こす電位降下はJa sinθ・R・adθであ
る。またdθの円周のxと直角方向の投影をdx
とし、その電位降下をdVxとするとdx=a sin
θdθだからdVx=Ja sinθ・r・dθとなる。 The potential drop that this current causes in the line resistance between θ=θ 1 and θ=θ 1 +dθ is Ja sinθ·R·adθ. Also, the projection of the circumference of dθ in the direction perpendicular to x is dx
If the potential drop is dVx, then dx=a sin
Since θdθ, dVx=Ja sinθ・r・dθ.
線抵抗71上の電位降下と抵抗層上の電位降下
が、電流が乱されていないという仮定を満足する
ためには
Ja sinθ・aR・dθ=Ja sinθ・r・dθ
∴ R=r/a
が導き出される。 In order for the potential drop on the wire resistance 71 and the potential drop on the resistance layer to satisfy the assumption that the current is not disturbed, Ja sinθ・aR・dθ=Ja sinθ・r・dθ ∴ R=r/a be led out.
さて第8図のように一辺の長さl1とl2の長方形
の頂点を通る半径a12,a23,a34,a1
4の円弧によつて囲まれた抵抗層85があり、円
弧に沿つて線抵抗率R12,R23,R34,R
14の線抵抗が付けられているとする。 Now, as shown in Figure 8, the radii a12, a23, a34, a1 passing through the vertices of a rectangle with side lengths l 1 and l 2
There is a resistance layer 85 surrounded by an arc of 4, and the line resistivities R12, R23, R34, R
Assume that a wire resistance of 14 is attached.
抵抗層のシート抵抗をr(Ω/□)とすると、
R12=r/a12
R23=r/a23
R34=r/a34
R14=r/a14
となつている。電極とを接続し、接地して、
電極とを接続して接地する。これを第6図と
比べると、第7図のような関係から第8図と第6
図は等価であると考えられる。 Letting the sheet resistance of the resistance layer be r (Ω/□), R 12 = r/a 12 R 23 = r/a 23 R 34 = r/a 34 R 14 = r/a 14 . Connect the electrode and ground it.
Connect to the electrode and ground. Comparing this with Figure 6, we can see that Figure 8 and 6
The figures are considered equivalent.
このようにして、第8図のような電極構造を使
うことによつて位置誤差のない位置出力が得られ
ることになる。 In this way, by using the electrode structure as shown in FIG. 8, a position output without any position error can be obtained.
本発明による装置は以上のように構成され動作
するものであるから、以下の効果がある。 Since the apparatus according to the present invention is configured and operates as described above, it has the following effects.
両面分割型の入射位置検出用半導体装置は基板
の結晶欠陥のゲツタリングが困難であり暗電流が
大きかつたのに対し、本発明の装置は、基板の厚
さ方向の構造が表面分割型位置検出器と同一であ
るため、暗電流も同一接合面を持つ表面分割型検
出器と同程度となつた。 Whereas a double-sided split type semiconductor device for incident position detection has difficulty in gettering crystal defects in the substrate and has a large dark current, the device of the present invention has a structure in the thickness direction of the substrate that allows for surface split type position detection. Since the detector is the same as the detector, the dark current is also comparable to that of a split-surface detector with the same bonding surface.
さらに、信号の情報量として、表面分割型位置
検出器では光電流をX演算用、Y演算用に分けて
使用していたのに対し、本発明の装置では、X演
算、Y演算共に、全光電流を用いて演算されるた
め表面分割型位置検出器に比べS/Nの点で有利
である。 Furthermore, as for the information amount of the signal, whereas the surface-divided position detector uses photocurrent separately for X calculation and Y calculation, in the device of the present invention, both X calculation and Y calculation Since the calculation is performed using photocurrent, it is advantageous in terms of S/N compared to a surface-divided position detector.
また、両面分割型位置検出器と比べ、裏面に抵
抗層を形成しないため全工程一面のみに半導体プ
レーナプロセスを用いて製作できるため量産性お
よび歩留りが良い。 In addition, compared to double-sided split type position detectors, since no resistance layer is formed on the back surface, the semiconductor planar process can be used for only one surface of the entire process, resulting in better mass productivity and yield.
第1図は従来の入射位置検出用半導体装置の構
成を説明するための概略図である。第2図は入射
位置検出用半導体装置の位置出力特性を示すグラ
フであつて同図Aは表面分割型の入射位置検出用
半導体装置の位置出力特性、同図Bは両面分割型
の入射位置検出用半導体装置の位置出力特性を示
している。第3図は本発明による粒子線等の入射
位置検出用半導体装置の実施例装置を示す平面図
および縦断面図である。第4図は前記実施例装置
の出力を演算する回路の実施例を示す回路図であ
る。第5図は前記実施例装置の出力特性を示すグ
ラフである。第6図、第7図および第8図は本発
明の原理を説明するための説明図である。
11……半導体基板、12……n+拡散層、1
3……ボーダー抵抗部、14……受光部、15…
…アルミニユーム電極、16……反射防止用酸化
珪素(SiO2)層、17……酸化珪素(SiO2)層、
C1〜C4……電流−電圧変換器、A1〜A5…加算
器、S1,S2……減算器、D1,D2……除算器。
FIG. 1 is a schematic diagram for explaining the configuration of a conventional semiconductor device for detecting an incident position. Figure 2 is a graph showing the position output characteristics of the semiconductor device for detecting the incident position, in which figure A is the position output characteristic of the semiconductor device for detecting the incident position of the surface split type, and figure B is the graph of the position output characteristic of the semiconductor device for detecting the incident position of the double-sided split type. 2 shows the position output characteristics of a semiconductor device. FIG. 3 is a plan view and a longitudinal sectional view showing an embodiment of a semiconductor device for detecting the incident position of a particle beam or the like according to the present invention. FIG. 4 is a circuit diagram showing an embodiment of a circuit for calculating the output of the embodiment device. FIG. 5 is a graph showing the output characteristics of the device of the embodiment. FIG. 6, FIG. 7, and FIG. 8 are explanatory diagrams for explaining the principle of the present invention. 11...Semiconductor substrate, 12...n+ diffusion layer, 1
3... Border resistance section, 14... Light receiving section, 15...
...Aluminum electrode, 16...Silicon oxide ( SiO2 ) layer for antireflection, 17...Silicon oxide ( SiO2 ) layer,
C 1 to C 4 ... Current-voltage converter, A 1 to A 5 ... Adder, S 1 , S 2 ... Subtractor, D 1 , D 2 ... Divider.
Claims (1)
は逆の伝導型の抵抗層を設け、前記抵抗層に入射
した粒子線等によつて生成された変換電流を前記
抵抗層により分割し複数の電極から取り出し粒子
線等の入射位置を検出する粒子線等の入射位置検
出用半導体装置において、前記抵抗層を4つの円
弧状の抵抗線でその抵抗線の接続点が正方形また
は矩形の各角に位置するように囲み、前記抵抗線
の接続点から電流を取り出し、取り出した電流を
演算して粒子線等の入射位置に関する出力を得る
演算回路を有し、前記抵抗層シート抵抗値と円弧
状の抵抗線との間に以下の関係を与えて構成した
ことを特徴とする粒子線等の入射位置検出用半導
体装置。 記 Ri=r□/ri(i=1、……4) ただし Riは円弧状抵抗線の線抵抗率 r□は抵抗層のシート抵抗値 riは円弧状抵抗線の曲率半径 以上 2 前記半導体基板はn型である特許請求の範囲
第1項記載の粒子線等の入射位置検出用半導体装
置。 3 前記粒子線等の入射位置検出用半導体装置は
プレーナ工程で製造された特許請求の範囲第1項
記載の粒子線等の入射位置検出用半導体装置。 4 前記演算回路は粒子線の入射位置を前記接続
点の対角線の交点を原点とする座標の点のデータ
として出力する特許請求の範囲第1項記載の粒子
線等の入射位置検出用半導体装置。[Claims] 1. A semiconductor substrate of a certain conductivity type is provided with a resistance layer of an opposite conductivity type on one side, and a converted current generated by a particle beam or the like incident on the resistance layer is transferred to the resistance layer. In a semiconductor device for detecting the incident position of a particle beam, etc., which is divided into layers and taken out from a plurality of electrodes to detect the incident position of the particle beam, the resistance layer is formed of four arc-shaped resistance wires, and the connection points of the resistance wires are square. Alternatively, the resistive layer sheet has an arithmetic circuit arranged so as to be located at each corner of a rectangle, extracts a current from the connection point of the resistance wire, calculates the extracted current, and obtains an output regarding the incident position of the particle beam, etc. 1. A semiconductor device for detecting an incident position of a particle beam, etc., characterized in that it is constructed by giving the following relationship between a resistance value and an arcuate resistance wire. Ri=r□/ri (i=1,...4) where Ri is the linear resistivity of the arc-shaped resistance wire r□ is the sheet resistance value of the resistance layer ri is the radius of curvature of the arc-shaped resistance wire More than 2 The semiconductor substrate The semiconductor device for detecting the incident position of a particle beam or the like according to claim 1, wherein is of n-type. 3. The semiconductor device for detecting the incident position of particle beams, etc. according to claim 1, wherein the semiconductor device for detecting the incident position of particle beams, etc. is manufactured by a planar process. 4. A semiconductor device for detecting an incident position of a particle beam or the like according to claim 1, wherein the arithmetic circuit outputs the incident position of the particle beam as data of a coordinate point whose origin is the intersection of diagonals of the connection point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57167079A JPS5956774A (en) | 1982-09-24 | 1982-09-24 | Semiconductor device for detecting the incident position of particle beams, etc. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57167079A JPS5956774A (en) | 1982-09-24 | 1982-09-24 | Semiconductor device for detecting the incident position of particle beams, etc. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5956774A JPS5956774A (en) | 1984-04-02 |
| JPS6262075B2 true JPS6262075B2 (en) | 1987-12-24 |
Family
ID=15843008
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57167079A Granted JPS5956774A (en) | 1982-09-24 | 1982-09-24 | Semiconductor device for detecting the incident position of particle beams, etc. |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5956774A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010064693A1 (en) | 2008-12-03 | 2010-06-10 | 国立大学法人東北大学 | Semiconductor detector for two-dimensionally detecting radiation position and two-dimensional radiation position detection method using same |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61153552A (en) * | 1984-12-26 | 1986-07-12 | Nec Corp | Automatic x-ray diffraction device |
| JP4748567B2 (en) * | 2005-02-25 | 2011-08-17 | 株式会社東芝 | Radiation incident position detector |
| JP2007071823A (en) | 2005-09-09 | 2007-03-22 | Sharp Corp | Light receiving element and sensor and electronic device including the same |
| NL2003125A1 (en) * | 2008-08-05 | 2010-02-08 | Asml Netherlands Bv | Optical position sensor, a position sensitive detector, a lithographic apparatus and a method for determining an absolute position or a movable object to be used in a relative position measurement system. |
| JP2024154718A (en) * | 2023-04-19 | 2024-10-31 | 浜松ホトニクス株式会社 | Semiconductor optical position detector and semiconductor optical position detector array |
-
1982
- 1982-09-24 JP JP57167079A patent/JPS5956774A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010064693A1 (en) | 2008-12-03 | 2010-06-10 | 国立大学法人東北大学 | Semiconductor detector for two-dimensionally detecting radiation position and two-dimensional radiation position detection method using same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5956774A (en) | 1984-04-02 |
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