JPS6313342B2 - - Google Patents
Info
- Publication number
- JPS6313342B2 JPS6313342B2 JP56101883A JP10188381A JPS6313342B2 JP S6313342 B2 JPS6313342 B2 JP S6313342B2 JP 56101883 A JP56101883 A JP 56101883A JP 10188381 A JP10188381 A JP 10188381A JP S6313342 B2 JPS6313342 B2 JP S6313342B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- film
- silicon
- semiconductor substrate
- oxide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
Landscapes
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の製造方法に係り、特にシ
リコン半導体基板表面に厚い酸化膜よりなる絶縁
膜を形成する方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an insulating film made of a thick oxide film on the surface of a silicon semiconductor substrate.
第1図に半導体装置の一例としてバイポーラト
ランジスタの断面図を示す。1はP型Si半導体基
板、2はN型のエピタキシヤル層でコレクタ領
域、3はP型のベース領域、4はN型のエミツタ
領域である。5は4000Å程度の厚い酸化膜
(SiO2)5で、それに電極窓を開けて各領域への
電極6,7,8を設けている。 FIG. 1 shows a cross-sectional view of a bipolar transistor as an example of a semiconductor device. 1 is a P-type Si semiconductor substrate, 2 is an N-type epitaxial layer and a collector region, 3 is a P-type base region, and 4 is an N-type emitter region. Reference numeral 5 denotes a thick oxide film (SiO 2 ) 5 of about 4000 Å, on which electrode windows are opened and electrodes 6, 7, and 8 are provided to each region.
ところで上記酸化膜5は、その上に形成される
Al等の配線と基板とを絶縁するもので、十分な
耐圧と膜厚を有する必要がある。そこで従来は耐
圧を大とするためよりち密な酸化膜5として基板
(第1図ではエピタキシヤル層2)表面を熱酸化
して得られた酸化膜を利用していた。しかしなが
ら膜厚が大きいため高温(例えば1100℃)の酸化
雰囲気中に20分と長時間さらしておく必要があ
り、そのような工程はSiウエハーのそりや拡散領
域の変化及びウエハー内のスリツトラインの形成
等の幣害があり好ましい方法ではなかつた。 By the way, the oxide film 5 is formed thereon.
It insulates wiring such as Al from the substrate, and must have sufficient withstand voltage and film thickness. Therefore, conventionally, in order to increase the breakdown voltage, an oxide film obtained by thermally oxidizing the surface of the substrate (epitaxial layer 2 in FIG. 1) has been used as the denser oxide film 5. However, due to the large thickness of the film, it is necessary to expose it to an oxidizing atmosphere at a high temperature (for example, 1100°C) for a long time of 20 minutes, and such a process may cause warping of the Si wafer, changes in the diffusion region, and the formation of slit lines within the wafer. This was not a desirable method as it caused financial damage.
また一方でスピンオングラスと称される溶剤を
含むシリコンの水酸化物を塗布して、それを熱分
解させて酸化膜とする技術がある。しかしながら
4000〜6000Åと厚く塗布すると膜厚が均一でなく
なり不適であつた。 On the other hand, there is a technique called spin-on glass in which silicon hydroxide containing a solvent is applied and thermally decomposed to form an oxide film. however
When applied as thick as 4,000 to 6,000 Å, the film thickness became uneven and was unsuitable.
本発明の目的は高温長時間の熱酸化を行なうこ
となく、絶縁膜を形成することにある。 An object of the present invention is to form an insulating film without performing thermal oxidation at high temperatures and for a long time.
本発明の半導体装置の製造方法は、シリコン半
導体基板表面にシリコンの水酸化物を含有する溶
液よりなる第1の絶縁膜を所定の膜厚に塗布する
工程と、該シリコン半導体基板表面を熱酸化して
該第1の絶縁膜の下に酸化シリコンよりなる第2
の絶縁膜を形成する工程とを有することを特徴と
する。 The method for manufacturing a semiconductor device of the present invention includes the steps of applying a first insulating film made of a solution containing silicon hydroxide to a predetermined thickness on the surface of a silicon semiconductor substrate, and thermally oxidizing the surface of the silicon semiconductor substrate. Then, a second insulating film made of silicon oxide is formed under the first insulating film.
The method is characterized by comprising a step of forming an insulating film.
以下本発明の一実施例を図面に従つて詳述す
る。 An embodiment of the present invention will be described in detail below with reference to the drawings.
第2図は本実施例を説明する断面図である。 FIG. 2 is a sectional view illustrating this embodiment.
第2図a参照
Si半導体基板1(第1図の例ではエピタキシヤ
ル層2)上にシリコンの水酸化物(Si(OH)4)と
溶剤のエタノールとを混合した第1の絶縁膜10
を、膜厚2500Å程度に塗布する。膜厚がさほど大
きくないので膜厚は均一に形成される。Refer to FIG. 2a. A first insulating film 10 made of a mixture of silicon hydroxide (Si(OH) 4 ) and solvent ethanol is formed on a Si semiconductor substrate 1 (epitaxial layer 2 in the example of FIG. 1).
is applied to a film thickness of approximately 2500 Å. Since the film thickness is not so large, the film thickness is uniform.
第2図b参照
1000℃程度の高温酸化雰囲気中に10分程度さら
して基板1の表面を酸化して、第2の絶縁膜11
として膜厚2000Å程度の酸化膜11を形成する。
この時同時に第1の絶縁膜は熱分解してSiOx膜
となりさらに2000Å程度に収縮してち密化する。Refer to Figure 2b. The surface of the substrate 1 is oxidized by exposing it to a high temperature oxidizing atmosphere of about 1000°C for about 10 minutes, and the second insulating film 11 is formed.
Then, an oxide film 11 having a thickness of about 2000 Å is formed.
At the same time, the first insulating film is thermally decomposed to become a SiOx film, further shrinking to about 2000 Å and becoming denser.
以上のように本実施例によれば高温熱酸化を長
時間行なう必要がなく、また第1の絶縁膜10の
塗布工程において十分均一に塗布することがで
き、両絶縁膜10,11を合せて、必要な膜厚
(4000Å)の酸化膜を得ることができる。さらに
両絶縁膜のエツチングレートもほぼ同じになるた
め、後の電極窓のエツチング工程も従来と何ら異
ならしめる必要がない。 As described above, according to this embodiment, there is no need to perform high-temperature thermal oxidation for a long time, and the first insulating film 10 can be coated sufficiently uniformly in the coating process, and both insulating films 10 and 11 can be coated together. , an oxide film with the required thickness (4000 Å) can be obtained. Furthermore, since the etching rates of both insulating films are almost the same, there is no need to make any difference in the subsequent etching process of the electrode window from that of the conventional method.
以上説明したように本発明によれば高温長時間
の熱酸化工程が必要のため、半導体装置としての
特性の劣化等がなく厚い高耐圧の酸化膜を形成す
ることができる。 As explained above, according to the present invention, since a thermal oxidation process at high temperature and for a long time is required, a thick oxide film with high breakdown voltage can be formed without deterioration of the characteristics of the semiconductor device.
第1図は一般的なバイポーラトランジスタの断
面図、第2図は本発明の一実施例を説明するため
の断面図である。
図中、1はシリコン半導体基板、10は第1の
絶縁膜、11は第2の絶縁膜である。
FIG. 1 is a sectional view of a general bipolar transistor, and FIG. 2 is a sectional view for explaining one embodiment of the present invention. In the figure, 1 is a silicon semiconductor substrate, 10 is a first insulating film, and 11 is a second insulating film.
Claims (1)
物を含有する溶液よりなる第1の絶縁膜を所定の
膜厚に塗布する工程と、該シリコン半導体基板表
面を熱酸化して該第1の絶縁膜の下に酸化シリコ
ンよりなる第2の絶縁膜を形成する工程とを有す
ることを特徴とする半導体装置の製造方法。1. Applying a first insulating film made of a solution containing silicon hydroxide to a predetermined thickness on the surface of a silicon semiconductor substrate, and thermally oxidizing the surface of the silicon semiconductor substrate to form the first insulating film. 1. A method of manufacturing a semiconductor device, comprising the step of forming a second insulating film made of silicon oxide underneath.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56101883A JPS583235A (en) | 1981-06-30 | 1981-06-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56101883A JPS583235A (en) | 1981-06-30 | 1981-06-30 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS583235A JPS583235A (en) | 1983-01-10 |
| JPS6313342B2 true JPS6313342B2 (en) | 1988-03-25 |
Family
ID=14312331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56101883A Granted JPS583235A (en) | 1981-06-30 | 1981-06-30 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS583235A (en) |
-
1981
- 1981-06-30 JP JP56101883A patent/JPS583235A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS583235A (en) | 1983-01-10 |
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