JPS6318408B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention introduces a protective relay, particularly a plurality of relay inputs corresponding to the amount of electricity from the power system, and performs digital calculation by comparing the instantaneous value of the input amount of electricity with a set value. The present invention relates to protective relays that perform the following functions.

With the advancement of digital technology, the application of digital processing devices such as minicomputers and microcomputers to protective relays is being studied and put into practical use.

In the case of a digital distance relay, protection calculation is generally performed by calculation processing using a plurality of pieces of discrete data sampled at regular intervals. In order to perform such arithmetic processing, it is necessary to use a digital arithmetic processing device capable of high-speed processing, and the device becomes large and expensive.

On the other hand, in the case of a single-input relay such as an overcurrent relay, relay determination can be made simply by determining the magnitude of the instantaneous value of the input data, so a digital arithmetic processing device with low processing capacity is required. can be used, and a small and inexpensive configuration is possible. FIG. 1 shows an example of the configuration of a digital protective relay using a digital arithmetic processing device with low processing capacity.

In FIG. 1, N relay inputs I _{1 -IN} are introduced into a selection circuit 1 via full-wave rectifier circuits C _{1 -CN} . A selection signal S ₁ is issued from the arithmetic processing unit 2 to sequentially select and output the n relay inputs I ₁ to I _N in series. The setting section 3 outputs a setting value signal _S2 . Here, the power supply V _CC and 0V are in the setting section 3.
M series-connected resistors that divide the voltage R ₁
~M connected to each connection between R _M and the resistor
- one terminal T ₁ to _{T M-1} , from which a set value signal S ₂ is derived via a set value switch SW ₁ ; The comparator circuit 4 receives the output S ₃ from the selection circuit 1 and the set value signal S ₂ and compares their magnitudes, so that S ₃ >
When _S2 , a comparison signal _S4 which becomes "1" is output.
Further, the arithmetic processing section 2 introduces the selection signal _S1 into the selection circuit 1 and selects one of the N relay inputs _I1 to _IN according to a built-in arithmetic program. The magnitude of the selected relay input is then compared with the set value signal _S2 in the comparison circuit 4, and a comparison signal _S4 is derived. Therefore, the arithmetic processing section 2 receives the comparison signal _S4 and determines the magnitude of the selected relay input. Further, the selection signal S ₁ is derived to sequentially select the N relay inputs I ₁ to I _N , and the arithmetic processing unit 2 determines the magnitude of the N relay inputs I ₁ to I _N in time series. Execute.

Here, the magnitude of the relay input in the arithmetic processing unit 2 is determined using the magnitude of the instantaneous value of the relay input. Therefore, when determining relay operation, in order to prevent the influence of noise during relay input, consideration is given to determining relay operation when a determination result that becomes a relay input setting value signal has been derived a predetermined number of times in succession. There is. FIG. 2 shows a conventional processing method in which the above calculation processing method is used and the number of consecutive operations is set to two.

FIG. 2 shows the arithmetic processing _A1 for the relay input _I1 . In this case, first, in the selection circuit 1, a selection signal S ₁ is applied to select the relay input I ₁ .
is derived. A comparison signal S ₄ is then derived to determine the comparison result between the relay input I ₁ and the set value signal S ₂ . Then, this comparison signal _S4 is judged as “0”
In this case, a register (not shown) in the arithmetic processing section 2 is cleared.

This register is for counting the number of consecutive operations. Next, it is determined whether the operational output is in a time-limited return. This time-limited return operation is necessary to make the operational output continuous, and usually has a time-limited return time of about 3/2 cycles, and is generally performed by counting the registers in the arithmetic processing section 2. As a result of the determination as to whether or not the time-limited return is in progress, if the time-limited return is not in progress, an inoperable output is derived, and the process moves to the next arithmetic processing _A2 of the relay input _I2 .
On the other hand, when the time-limited return is in progress, a countdown of the time-limited return time is executed to derive the operational output.

On the other hand, when the comparison signal _S4 is determined and is "1",
Since S ₃ > S ₂ , the register is counted up. When the result of determining the value of this register is 1 (when the register count is 1), it is treated as if relay input I ₁ < setting value signal, and it is used to determine whether or not the time-limited return is in progress. Move. Further, when the value of the register is 2 (when the number of counts of the register is 2), it is determined that the relay input _I1 is a set value signal, a time limit return time is set, and an operation output is derived. Thereafter, the process moves to the calculation process _A2 for the next relay input _I2 . Thereafter, the calculation processes A ₂ to _{A N} of the relays I ₂ to I _N are sequentially performed in the same manner.
When the arithmetic processing A _N of the relay input I _N is completed, the process returns to the arithmetic processing A ₁ of the relay input I ₁ again.

In this way, in conventional calculation processing methods, relay input
Although this is a method of continuously repeating the determination processing of I ₁ to I _N , the repetition time interval is determined from the determination processing time of each relay input. Moreover, in this case,
Since the judgment process for each relay input I ₁ - I _N is not synchronized with the input, the judgment phase for each relay input I ₁ - I _N differs for each judgment process, and therefore the judgment process for each relay input I ₁ - _{I N} The size determination ends up being different for each treatment process.

These states will be explained below with reference to FIG.
Figure 3 shows the case of determining the relay input I _1. Figure a shows the case where the magnitude of the input is the minimum and the determination phase is such that the operation can be determined, and similarly, Figure b shows the case where the input is the maximum. The case of a judgment phase in which the operation is judged based on the magnitude of is shown.

In FIG. 3a, the determination process for the relay input I ₁ is performed at every time interval T, and at times t ₀ ,
This is done at time t ₁ and t ₂ . As is clear from the figure, the relay input I ₁ becomes larger than the set value signal S ₂ between times t ₁ and t ₂ , and its peak value becomes L ₁ .
In the determination process at time t ₁ , I ₁ >S ₂ , but since the number of continuous operations is one, no relay output is derived, and the output as a result of the determination process at time t ₂ is derived. Therefore, when the peak value L is less than ₁ , it is inoperative. On the other hand, in FIG. 3b, the determination process for relay input I ₁ is once performed at time t ₃ , and immediately after that, at time t ₄ , relay input I ₁ becomes larger than the set value signal S ₂ , and at t ₃ Until time t ₅ of +2T, it becomes larger than the set value signal S ₂ and the peak value is the magnitude of L ₂ . Therefore, in the case of an input having a magnitude greater than this peak value, the operating output is unconditionally derived.

As explained above with reference to FIGS. 3a and 3b, the peak values of the relay inputs I ₁ to I _N are L ₁ and L _{2 .}
If it is between, it may be activated or not activated depending on the determination phase. Such an input range is called a dead zone, and if the dead zone is wide, the variation in operating values will increase, which is unfavorable in terms of relay characteristics. The conventional calculation method explained in FIG. 2 has a drawback that the dead zone becomes wide. Furthermore, as can be seen from Figure 3a and b, the operating time is at least T hours after the relay input _I1 reaches the magnitude of the set value signal _S2 , and depending on the judgment phase, the operating time is T~2T. Requires.

The present invention was made with the aim of solving the above problems, and uses a digital arithmetic processing device to perform relay judgment based on the magnitude of the instantaneous value of the relay input, and after confirming the continuous operation multiple times, the operation output is determined. It is an object of the present invention to provide a protective relay using an arithmetic processing method that can narrow the dead band of operating values and speed up the operating time.

Examples will be described below with reference to the drawings. Fourth
1 is a flowchart of the present invention in the arithmetic processing section ₂ having the configuration shown in _FIG . FIG. 12 is a diagram showing the relationship, in which figure a shows the case of a judgment phase in which the operation can be determined based on the minimum input magnitude, and figure b shows the case in which the judgment phase allows the operation to be determined based on the maximum input magnitude. It can be done. FIG. 6 is a circuit configuration diagram of another embodiment to which the present invention is applied, and FIG. 7 is a flowchart of another embodiment of the arithmetic processing method according to the present invention.

In the flowchart of the embodiment shown in FIG. 4, the selection signal S ₁ from the arithmetic processing unit 2 is generated to select the relay input I ₁ , and this is compared with the set value signal S ₂ to generate a comparison signal.
Deriving S ₄ and further determining the comparison signal S ₄ in the arithmetic processing unit 2, and when the result of the determination of the comparison signal S ₄ is "0" (the relay input I ₁ is higher than the set value signal S ₂ is also small), the register is cleared, but on the other hand, when the judgment result is "1" (relay input I ₁
is larger than the set value signal), the register counts up, which is exactly the same as in the conventional example shown in FIG. The difference between the arithmetic processing method shown in FIG. 4 and the conventional example shown in FIG. 2 is the processing method when the number of consecutive operations is determined to be one.

That is, as is clear from FIG. 4, when the register value is judged once due to the register count up (although if it is twice, the operation output is derived without any problem), the input processing of the comparison signal _S4 is performed. An operation is performed to return it to . Therefore, even if the relay input is a value that should be activated, even if the relay is operated only once, the number of consecutive operations becomes two, and the operation output can be derived. The number of steps due to calculation processing at this time is 11
It is a step.

On the other hand, in the arithmetic processing method shown in Figure 2, considering only one process of relay input, in order to derive the operating output from the non-operating output state, 7 steps are required when the number of operations is 1. 7 steps are required even when the operation is performed for the second time. Therefore, according to the present invention, even if we consider the longest calculation processing time in which all relay inputs operate simultaneously, it is possible to perform operation output processing based on two consecutive operation determinations in about 1.5 times the processing time of the conventional method. .

Note that each of the above calculation processes can normally be executed by simple calculation processing within the calculation processing section 2, so the relationship between the number of calculation steps and the execution time can be considered as described above.

Next, relay input determination according to the present invention will be explained with reference to FIG. That is, Fig. 5a shows the relay input I ₁
This is a case where the determination process is performed at time _t6 , and at this time, the relay input _I1 reaches the peak value (crest value _L3 ). In the present invention, as explained with reference to the flowchart shown in Figure 4, when the relay input setting value signal is determined in determining the magnitude of the relay input, the magnitude determination is immediately repeated for the same input. Since the operating output is derived based on the relay input setting value signal S ₂ , the operating output is derived within a very short time. Therefore, in Fig. 5a, the peak value _L3 of the relay input _I1 is approximately equal to the set value signal _S2.
It can be seen that the size is the same as that of

FIG. 5b shows a case where the relay input _{I 1} becomes larger than the set value signal S ₂ at time t ₈ immediately after the relay input I 1 is determined at time t ₇ . In this case, considering the case where the other relay inputs I ₂ to I _N are all in the operating state and the processing time is the best, the next determination process for the relay input I ₁ is (at time t ₇ , the setting value signal S ₂ ) is performed at time t ₉ which is approximately t ₇ +1.5T. Furthermore, until the time _t9 , the relay input _I1 is larger than the set value signal _S2 and the peak value is _L4 .

As is clear from the above explanation, according to the arithmetic processing method used in the present invention, the size of the dead zone is such that the peak values of the relay inputs I ₁ to I _N are between L ₃ and L ₄ . This can be seen as a case. However, the magnitude of the peak value L ₃ is almost the set value signal S ₂
Since it is equal to , it can be considered that it is substantially between the set value signal S ₂ and the peak value L ₄ . This is because if the relay input I ₁ is larger than the set value signal S ₂ even for a short period of time (this includes cases where they are equal as is clear from the above explanation), the size judgment will be made again for the same relay input. This is because the operation output is derived by the operation.

They will therefore be explained numerically below. In addition, in the arithmetic processing section 2, in order to suppress the size judgment error of the relay inputs I ₁ to I _N and derive the operation output at high speed, the arithmetic processing of all inputs is usually completed in about 1/10 of the relay input cycle. It's becoming like that.

Therefore, the time interval T of the judgment process in the conventional arithmetic processing method as shown in Figure 2 is set to 1ms (50Hz system).
Then, the relationship between the peak values L ₁ and L ₂ and the setting value signal S ₂ is as follows.

Regarding L ₁ , L ₁ cos1ms/10ms×180°×1/2=S ₂ ∴L ₁ cos9°=S ₂ ∴L ₁ =S ₂ /cos9°=1.012×S ₂ .

At the same time, regarding L ₂ , L ₂ cos2ms/10ms×180°×1/2=S ₂ ∴L ₂ cos18°=S ₂ ∴L ₂ =S ₂ /cos18°=1.051×S ₂ .

Therefore, if the conventional arithmetic processing method shown in Figure 2 is used, the dead zone will be in the range of 1.012S ₂ to 1.051S ₂ , and the width of the dead zone will be about 3.9% of the magnitude of the set value signal _S2 . becomes.

Next, the size of the dead zone in the case of the arithmetic processing method used in the present invention is as follows.
That is, the magnitude relationship between the peak value L ₄ of the relay input and the setting value signal S ₂ is L ₄ cos1.5ms/10ms×180°×1/2=S ₂ ∴L ₄ cos13.5°=S ₂ ∴L ₄ = _S2 /cos13.5°= _1.028S2 , and the dead zone becomes _S2 to _1.028S2 , and the width of the dead zone is 2.8%. The peak value _L4 is the value in the calculation processing time during all input operations, and according to the calculation processing method of the present invention, the width of the dead zone is 2.8% or less.
Further, the time from when the relay input reaches the magnitude of the set value signal _S2 until the operational output is derived is almost instantaneous in the shortest case, and 1.5T in the longest case. The operating time of the relay is therefore faster than with conventional methods.

In the above explanation, the case where two consecutive operations are confirmed to derive the operation output has been described, but it is clear that the same effect can be obtained even when three or more consecutive operations are confirmed.

Furthermore, the circuit configuration to which the arithmetic processing method according to the present invention is applied is not limited to the configuration shown in Figure 1, but uses a digital arithmetic processing device to determine the magnitude of a plurality of relay inputs by determining the magnitude of instantaneous values. Of course, it can be applied to any circuit configuration that can be used.

Another circuit configuration example will be explained with reference to FIG. In the figure, symbols I ₁ , I ₂ to _{I N} , C ₁ , C ₂ to _{C N} ,
1, 2, S ₁ and S ₃ correspond to FIG. Reference numeral 5 denotes an A/D conversion circuit which converts the selection signal _S3 from the selection circuit 1 into a digital value output _S5 , and the digitized selection signal _S5 is introduced into the arithmetic processing section 2. . Reference numeral 6 denotes a digital setting section which introduces the digital setting value signal _S6 into the arithmetic processing section 2 and serves as a criterion for determining the magnitude of the digital value output _S5 . Then, from the arithmetic processing unit 2, the A/
An A/D conversion signal _S7 is derived for the D conversion circuit 5, and the relay input value A/D converted by this signal _S7 is input as a digital value output _S5 .
Further, the digital setting section 6 is configured using a digital switch or the like. Therefore, in this embodiment, the relay input is once digitized by the A/D conversion circuit 5 and compared with the digitized set value in the arithmetic processing section 2.

Next, another arithmetic processing method according to the present invention will be explained with reference to FIG. As is clear in the figure, A/
The difference is that the D conversion process is increased by one step, and that when the determination result of the register value is 1, the process returns to the output process of the A/D conversion signal _S7 . Also, before the determination processing A ₁ ′ to A _N ′ of the relay inputs I ₁ to I _N , the set value S ₆ is read. Then the relay input
The process moves on to the determination process A ₁ ′ for I ₁ . In this determination process A ₁ ′, first, a selection signal S ₁ for selecting the relay input I ₁ is output from the selection circuit 1, and then an A/D conversion signal S ₇ is output for A/D converting the relay input I ₁ . Output. The digital value signal _S5 which has been A/D converted by this signal _S7 is read in the arithmetic processing section 2, and then each digital value output _S5 is compared with the set value signal _S6 based on the digital value. The arithmetic processing in this case is exactly the same as the judgment process of the comparison signal _S4 in FIG. 4, and the only difference is that when the judgment result of the register value is 1, the process returns to the output process of the A/D conversion signal _S7 . . As is clear from the description of this embodiment, the number of processing steps is increased by one step compared to the calculation processing method shown in FIG. 4, and it is unavoidable that the calculation processing time becomes longer by this increase. Although the width of the dead zone also increases, it is clear that the width of the dead zone can be made smaller compared to the conventional method.

The explanation so far has been about the case where the operating output is derived by detecting that the relay input is greater than the set value, but it can also be applied to relays that operate when the relay input is smaller than the set value, such as undervoltage relays. It goes without saying that it can be done. In this case, in the arithmetic processing shown in _FIG .
In the arithmetic processing shown in the figures, when comparing the digital value output S ₅ and the set value S ₆ , it may be determined that S ₅ <S ₆ is an operation. The concept of dead zone is also exactly the same. Furthermore, in each of the above embodiments, a relay that makes a relay determination by comparing the magnitude of the relay input and a set value has been described, but in each of the circuit configurations shown in FIGS. 1 and 6, a full-wave rectifier circuit By adding a commonly used change detection circuit to the front stage of C ₁ to C _N , the arithmetic processing method of the present invention can be applied to a change detection relay, such as a change width overcurrent relay. It is possible.

As explained above, according to the present invention, when relay input is compared with a set value and relay judgment is made through digital arithmetic processing, once the relay input exceeds the set value, continuous operation judgment is made for the same input. Because of such arithmetic processing, it is possible to not only reduce the width of the dead zone of the operating value but also provide a reliable protective relay that operates quickly.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration of a digital protective relay to which the calculation processing method according to the present invention is applied, FIG. 2 is a conventional calculation processing method, and FIG. 3 is an explanatory diagram of relay input response in the calculation processing method shown in FIG. FIG. 5A shows a case where the determination phase is the minimum input magnitude and allows the operation to be determined, and FIG. Fourth
The figure is a flowchart applied to the arithmetic processing section having the configuration shown in Fig. 1, and Fig. 5 is an explanatory diagram of relay input response in the arithmetic processing method of Fig. 4.
shows a determination phase in which the motion can be determined with the minimum input magnitude, and FIG. FIG. 6 shows another embodiment of the circuit configuration to which the arithmetic processing method according to the present invention is applied, and FIG. 7 shows another embodiment of the arithmetic processing method according to the present invention. DESCRIPTION OF SYMBOLS 1... Selection circuit, 2... Arithmetic processing section, 3... Setting section, 4... Comparison circuit, 5... A/D conversion circuit,
6...Digital setting section.

Claims (1)

[Claims] 1. In a digital protective relay that introduces multiple relay inputs corresponding to the amount of electricity from the power system, compares the instantaneous value of the amount of electricity with a set value, and performs calculations to determine relay operation, select one of the multiple relay inputs from among the multiple relay inputs. means for selecting a relevant relay input; means for comparing the selected relay input with a set value and performing a calculation for determining the magnitude of the relay input; means for deriving the operational output of the relay corresponding to the relay input when the determination calculation repeats the operation determination a predetermined number of times; and when the determination calculation result is a non-operation determination, the plurality of relay input 1. A protective relay comprising means for moving to operation determination calculation for the next relay so as to repeat the relay operation determination for the next relay in chronological order.