JPS6350745B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a correlator that, after A/D converting an analog signal such as an image or audio, adds the degree of coincidence for all parts of correlation between this digital input signal and a pre-stored digital reference signal. It is an object of the present invention to provide a correlator that can obtain a correlation value close to the human recognition level by weighting and adding the mismatch frequency for parts where correlation is not important. FIG. 1 shows a block diagram of an example of a conventional correlator. Analog signals such as images or audio input to the terminal 1 are converted from analog to digital by the A/D converter 2. An input signal shift register 3 consisting of n bits stores the digital input signal from the A/D converter 2 in series according to a clock pulse inputted to a terminal 4, and stores n exclusive NOR circuits (hereinafter referred to as EX). - called NOR circuit) 5-1 to 5
-n are respectively supplied with this digital input signal in parallel. On the other hand, the digital reference signal that entered terminal 6 is
The clock pulse input to the terminal 8 is supplied to the reference signal shift register 7 consisting of n bits and stored in series. Reference signal shift register 7
converts this accumulated digital reference signal to EX−
It is supplied in parallel to each of the NOR circuits 5-1 to 5-n. EX-NOR circuits 5-1 to 5-n take the exclusive NOR of the corresponding bit values of the digital input signal and the digital reference signal, and if both values are the same, the result is "1". are output, and if they are different, output “0”. These EX-NOR circuits 5-
The output signals for each bit of 1 to 5-n are respectively supplied to an adder 9 and added. Therefore, the output from the adder 9 is a correlation value indicating the degree of correlation between the digital input signal and the digital reference signal. By setting the digital reference signal in the reference signal shift register 7 as digital data obtained by A/D converting an analog signal determined in advance as reference data, the adder 9 can convert the digital input signal and the digital reference signal. Outputs the correlation values one after another. As a result, the input signal is
It is determined whether the data is the same as the reference data. Furthermore, autocorrelation can also be taken by supplying the output of the input signal shift register 3 to the reference signal shift register 7 and using the delayed digital input signal as the digital reference signal. FIGS. 2A to 2F show pattern diagrams when the above correlator is applied to image pattern recognition. For simplicity, the image is a black and white binary image, 8 x 3.
Let us perform matching of the straight line image shown in FIG. 2A, which consists of (=24) pixels. The shaded areas shown in FIGS. 2A to 2F are black pixels, and the white areas are white pixels. FIG. 2A is an image representing a straight line composed of reference signals to be used as a standard. On the other hand, as digital input signals, images of various patterns shown in FIGS. 2B to 2F are supplied to the input signal shift register 3. Further, the correlation value from the adder 9 is expressed by the number of pixels in which the digital input signal and the digital reference signal match. First, when an all-white image is input as a digital input signal as shown in FIG. 2B, when this is checked for matching with the correlator, the correlation value is "16". Similarly, when the digital input signal is an all black image as shown in C of the same figure, the correlation value is 8, and the correlation value of an image where the digital input signal completely matches the digital reference signal as shown in D of the same figure is "24", the correlation value with an image where the digital input signal is a polygonal line as shown in E of the same figure is "16", and the correlation value with the image of a straight line with a shifted digital input signal as shown in F of the same figure is "18". It is. Here, the correlation value of the image in which the digital input signals are all white, shown in Figure B, and the image in which the digital input signals are like polygonal lines, shown in Figure E, are both the same "16", which is the result of human pattern recognition. This is extremely different from the above results. Furthermore, the correlation value with the almost straight line image shown in FIG.
In this way, if the pattern matching is too strict, there is a problem in that the correlator will not show an appropriate correlation value. FIG. 3 is a configuration diagram of an example of a correlator that improves the above-mentioned problems. In the figure, blocks having the same functions as those shown in FIG. 1 are designated by the same reference numerals. Here, an explanation will be given based on the example shown in FIG.
In the image shown in Figure 2A, □ white pixels (16
Regarding pixels (pixels), masking is performed in the circuit shown in FIG. 3 so that the exclusive NOR operation is stopped and the pixel is always set to "0". That is, according to the above method, the correlation value in the image shown in FIG. 2B is "0",
The correlation value for the image shown in C in the same figure is "8", the correlation value in the image shown in D in the same figure is "8", the correlation value in the image shown in E in the same figure is "4", and the correlation value is shown in F in the same figure. The correlation value in the image is "5". By doing this, compared to the correlation values obtained by the circuit shown in FIG.
The image shown in FIG. 3 obtains a correlation value that is much more linear than the image shown in FIG. In FIG. 3, mask data coming into terminal 11 is supplied to masking shift register 10 by a clock pulse coming into terminal 12, and is stored therein. The mask shift register 10 is
Each bit data of the accumulated mask data is supplied to gate circuits 13-1 to 13-n, respectively. The gate circuits 13-1 to 13-n use this mask data, for example, when this content is "0", EX-NOR
It always outputs "0" regardless of the outputs of circuits 5-1 to 5-n. By doing so, masking can be performed regardless of whether the digital input signal matches or does not match the digital reference signal. Also, with this mask data, EX
It is also possible to always set it to "1" (match) regardless of the outputs of the -NOR circuits 5-1 to 5-n. In this case, if you follow the example in Figure 2,
For the image pattern shown in Figure B, the correlation value of the image shown in Figure B is "16", the correlation value of the image shown in Figure C is "24", the correlation value of the image shown in Figure D is "24", and the correlation value of the image shown in Figure D is "24". The correlation value of the image shown in Figure E is "20", and the correlation value of the image shown in Figure F is "21", which means that "16" is always added to the output when the mask data is set to "0". The contents are the same. In this way, the conventional correlator shown in Figure 3, which has a function to stop correlating certain less important data, does not produce a straight line as shown in the images shown in Figures 2E and F. The degree of matching is increased for close input images, but as a reverse effect, the all-black image shown in Figure 2C shows a correlation that is a perfect match with the straight image pattern shown in Figure 2A, and human The disadvantage was that it was significantly different from pattern recognition. The present invention eliminates the above-mentioned drawbacks, and one embodiment thereof will be described with reference to FIG. For convenience of explanation, the embodiment of the present invention will also be described as a correlator in image pattern recognition, like the conventional example. The basic idea of the present invention is to treat masked areas differently than other masked areas. In other words, matches and mismatches in the masked parts are given smaller weighting (for example, 1/2) than matches and mismatches in other parts, and the sum of this weighting value and the number of matching pixels is used as the correlation value. It is something. FIG. 4 shows a circuit diagram of an embodiment of a correlator according to the present invention which outputs the correlation value data in analog form. The embodiment shown in Fig. 4 shows a correlator that obtains the correlation of 8 pixels, but by using three sets of this correlator, the 8 x 3 (=24) pixels shown in Fig. 2 A to F are used. Pattern matching can be obtained for images. In FIG. 4, circuit elements having the same functions as those shown in FIG. 3 are given the same numbers. The digital input signal that enters terminal 1 is supplied to shift register 3 for 8-bit input signals, and is sent to terminal 4.
Exclusive OR circuit ( _hereinafter referred to as EX- _OR
(referred to as circuits) 14-1 to 14-8. Further, the digital reference signal input to the terminal 6 is supplied to the 8-bit reference signal shift register 7, and outputted from the output terminals _Q1 to Q8 to the EX-OR circuits 14-1 to 14-1 at the timing of the clock pulse input to the terminal ₈ . 14
-8 is supplied. On the other hand, the mask data input to terminal 11 is transferred to 8-bit mask shift register 1.
0, and is supplied to the cathodes of diodes D ₁ -D ₈ at the timing of the clock pulse that enters terminal 12. Here, the output sides of the EX-OR circuits 14-1 to 14-8 are connected to the emitter side of the transistor T _r1 via resistors R _1-1 to R _1-8 , and the output sides of the EX-OR circuits 14-1 to 14-8 are connected to the emitter side of the transistor T r1. Each of the output terminals Q ₁ to Q ₈ is
EX through diodes D ₁ to _{D 8} and resistors R _3-1 to R _3-8
-Output terminals and resistors of OR circuits 14-1 to 14-8
It is connected to each of the connection points R _1-1 to R _1-8 .
The collector side of the transistor T _r1 is connected to the +15V voltage source via the resistor R ₂ and is connected to the output terminal 1.
5, and the base side is connected to a +5V constant voltage source. Now, let us consider a case where all the outputs of the masking shift register 10 are "1". Since the outputs of the mask shift register 10 are all "1", a reverse bias voltage is applied to the diodes _D1 to _D8 .
No current flows through resistors R _3-1 to R _3-8 . On the other hand, EX
-The gate outputs of OR circuits 14-1 to 14-8 are:
Since it is an open collector output, when the digital input signal matches the digital reference signal and the output of the EX-OR circuits 14-1 to 14-8 is "0",
Current flows through resistors R _1-1 to R _1-8 . transistor
Since a constant voltage is applied to the base side of T _r1 , the EX-OR circuit 14 is connected to the resistor _R2 connected between the power supply and the collector side of transistor T _r1 .
A current proportional to the number of "0" outputs among the outputs -1 to 14-8 flows, and a voltage proportional to this current change is output from the terminal 15. For example, when +5V is applied to the base side of the transistor T _r1 , the emitter voltage is maintained at a constant voltage of 4.3V, so the EX-OR circuit 14-
When the output of one of 1 to 14-8 becomes "0", if the resistance value of each of the resistors R _1-1 to R _1-8 is R ₁ ohm, then the resistors R _1-1 to _{R 1-8} A current of 4.3/R ₁ ampere flows through one predetermined resistor. Since this current is approximately the same as the current flowing through resistor R ₂ ,
If the resistance value of the resistor R ₂ is R ₂ ohm, a voltage of (15-4.3R ₂ /R ₁ )V is output from the terminal 15. Therefore, if n is the number of outputs from the EX-OR circuits 14-1 to 14-8 where the digital input signal and the digital reference signal match and output "0", then the voltage output from the terminal 15 is is (15−4.3・
R ₂・n/R ₁ )V. Therefore, when the outputs of the output terminals Q ₁ to _{Q 8} of the mask shift register 10 are “1”, the EX-OR circuit 1
Since the outputs of 4-1 to 14-8 are not masked, these outputs can be used effectively. Next, consider the case where all outputs of the masking shift register 10 are "0". When the digital input signal and digital reference signal match, EX-OR circuit 1
When the outputs of 4-1 to 14-8 are "0", the outputs of EX-OR circuits 14-1 to 14-8 are as described above.
Since it is an open collector output, current flows through the EX-OR circuits 14-1 to 14-8, and the mask shift register 10 has no function. On the other hand, the digital input signal and digital reference signal do not match.
The output of EX-OR circuits 14-1 to 14-8 is “1”
, the resistance value of resistors R _1-1 to R _1-8 is R ₃ ohm,
If the voltage drop of the diodes D ₁ to _{D 8} is 0.7V each, the resistors R _1-1 to _{R 1-8} each have a voltage drop of (4.3−0.7)/(R ₁
+R ₃ ) A current of ampere flows. Here, (4.3−
0.7)/(R ₁ + R ₃ ) = 4.3/2R ₁ .
If the resistance value R ₃ of R _3-1 to _{R 3-8} is selected, the output voltage from the terminal 15 will be at an output level where the digital input signal and the digital reference signal match by 0.5 bit. This means that a pixel in which the digital input signal and the digital reference signal do not match is weighted by 1/2 in a masked state. In this way, the circuit system diagram shown in Fig. 4 can be converted into 3
If a set is prepared and the correlation of the linear image consisting of 3×8 (=24) pixels shown in FIG. 2 is determined using the above circuit diagram, it is possible to obtain a correlation value that is extremely close to human pattern recognition. The example shown in FIG. 2 mentioned above will be specifically explained. It is assumed that the pixels to be masked are at the same positions as described in the conventional example. In the case of the image shown in FIG. 2B, the number of matching pixels is "16" and the number of mismatching pixels in the mask portion is "0", so the correlation value is "16". In the case of the image shown in Figure C, the number of matching pixels is "8" and the number of mismatching pixels in the mask part is "16".
Therefore, weight this number by 1/2 and get “8”
Then, a correlation value of “16” is obtained. In the case of the image shown in Figure D, the number of matching pixels is "24" and the number of mismatching pixels in the mask portion is "0", so the correlation value is "24". In the case of the image shown in Figure E, the number of matching pixels is "16" and the weighted value of the number of mismatching pixels in the mask section is "2", so a correlation value of "18" is obtained. In the case of the image shown in Figure F, the number of matching pixels is "18", and the weighted value of the number of mismatching pixels in the mask part is "1.5".
Therefore, a correlation value of “19.5” is obtained. Comparing the correlation values of the images shown in FIGS. 2A to 2F obtained in this manner with the correlation values obtained in the conventional example, the following table shows the results.

[Table] According to the above table, it can be seen that the correlation values obtained by the method of this embodiment are more in agreement with the degree of pattern matching judged by humans than the correlation values of the conventional example. By weighting the masked pixels in this way, the function of the mask can be further enhanced for pattern recognition. In this embodiment, the mask shift register 10
Since the output of is not an open collector output, diodes D ₁ to _{D 8} are provided on the output terminals Q ₁ to _{Q 8} side, but if it is an open collector output, only the resistors R _3-1 to _{R 3-8} are sufficient. Alternatively, by connecting diodes D ₁ to D ₈ , the resistance is increased by the forward voltage.
Since the voltage across R _1-1 to R _1-8 becomes low, the current caused by the mask shift register 10 is
Taking advantage of the fact that the current is smaller than that of the EX-OR circuits 14-1 to 14-8, the resistors R _3-1 to
Omit R _3-8 and replace diodes D ₁ ~ _{D 8} with resistors R _1-1 ~
May be connected to R _1-8 . Furthermore, although the weighting value is set to 1/2 in this embodiment, the weighting value is not limited to this, and a weighting value that more closely resembles a human recognition pattern may be selected depending on the image to be recognized. In the example, the resistance
By making the resistance values of R _3-1 to R _3-8 variable, the weighting value can be set arbitrarily. Further, in this embodiment, for the masked portions that match, the outputs are directly added, but this may also be weighted arbitrarily. In this way, a difference in weighting is given between the correlation value of the masked part and the correlation value of the unmasked part, and when calculating the correlation value of the masked part, it is determined whether there is a match or a mismatch. It is also possible to carry out different weightings in different cases. In this embodiment, the correlation value is output as analog data, but the output of the exclusive OR circuit and the output of the masking shift register may be digitally processed and added. Furthermore, in this embodiment, pattern recognition of a binary image was explained as an example, but analog signals other than images such as gradation images other than binary or audio signals may also be used.
By performing digital conversion, this embodiment can be applied by using appropriate mask data according to the pattern data. As described above, the correlator according to the present invention includes a plurality of exclusive OR circuits that determine whether two signals, a digital input signal and a digital reference signal, match or do not match for each bit, and the plurality of exclusive OR circuits. In the correlator, each bit of the digital input signal is divided into a bit part where emphasis is placed on the correlation with the digital reference signal and a bit part where emphasis is not placed on the correlation with the digital reference signal. For bit portions that emphasize correlations that match each other regardless of the presence or absence of the bits, the output of the exclusive OR circuit corresponding to this portion is supplied to the adding means, and for bit portions that do not emphasize correlations, the correlations are Since the output of the exclusive OR circuit corresponding to the bit part that is not emphasized is arbitrarily weighted and this weighted value is supplied to the adding means, the digital input signal is even slightly different from the digital reference signal. It is possible to prevent the correlation value from decreasing significantly, and by adding the weighting value, it is possible to obtain a higher correlation value when the digital input signal is close to the digital reference signal, and If the digital input signal is different from the digital reference signal, a lower correlation value can be obtained, so it has the advantage of being able to obtain a correlation value that is extremely close to human recognition judgment. Furthermore, by setting the weighting value to 1/2, a correlation value that approximates human recognition judgment can be obtained in pattern recognition of a straight line image.

[Brief explanation of drawings]

Fig. 1 is a block system diagram showing an example of a conventional correlator without a mask, Fig. 2 A to F are image diagrams each showing an example of pattern recognition, and Fig. 3 is a conventional correlator with a mask. FIG. 4 is a circuit diagram showing one embodiment of the correlator of the present invention. 2... A/D converter, 3... Input signal shift register, 5-1 to 5-n... Exclusive NOR circuit, 7... Reference signal shift register, 9
...Adder, 10...Mask shift register,
13-1 to 13-n...gate circuit, _R1-1 to
_R1-8 , _R2 , _R3-1 to _R3-8 ...Resistor, _D1 to _D8 ...Diode, _Tr1 ...Transistor, 14-1 to 1
4-8...Exclusive OR circuit.

Claims (1)

[Claims] 1. 2. A digital input signal and a digital reference signal.
In a correlator, each of the digital input signals is The bits are divided into a bit part where the correlation with the digital reference signal is emphasized and a bit part where the correlation is not important, and for the bit part where the correlation is important, the output of the exclusive OR circuit corresponding to that part is sent to the adding means. For the bit portion where the correlation is not emphasized, the output of the exclusive OR circuit corresponding to the bit portion where the correlation is not emphasized is arbitrarily weighted, and the weighted value is supplied to the addition means. Characteristic correlator. 2. The correlator according to claim 1, wherein the weighting value is set to 1/2. 3. The correlator according to claim 1, wherein the weighting value is made different when the two signals match and when they do not match. 4. The correlator according to claim 3, wherein the weighting value is set to 1 when the two signals match, and is set to 1/2 when the two signals do not match.