JPS6363928B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a microprocessor analysis device capable of detecting and analyzing abnormal operation of a microprocessor in microprocessor application equipment, and more particularly, The present invention relates to a microprocessor analysis device that is capable of inspecting a target microprocessor while it is attached, rather than removing the microprocessor from the device and inspecting it.

[Prior Art] With the widespread use of microprocessors (hereinafter referred to as μP), many μP-applied devices incorporating μP have appeared. The μP analyzer is
When developing such applied equipment, it has come to be widely used as an inspection device to find defects in the applied equipment.

When connecting this μP analyzer to a board under test on which the microprocessor is mounted to perform such inspections, as shown in Figure 1, after removing the μP from the board under test (UUT) 10. ,
A method is adopted in which the connector 21 is inserted into the μPIC socket 11 and connected as shown in FIG.

Note that this connector 21 is connected to a first probe (referred to as POD) 23 via a cable 22, and the first probe 23 is connected to an analysis device main body 25 via a cable 24.

Also, a connector 28 ₁ that comes out from the auxiliary logic probe 26 (connected to the analyzer main body 25 via a cable 27), which is the second probe.
~ _28o are connected to necessary locations on the board under test 10.

The first probe 23 has a built-in μP that is equivalent to the removed μP, and can perform operations such as tracing the operation of the μP and directly accessing the memory and input/output devices on the board under test based on commands from the analyzer main body 25. (BUS) can be operated externally to perform various analysis processes.

When using such a conventional μP analysis device, the probe 21 is connected to the board under test 10 via the connector 22 as described above, so the board under test that can be analyzed must have an IC socket for attaching the μP. There is a condition that must be used.

However, in commercialized μP application equipment, the μP is often attached directly to the board due to cost reasons, and this analysis device cannot be applied as is to such μP application equipment. I had a problem.

[Object of the Invention] In view of the above points, the object of the present invention is to provide a device under test that allows the board under test to be inspected while the μP mounted on the μP application device remains attached without removing it at all. The purpose of this invention is to provide such a μP failure analysis device.

[Summary of the Invention] In order to achieve such an object, the present invention includes a probe equipped with a microprocessor equivalent to the microprocessor incorporated in the board under test, and a connecting connector connected to the probe connected to the board. In a microprocessor failure analysis device that is connected to a test board and that allows the microprocessor in the probe to operate the board under test on its behalf to perform failure analysis of the board under test, It consists of an IC clip type adapter that allows the connector to be connected directly to the input/output terminals of the microprocessor directly attached to the board under test, and the probe has bus usage rights for the microprocessor on the board under test. A three-state buffer amplifier is provided on a bus and a control signal line between the microprocessor in the probe and the adapter and is controlled by the control means. It is characterized by the fact that it has a built-in configuration that allows failure analysis of the board under test with the microprocessor directly attached.

[Example] The present invention will be explained in detail below using the drawings. The difference between the present invention and the conventional example shown in FIG. 1 is the first probe and the connector connected thereto. Since the other parts are the same as those of the conventional example, their explanation will be omitted here.

FIG. 3 is a diagram showing the appearance of the connector (here an IC clip type adapter is used) 30 and the first probe 40. As shown in the figure, this adapter 30 is brought into contact with the μP 12 that is directly attached to the board under test by sandwiching it from above, and the pins of both are brought into contact. As a result, the μP 12 on the board under test and the μP 41 disposed in the probe POD are connected in parallel, and as a result, the bus of the board under test can be shared.

FIG. 4 is a conceptual configuration diagram showing one embodiment of the probe 40, and at the same time shows the μP on the board under test.
The state of connection with 12 is also shown.

Note that the microprocessor 8085 from Intel Corporation is used as an example of the μP.

In the figure, 42 is a control circuit, 43 is a memory, 44 is a three-state buffer amplifier,
45 is a three-state bidirectional buffer amplifier, and 46 is a communication interface for transmitting and receiving signals to and from the analyzer main body.

The memory 43 is a memory that stores programs and the like for the μP 41 to process commands sent from the analyzer main body, and also allows data to be written and read as necessary, and is usually composed of ROM and RAM. There is.

The control circuit 42 generates control signals to enable the μP 41 to access the memory 43 as well as control signals necessary to control other parts.

The buffer amplifier 44 is inserted and connected between the address bus 47 and the read signal line and the write signal line, and the buffer amplifier 45 is inserted and connected between the data bus 48.

The operation in such a configuration will be explained next.
Since the purpose is to analyze a defective board under test, there is no need to give the μP12 on the board under test the right to use the bus, so an L level is always applied from the probe 40 to the input terminal of the μP12, and the address bus 47 of the μP12 is and the input terminals of data bus 48 are held in a high impedance state.

On the other hand, the μP in the probe 40 is stored in the memory 43 (usually in the ROM, which is a component of this memory).
It executes the stored program, interprets commands sent from the analyzer main body, and drives the bus switching control circuit 42 as necessary to access devices on the board under test.

Failure analysis methods include simply writing and reading from memory and I/O devices (not shown) on the board under test, and a more advanced method is signature analysis (not shown). There are methods such as SA), but in any case,
It is sufficient that the analyzer side can freely manipulate the address bus, data bus, read signals (), write signals (), etc. of the board under test.

Note that most μPs are equipped with a three-state bus control input terminal to enable DMA operation, and by using this terminal,
As mentioned above, the address bus, data bus, read signal (), write signal (), etc. of the board under test can be freely manipulated from the analyzer side without removing the μP.

As a condition for the board under test, a protective resistor or a signal must be provided so that short current will not flow even if the three-state bus control input terminal is forcibly set to H or L level by the control of the analyzer. Measures such as line separation must be taken.

In this way, the memory and I/O devices of the board under test can be accessed by replacing the μP in the probe 40 with the μP attached to the board under test.

In the embodiment described above, the bus usage right of the μP 12 is always taken away, but the present invention is not limited to this, and the following method may also be used.

In other words, the μP on the μP board has memory and I/O
This is a so-called real-time trace method that traces and monitors the access processing status in real time. In the case of such a device, bus usage rights are granted to the μP on the board under test and the μP is allowed to perform normal processing, but the device is configured to allow active intervention by setting a trigger point. In other words, the configuration is such that the right to use the bus of the μP on the board under test is taken away when the set trigger condition is traced, and after that, the μP in the probe is driven to access the memory and I/O devices of the board under test. can do. However, the signals that can be controlled by the μP inside the board under test are
Since it is limited to the three-state input/output terminals of the μP on the board under test, it is not possible to completely replace the processing equivalent to the μP on the board under test with the μP inside the probe, such as with the emulation function.

[Effects of the Invention] As explained above, according to the present invention, after connecting the probe and the μP on the board under test using an IC clip-shaped adapter, the right to use the bus for the μP on the board under test is relinquished. µP in the probe instead.
It is possible to realize a μP failure analysis device that can obtain the right to use the bus and access the memory and I/O devices in the board under test, thereby performing failure analysis of the board under test.

[Brief explanation of drawings]

Figures 1 and 2 are schematic diagrams showing an example of a conventional μP failure analysis device, Figure 3 is a perspective view of a main part of an embodiment of the present invention, and Figure 4 is a diagram of a probe portion of the present invention. FIG. 2 is a configuration diagram showing an example. 10... Board under test, 12, 41... Microprocessor, 30... Adapter, 40... First
probe (POD), 42...control circuit, 43...
...Memory, 44, 45...Three-state buffer amplifier, 46...Communication interface.

Claims (1)

[Claims] 1 A microprocessor equivalent to the microprocessor incorporated in the board under test is mounted on the probe, a connection connector connected to this probe is connected to the board under test, and the microprocessor in the probe is installed in place of the microprocessor to be tested. In a microprocessor failure analysis device that enables a test board to operate and performs failure analysis on the board under test, the microprocessor is connected directly to the board under test. The probe is comprised of an IC clip type adapter that can be connected directly to the output terminal, and the probe includes a control means for generating a control signal for causing the microprocessor on the board under test to relinquish the right to use the bus; A three-state buffer amplifier is provided on the bus and control signal line between the microprocessor and the adapter and is controlled by the control means,
A microprocessor failure analysis device characterized in that failure analysis of a board under test can be performed with the microprocessor directly attached.