JPH0136043B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal processing circuit in a phase detection type position reading device, and in particular provides a signal processing circuit that can improve the resolution and response speed of the position reading device. .

Conventionally, as a phase detection type position reading device, in a magnetic scale device based on the measuring principle using a magnetic grating, a magnetic grating formed on the magnetic scale is read by a phase detection circuit based on the principle of a magnetic modulator. Phase detection type magnetic scale devices and the like are known. In this phase detection type magnetic scale device, a read output signal is generally obtained by a signal processing circuit as shown in FIG. That is, in FIG. 1, a magnetic grating having a characteristic wavelength λ (for example, λ=200 μm) is formed on a magnetic scale 1 by magnetically recording a sine wave or the like.
A pair of magnetic flux responsive heads 2 and 3 are used to read the magnetic grating of the magnetic scale 1 as a scale graduation.
are arranged opposite to the magnetic scale 1 with an interval of (m+1/4)λ (where m is an integer) from each other, that is, with an electrical phase difference of 90°. Usually, the magnetic flux responsive heads 2 and 3 have a multi-gap structure having a plurality of gaps formed corresponding to the characteristic wavelength λ of the magnetic grating, thereby increasing wavelength selectivity and improving reproduction characteristics. ing. In these magnetic flux responsive heads 2 and 3, an excitation signal with a frequency of 1/2· _f0 is supplied to each excitation coil 2A and 3A, and each detection coil 2B and 3B responds to the magnetic flux from the magnetic scale 1. An output signal with a carrier frequency twice that of the excitation signal 1/2f ₀ is obtained. Here, each of the magnetic heads 2, 3
are arranged at intervals of (m+1/4)λ, so if x is the distance from the position where the magnetic flux is zero on the magnetic scale 1, then h ₁ = H・sin2π/λx ...Equation 1 h ₂ = H・cos2π/λx ...In response to the magnetic fluxes h ₁ and h ₂ according to the second equation, e ₁ = E ₁・sin2πx／λ・sin2πf ₀ t ...Third equation e ₂ = E ₂・cos2πx /λ·sin2πf ₀ t ... Output signals e ₁ and e ₂ according to the fourth equation are output. Here, H, E ₁ , and E ₂ in each of the above equations are constants determined by the magnetic field strength of the magnetic scale 1, circuit constants, and the like. Note that the reference signal of the frequency n·f ₀ (where n is a positive integer) outputted from the reference signal oscillator 4 is down-done to 1/2n by the first frequency down-converter 5 to obtain f ₀ / A signal with a frequency of 2 is passed through a low-pass filter 6 and an excitation amplifier 7 as the excitation signal to the excitation coil 2 of each head 2, 3.
It is supplied to A and 2B.

Output signals e ₁ and e ₂ outputted from the detection coils 2B and 3B of each of the heads 2 and 3 are supplied to a summing amplifier 11 via preamplifiers 8 and 9, respectively. Note that one output signal e ₁ is output from phase shifter 1
0, the phase of the carrier wave is delayed by 90 degrees and is supplied to the summing amplifier 11. Therefore, from the summing amplifier 11, e _p =E _p・[sin2πx/λ・cos2πf ₀ t+cos2πx/λ・s
in2πf ₀ t]=E _p ·sin (2πf ₀ t + 2πx/λ)...The output signal e _p according to the fifth formula is output. The output signal e _p expressed by the fifth equation above is a phase modulation signal whose amplitude E _p is constant and whose phase changes as a function of the position x on the magnetic scale 1. Note that the preamplifiers 8, 9
The output signals e ₁ and e ₂ are supplied to the summing amplifier 11 with the signal levels equal to each other.

Note that in each of the above equations, only the necessary signal components are described to simplify the explanation, but in reality, the excitation signal component of the magnetic head and its harmonic components, as well as the twice the carrier frequency Contains signal components and their harmonic components. Therefore, in order to extract only the signal components necessary as a phase modulation signal as shown in the above equation 5, the output signal e _p from the summing amplifier 11 is filtered through a band pass filter whose center frequency is the carrier frequency _f0 . 12. Then, the output from the band pass filter 12 is supplied to an amplitude limiting circuit 14 via a buffer amplifier 13, and after being amplitude limited in the amplitude limiting circuit 14, a waveform shaping circuit 15
is converted into a square wave signal e _s by . For the above rectangular wave signal e _s , the interpolation processing circuit 16 converts the square wave signal e s to 1/
By performing n interpolation processing, measurement is performed with a resolution of λ/n. In the interpolation process, a reference signal having a frequency of n·f ₀ from the reference signal oscillator 4 is used as an interpolation clock.

In a general phase detection type magnetic scale device having the above-mentioned configuration, when the recording wavelength of the magnetic scale 1 is λ, in order to obtain a resolution of λ/n, n・f is required for the carrier frequency f ₀ An interpolated clock signal of _zero frequency is required. Also, its response speed
V _n is the difference between the carrier frequency f ₀ and the maximum frequency deviation f ₀ ±△f ₀ while moving at the maximum speed V _n, that is, △
Since it directly corresponds to f ₀ , the absolute value of Δf ₀ depends on the center frequency of the bandpass filter 12, which is set to f ₀ . That is, in general, the ratio between the passband width BW and the center frequency f ₀ of the bandpass filter 12, that is, the selection coefficient BW/f ₀ , is related only to the number of constituent elements of the filter, that is, the order, regardless of the value of the center frequency f ₀ . Therefore, the higher the center frequency f ₀ is, the larger the bandwidth BW becomes, and △f ₀ can be increased, and the relationship between response selectivity V _n and △f ₀ is V _n = △f ₀・λ [m/sec]
There is a relationship. Therefore, in order to increase the response speed, it is necessary to increase the center frequency of the bandpass filter 12, that is, the carrier frequency f ₀ of the phase modulation signal. However, if the carrier frequency f ₀ is increased, the resolution cannot be maintained unless the frequency n·f ₀ of the interpolated clock signal is further increased.

Traditionally, magnetic scale devices have been
High-resolution measurement of approximately 1μm to 2μm, and 5μm
2 with relatively coarse resolution of ~10μm
Systematic measurement systems are widely used, and their carrier frequency f ₀ is set to the ratio of resolution. for example,
At carrier frequency f ₀ of 10kHz, 2MHz with n=200
1/200 interpolation processing is performed using the interpolated clock signal to obtain a resolution of 1 μm, and a carrier frequency of 50 kHz.
At f ₀ and n=40, 1/40 interpolation processing is performed to obtain a resolution of 5 μm. In this way, if the resolution, that is, the product n・f ₀ of the interpolation number n and the carrier frequency f ₀ is made constant, the frequency n・f ₀ of the interpolation clock signal will be constant regardless of the resolution, so the interpolation The processing circuit 16 can be shared.

By the way, as mentioned above, in a phase detection type magnetic scale device, response speed and resolution are in a reciprocal relationship, so for example, when the carrier frequency f ₀ is 50kHz,
In order to perform interpolation processing at 1/200 in order to obtain a resolution of 1 μm, the frequency of the interpolation clock signal must be increased to 10 MHz, which not only makes signal processing difficult, but also requires the use of C-MOS ICs, etc. This makes it difficult to adopt low-power logic elements and large-scale integrated circuit LSIs, making it impossible to reduce system power consumption and cost. Therefore, the present invention makes it possible to obtain various resolutions with a single carrier frequency f ₀ , and also makes it possible to apply low-speed logic elements while satisfying both high resolution and high-speed response performance, thereby reducing the size of the system. The present invention provides a signal processing circuit in a phase modulation type position reading device having a novel configuration that achieves lower power consumption, lower cost, and improved reliability.

Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment.

The embodiment shown in FIG. 2 is an example in which the present invention is applied to the phase detection type magnetic scale device having the general configuration shown in FIG. 1 described above. Incidentally, common constituent elements are given common numbers in the drawings, and detailed explanation thereof will be omitted.

In this embodiment, based on the output signals e ₁ and e ₂ obtained by detecting the magnetic grating or scale graduation recorded on the magnetic scale 1 with each magnetic head 2 and 3, the above-mentioned equation 5 is used. Phase modulated signal shown
A frequency conversion circuit 20 using a balanced modulator 21 is disposed between a bandpass filter 12 for extracting e _p from the summing amplifier 11 and a buffer amplifier 13 provided before the amplitude limiting circuit 14. ing.

The frequency conversion circuit 20 includes a balanced modulator 21 and a low pass filter 2 connected in series between the band pass filter 12 and the buffer amplifier 13.
2, the frequency n·f ₀ of the reference signal from the reference oscillator 4 is lowered to 4/5n, and a modulation signal e _c having a frequency of 4/5f ₀ is supplied to the balanced modulator 21. It is composed of a frequency down-converting circuit 23. Here, the modulation signal e _c has a frequency of 4/5
If it is a rectangular wave signal of f ₀ and the duty ratio is 0.5, then e _c = E _c {sin2π(4/5f ₀ )t+1/3sin2π(12/
5f ₀ )t+1/5sin2π(20/ _5f0 )t...=E _c∞ 〓 ⁿ⁼¹ 1/2n-1sin2π(2n-1)4/ _5f0t ...It is expressed by the sixth equation.

Therefore, the balanced modulator 21 outputs an output signal e _n obtained by multiplying and combining the phase modulation signal e _p shown in the fifth equation above and the modulation signal e _c shown in the sixth equation above. become. Here, 2π(1/5f ₀ )=ω ₀ '
If we rearrange the fifth and sixth equations above, e _p =E _p・sin (5ω' ₀ t+2π/λx) ...Equation 7 e _c =E _c・_∞ 〓 ⁿ⁼¹ 1/2n−1sin (2n−1)4ω′ ₀ t ...Since the phase modulation signal e _p and the modulation signal e _c are shown in the 8th equation, the output signal e _n obtained by the product of the above equations is e _n =K _n・e _p・e _c =K _n・E _p・E _c・sin (5ω ₀ ′t＋2π/
λx)・_∞ 〓 ⁿ⁼¹ 1/2n−1sin(2n−1)4ω′ ₀ t1/2K _n・E _p・E _c {cos(ω ₀ ′t＋2π/λx)−cos(9ω ₀
′t+2π/λx)+1/6K _n・E _p・E _c {cos(7ω ₀ ′t−
2π/λx) −cos (17ω ₀ ′t+2π/λx)+1/10K _n・E _p・E _c
{cos(15ω ₀ ′t−2π/λx)−cos(25ω ₀ ′t+2π/
λx)... can be expressed by the ninth equation. In addition, the above
K _n is a constant indicating multiplication gain.

Therefore, if the pass frequency band of the low-pass filter 22 provided on the output side of the balanced modulator 21 is set to ω ₀ ', then e _nL = 1/2K _L・K _n・E _p・E _c・cos(ω ₀ ′t+2π/λx
)...The output signal e _nL shown by the 10th equation is obtained via the low-pass filter 22. Note that K _L is a constant indicating the transfer gain of the filter 22. Above number
The output signal e _nL shown in equation 10 is a phase modulated signal e _p which has a carrier wave component of 5ω ₀ ' obtained through the above-mentioned bandpass filter 12, and a phase modulation signal e p which has a carrier wave component of ω ₀ '. The frequency has been converted to .

Therefore, the interpolation processing circuit 16 only needs to perform interpolation processing on the output signal e _nL of the carrier wave ω ₀ ' obtained through the frequency conversion circuit 20.
Interpolation processing can be performed with the interpolation clock frequency reduced to n/5·f ₀ . That is, for example, conventionally, in order to obtain a resolution of 1 μm using a 50 kHz carrier wave, a 10 MHz interpolation clock signal was required, but in this embodiment, if interpolation processing is performed using a 2 MHz interpolation clock signal, 1 μm resolution is required. A resolution of 1 μm can be obtained by performing an interpolation process of /200. As described above, in this embodiment, the frequency conversion circuit 20 changes the carrier frequency of the phase modulation signal e _p from f ₀ to f ₀ ′ (f ₀ ′=
1/5 f ₀ ), high resolution can be obtained even if the frequency of the interpolation clock signal required for interpolation processing is reduced to f ₀ '/f ₀ Interpolation processing by power logic elements becomes possible. Furthermore, since the carrier frequency f ₀ of the phase modulation signal _ep is frequency converted, it is also possible to unify display systems with various resolutions at a carrier frequency of 50 kHz, for example.
Furthermore, the carrier wave frequency f ₀ ′ reduced by the above frequency conversion is the carrier wave frequency of various systems conventionally used, for example, 50 kHz, 10 kHz out of 10 kHz.
By setting the frequency f _C of the modulation signal to 40 kHz, it is possible to realize a signal processing circuit that is compatible with carrier frequencies of various systems.

By the way, in the embodiment with the above-mentioned configuration,
The limit of analog response speed for obtaining a phase modulation signal with a normal signal level is the bandpass filter 12.
and the characteristics of each filter of the low-pass filter 22, but the band-pass filter 12 is
It is sufficient to set the same conditions as the conventional system using a carrier wave of 50 kHz, and the filter characteristics of the low-pass filter 22 are equal to the pass frequency ω ₀ if the balanced modulator 21 has ideal balanced characteristics. Since the frequency closest to the passband in the stopband for ' is 7·ω ₀ ', it is possible to use a filter with an extremely gentle slope, that is, a low-order (simple) configuration even when considering the bandwidth. In addition, in this embodiment, since a rectangular wave signal is used as a modulation signal, if the above-mentioned balanced modulation is not performed ideally, carrier frequency leakage will occur.
As shown in FIG. 3, if a low-pass filter 22 having a filter characteristic that attenuates at 4ω ₀ ' is used, the influence of carrier wave component leakage can be ignored.

In addition, in the embodiments described above, interpolation processing is performed on a signal obtained by reducing the carrier frequency of the phase modulation signal by frequency conversion, but even if the frequency conversion is performed, ripple components etc. contained in the original phase modulation signal are Since it is stored correctly, it is not affected by interpolation errors. That is, bandpass filter 1
Let the 5·f ₀ ′ (50kHz) phase modulation signal e _p obtained by 2 be the primary phase modulation signal e _p1 , and the frequency-converted f ₀ ′ (10kHz) signal e _n be the secondary phase modulation signal. , the primary phase modulation signal e _p1 containing an amplitude modulated ripple component whose displacement x is a function is e _p1 = E _p・sin (5ω' ₀ t + 2π/λx) {1 + Rf (x)} ... Equation 11 It can be shown in Equation 11. Here, R is a modulation coefficient (0R<1).

In addition, the balanced modulator 2 expressed by the above equation 11
Considering the ripple component mentioned above, the output signal e _n from 1 is as follows: e _n =E _p・sin(5ω ₀ ′t+2π/λx) {1+Rf(x)}
×E _C・_∞ 〓 ⁿ⁼¹ 1/2n−1・sin(2n−1)4ω ₀ ′t =E _p {1+Rf(x)}・sin(5ω ₀ ′+2π/λx)
・E _C sin4ω ₀ ′t＋E _p {1+Rf(x)}・sin(5ω ₀ ′t +2π/λx)×1/3E _C sin3・(4ω ₀ ′)t+…
......It can be shown in the 12th equation, which is the 12th equation.

Then, the twelfth filter is filtered by the low-pass filter 22.
Since the fundamental wave component of the signal e _n shown by the formula is extracted, the signal e _n ′ of the fundamental wave component is e _n ′=E _p・{1+Rf(x)}・sin(5ω ₀ ′t+2π/λ
x)・E _C・sin4ω ₀ ′t = 1/2・K _n・E _p・E _c・{1+Rf(x)}・cos(ω ₀
′t+2π/λx)−1/2・K _n・E _p・E _c・{1+Rf(x)}・cos(9ω ₀ ′t+2π/λx)
...It is shown in the 13th equation, which is the 13th equation.

Therefore, the secondary phase modulation signal e _p2 obtained by extracting the ω ₀ ' component in the above equation 13 by the low-pass filter 22 is as follows: e _p2 = 1/2・K _L・K _n・E _p・E _c・{1+Rf(x)
}・cos(ω ₀ ′t+2π/λx) =E _p・{1+Rf(x)}・cos(ω ₀ t+2π/λ
x)...It is shown in the 14th equation, which is the 14th equation. In this 14th formula,
E _p ′ is simply a coefficient expressed as E _p ′=1/2K _L・K _n・E _p・E _c , and the secondary phase modulation signal e _p2 has 1
The ripple component of the next phase modulation signal e _p1 is correctly preserved.

In the above embodiment, the present invention is applied to a phase detection type magnetic head device, but the present invention is not limited to the above embodiment, but can also be applied to a phase detection type position reading device such as an inductosyn. be able to.

As is clear from the above description of the embodiments, according to the present invention, in a phase detection type position reading device that detects position information based on the phase of a phase modulated signal having a carrier frequency of f ₀ , the phase modulated signal is transferred to a balanced modulator. The frequency is converted to a carrier _wave frequency f ₀ ′ where f _{0 ′} < f ₀ by By being configured to perform 1/n interpolation processing, the detection output of the scale graduation is obtained by a phase modulation signal of a carrier wave of high frequency f ₀ , and the carrier wave frequency of this phase modulation signal is
Since f ₀ is frequency-converted to a lower frequency f ₀ ′ and interpolation processing is performed based on the carrier wave frequency f _{0 ′} , it is possible to simultaneously improve resolution and high-speed response performance. In addition, since high resolution can be obtained even if the frequency of the interpolation clock signal required for interpolation processing is low, the signal processing circuit can be configured with low-speed logic elements, and low-power logic elements such as C-MOS ICs can be used. A low power consumption system can be constructed using this. Therefore, the intended purpose can be fully achieved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the general configuration of a phase detection type magnetic scale device, which is an example of a phase detection type position reading device. FIG. 2 is a block diagram showing an embodiment in which the present invention is applied to the above magnetic scale device. FIG. 3 is a characteristic diagram showing the filter characteristics of the low-pass filter applied to the above embodiment. 1... Magnetic scale, 2, 3... Magnetic head,
4... Reference signal oscillator, 10... Phase shifter, 1
DESCRIPTION OF SYMBOLS 1...Signal summing amplifier, 12...Band pass filter, 16...Interpolation processing circuit, 20...Frequency conversion circuit, 21...Balanced modulator, 22...Low pass filter, 23...Frequency downshifting circuit.

Claims (1)

[Claims] 1 In a phase detection type position reading device that detects position information based on the phase of a phase modulated signal with a carrier wave frequency of f ₀ , the above phase modulated signal is converted to a carrier wave frequency of f ₀ ′ < f ₀ by using a balanced modulator and a low-pass filter.
For the phase modulation signal of the carrier frequency f ₀ ′, the frequency is converted to f ₀ ′, and n・
1/n by an interpolated clock signal with a frequency of f ₀ '.
A signal processing circuit in a phase detection type position reading device, characterized in that it is configured to perform interpolation processing.