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JPH0160790B2 - - Google Patents
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JPH0160790B2 - - Google Patents

Info

Publication number
JPH0160790B2
JPH0160790B2 JP7884182A JP7884182A JPH0160790B2 JP H0160790 B2 JPH0160790 B2 JP H0160790B2 JP 7884182 A JP7884182 A JP 7884182A JP 7884182 A JP7884182 A JP 7884182A JP H0160790 B2 JPH0160790 B2 JP H0160790B2
Authority
JP
Japan
Prior art keywords
level
output
peak
adder
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7884182A
Other languages
Japanese (ja)
Other versions
JPS58195162A (en
Inventor
Kikuo Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7884182A priority Critical patent/JPS58195162A/en
Publication of JPS58195162A publication Critical patent/JPS58195162A/en
Publication of JPH0160790B2 publication Critical patent/JPH0160790B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/04Measuring peak values or amplitude or envelope of AC or of pulses

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Emergency Protection Circuit Devices (AREA)

Description

【発明の詳細な説明】 この発明は、交流入力レベルの検出をおこな
い、所望以上の入力レベルがある期間を出力パル
スとして取り出す交流レベル検出回路に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AC level detection circuit that detects an AC input level and extracts a period in which the input level is higher than a desired value as an output pulse.

第1図は従来の構成例を示すものである。図に
おいて、1は入力端子、2は交流増巾器、3は整
流器、D1,C1,R1は整流器3を構成するダ
イオード、コンデンサ、抵抗である。4は電圧比
較器、5は電圧比較器に比較基準電圧を与えるた
めの基準電圧源、6は出力端子である。
FIG. 1 shows an example of a conventional configuration. In the figure, 1 is an input terminal, 2 is an AC amplifier, 3 is a rectifier, and D1, C1, and R1 are diodes, capacitors, and resistors that constitute the rectifier 3. 4 is a voltage comparator, 5 is a reference voltage source for providing a comparison reference voltage to the voltage comparator, and 6 is an output terminal.

次に動作について説明する。 Next, the operation will be explained.

入力端子1には不連続にレベルが変化する交流
入力信号が加えられる。交流増巾器2によつて所
望のレベルまで増巾された信号は、整流器3によ
つて直流電圧に交換される。この直流電圧は入力
の交流レベルに比例して変化することは言うまで
もない。基準電圧源5によつて設定された電圧を
整流直流電圧が越えると、電圧比較器4の動作に
よつて、6に出力信号が得られる。すなわち、交
流入力レベルが所望のレベル以上の期間だけ出力
信号がパルス信号として得られることになる。
An AC input signal whose level changes discontinuously is applied to the input terminal 1. The signal amplified to a desired level by the AC amplifier 2 is exchanged into a DC voltage by the rectifier 3. Needless to say, this DC voltage changes in proportion to the AC level of the input. When the rectified DC voltage exceeds the voltage set by the reference voltage source 5, the operation of the voltage comparator 4 results in an output signal at 6. That is, the output signal is obtained as a pulse signal only during the period when the AC input level is equal to or higher than the desired level.

しかしながら、従来の構成では整流器に比較的
大容量のコンデンサC1を使用する必要があり、
かつ、コンデンサC1の放電を抵抗R1を通して
おこなうため放電時間がかかり、応答速度が遅い
という問題があつた。
However, in the conventional configuration, it is necessary to use a relatively large capacity capacitor C1 in the rectifier.
In addition, since the capacitor C1 is discharged through the resistor R1, it takes a long time to discharge the capacitor C1, resulting in a slow response speed.

この発明は、従来のものの欠点をなくし、小容
量のコンデンサを使用し、かつ、応答速度の速い
集積回路化に適した交流レベル検出回路を提供す
るものである。
The present invention provides an AC level detection circuit that eliminates the drawbacks of the conventional circuit, uses a small capacitor, and has a high response speed and is suitable for integration into an integrated circuit.

第2図に本発明の一実施例を示す。第2図にお
いて、4,5は各々従来例と同等の電圧比較器、
基準電圧源であるが、ここでは具体的な回路例と
して表わしている。7は入力を所望のレベルまで
増巾し、互いに逆相の方形波として出力するリミ
ツタ増巾器である。8はリミツタ増巾器の逆相A
および正相B出力のピークレベルを加算するため
のピーク加算器である。また、9は低域通過フイ
ルタである。なお、図中、Q1〜Q8はトランジ
スタ、R1〜R10は抵抗、C2はコンデンサで
ある。
FIG. 2 shows an embodiment of the present invention. In FIG. 2, 4 and 5 are voltage comparators equivalent to the conventional example, respectively;
Although it is a reference voltage source, it is shown here as a specific circuit example. Reference numeral 7 denotes a limiter amplifier that amplifies the input to a desired level and outputs it as square waves having mutually opposite phases. 8 is the reverse phase A of the limiter amplifier
and a peak adder for adding the peak levels of the positive phase B outputs. Further, 9 is a low pass filter. In the figure, Q1 to Q8 are transistors, R1 to R10 are resistors, and C2 is a capacitor.

第3図に第2図の各部の波形を示す。 FIG. 3 shows waveforms at various parts in FIG. 2.

以下、第2図、第3図にしたがつて動作を説明
する。入力端子1に加えられた信号は、リミツタ
増巾器7によつて、所望のレベルまで増巾され、
A,B点に互いに逆相の方形波出力が得られる。
所望のレベルに満たない信号は方形波にならな
い。このレベル設定はリミツタ増巾器7の増巾度
を変えることによつて任意に設定できる。互いに
逆相の出力A,Bはピーク加算器8によつて加算
されC点に出力が得られる。A,B点出力が理想
的な方形波であれば加算された波形は直流電圧と
なるが、実際には第3図のようなスパイクSのあ
る出力となる。出力Cを低域通過フイルタ9をも
つ電圧比較器4に加えると、スパイク成分はフイ
ルタ9によつて除かれ、出力6には所望のパルス
波形が得られることになる。また、方形波になら
ないレベルの入力が出力として表われないよう
に、基準電圧源5の電圧Vrefを設定しておくこと
は言うまでもない。
The operation will be explained below with reference to FIGS. 2 and 3. The signal applied to the input terminal 1 is amplified to a desired level by the limiter amplifier 7,
Square wave outputs with mutually opposite phases are obtained at points A and B.
Signals below the desired level will not become a square wave. This level setting can be arbitrarily set by changing the degree of amplification of the limiter amplifier 7. Outputs A and B having opposite phases to each other are added by a peak adder 8, and an output is obtained at point C. If the outputs at points A and B are ideal square waves, the added waveform will be a DC voltage, but in reality it will be an output with spikes S as shown in FIG. When the output C is applied to a voltage comparator 4 having a low-pass filter 9, the spike component is removed by the filter 9, and the desired pulse waveform is obtained at the output 6. Furthermore, it goes without saying that the voltage V ref of the reference voltage source 5 should be set so that an input at a level that does not result in a square wave does not appear as an output.

ところで、スパイク成分は入力に比較して非常
に高い周波数成分のため、R7,C2はかなり小
さい値にできる。
By the way, since the spike component is a very high frequency component compared to the input, R7 and C2 can be set to considerably small values.

また、スパイク成分が高い周波数成分であるた
め、電圧比較器4の電流I1を適当に選ぶことに
よつて、フイルタの抵抗R7は省略可能である。
また、入力周波数が1MHz以上のような使用例の
場合は、トランジスタQ7のコレクタ・エミツタ
間容量およびトランジスタQ8のベース・エミツ
タ間容量を利用してC2も省略、すなわち、低域
通過フイルタ9を省略することが可能である。
Further, since the spike component is a high frequency component, the resistor R7 of the filter can be omitted by appropriately selecting the current I1 of the voltage comparator 4.
If the input frequency is 1MHz or more, C2 can also be omitted by utilizing the collector-emitter capacitance of transistor Q7 and the base-emitter capacitance of transistor Q8, that is, omit low-pass filter 9. It is possible to do so.

以上述べたように、この発明によれば、非常に
小さい容量によつて、回路が構成でき、大きな容
量を内蔵できない集積回路に最適な回路を提供で
き、かつ、小さな容量であるため応答速度も速い
交流レベル検出回路を実現できる。
As described above, according to the present invention, a circuit can be constructed using a very small capacitance, and a circuit that is optimal for an integrated circuit that cannot incorporate a large capacitance can be provided. A fast AC level detection circuit can be realized.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の例を示す回路構成図、第2図は
本発明の一実施例を示す回路図、第3図は第2図
の各部における信号波形を示す説明図である。 図中、1は入力端子、2は増巾器、3は整流
器、4は電圧比較器、5は基準電圧源、6は出力
端子、7はリミツタ増巾器、8はピーク加算器、
9は低域通過フイルタである。なお、図中、同一
符号は同一又は相当部分を示す。
FIG. 1 is a circuit diagram showing a conventional example, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is an explanatory diagram showing signal waveforms at various parts in FIG. In the figure, 1 is an input terminal, 2 is an amplifier, 3 is a rectifier, 4 is a voltage comparator, 5 is a reference voltage source, 6 is an output terminal, 7 is a limiter amplifier, 8 is a peak adder,
9 is a low pass filter. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 交流の入力信号を所望のレベルまで増巾し、
互いに逆相の方形波を出力するリミツタ増巾器
と、このリミツタ増巾器の正相および逆相出力を
加算して、各々の最大レベルのみを取り出すピー
ク加算器と、このピーク加算器の出力を基準電圧
源と比較しピーク加算器の出力レベルに応じて出
力反転動作する電圧比較器とを備えたことを特徴
とする交流レベル検出回路。
1 Amplify the AC input signal to the desired level,
A limiter amplifier that outputs square waves with mutually opposite phases, a peak adder that adds the positive and negative phase outputs of this limiter amplifier and extracts only the maximum level of each, and the output of this peak adder. An alternating current level detection circuit comprising: a voltage comparator that compares the output level with a reference voltage source and inverts the output according to the output level of the peak adder.
JP7884182A 1982-05-08 1982-05-08 Detection circuit for ac level Granted JPS58195162A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7884182A JPS58195162A (en) 1982-05-08 1982-05-08 Detection circuit for ac level

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7884182A JPS58195162A (en) 1982-05-08 1982-05-08 Detection circuit for ac level

Publications (2)

Publication Number Publication Date
JPS58195162A JPS58195162A (en) 1983-11-14
JPH0160790B2 true JPH0160790B2 (en) 1989-12-25

Family

ID=13673042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7884182A Granted JPS58195162A (en) 1982-05-08 1982-05-08 Detection circuit for ac level

Country Status (1)

Country Link
JP (1) JPS58195162A (en)

Also Published As

Publication number Publication date
JPS58195162A (en) 1983-11-14

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