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JPH0213857B2 - - Google Patents
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JPH0213857B2 - - Google Patents

Info

Publication number
JPH0213857B2
JPH0213857B2 JP10940682A JP10940682A JPH0213857B2 JP H0213857 B2 JPH0213857 B2 JP H0213857B2 JP 10940682 A JP10940682 A JP 10940682A JP 10940682 A JP10940682 A JP 10940682A JP H0213857 B2 JPH0213857 B2 JP H0213857B2
Authority
JP
Japan
Prior art keywords
transistor
base
vertical
collector
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10940682A
Other languages
Japanese (ja)
Other versions
JPS58225718A (en
Inventor
Masaki Hosono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57109406A priority Critical patent/JPS58225718A/en
Publication of JPS58225718A publication Critical patent/JPS58225718A/en
Publication of JPH0213857B2 publication Critical patent/JPH0213857B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • H03K4/50Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor

Landscapes

  • Details Of Television Scanning (AREA)

Description

【発明の詳細な説明】 本発明はテレビジヨン受像機の垂直鋸歯状波発
生装置に関するものである。特にこの垂直鋸歯状
波発生回路と垂直出力回路が直結されている場
合、電源ラインのリツプルが増大すると、垂直ド
ライブ回路における垂直鋸歯状波波形の直流レベ
ルがリツプルと共に変化して、画面の垂直揺れと
なつて表われる。これに対し、本発明では、電源
ラインのリツプルが増大しても直流レベルが変化
しない安定な垂直鋸歯状波波形が得られ、かつこ
の垂直鋸歯状波波形が電源ラインのスイツチオン
時の立上りにすばやく追従出来るようにすること
を目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vertical sawtooth wave generator for a television receiver. In particular, when the vertical sawtooth wave generation circuit and the vertical output circuit are directly connected, when the ripples on the power supply line increase, the DC level of the vertical sawtooth waveform in the vertical drive circuit changes with the ripples, causing the screen to shake vertically. It appears as. In contrast, with the present invention, a stable vertical sawtooth waveform is obtained in which the DC level does not change even when the ripples on the power supply line increase, and this vertical sawtooth waveform quickly responds to the rise when the power supply line is switched on. The purpose is to make it possible to follow.

第1図に従来用いられてきた垂直鋸歯状波発生
回路を示す。垂直同期信号はスイツチングトラン
ジスタQ1のベースに加えられ、その出力は抵抗
R2,R3で分割され、トランジスタQ2のベースに
加えられる。垂直同期信号が入力されると、コン
デンサC1に電源VCCよりトランジスタQ2を介して
充電され、垂直同期信号がなくなるとコンデンサ
C1に充電された電荷は抵抗R4を介して放電され
る。ここで発生する鋸歯状波の上限値VHは VH=(VCC−VCE(sat)1)×R3/R2+R3−VBE2 で求められる。
FIG. 1 shows a conventionally used vertical sawtooth wave generating circuit. The vertical synchronization signal is applied to the base of switching transistor Q1 , whose output is connected to the resistor
It is divided by R 2 and R 3 and added to the base of transistor Q 2 . When a vertical synchronization signal is input, capacitor C 1 is charged from the power supply V CC through transistor Q 2 , and when the vertical synchronization signal disappears, capacitor C 1 is charged.
The charge charged in C1 is discharged through resistor R4 . The upper limit value V H of the sawtooth wave generated here is determined by V H = (V CC - V CE (sat) 1 ) x R 3 /R 2 + R 3 - V BE2 .

また下限値は抵抗R4の値で任意に決定される。
さらに、この鋸歯状波発生回路は次段の比較回
路、および垂直出力回路と直結されているため、
電源VCCが他の回路の影響をうけて揺られたとす
ると(特に音声回路の出力変化による影響を受け
やすい。)、前記鋸歯状波の上限値VHも揺られる
ことになり、鋸歯状波そのものが揺れ、最終的に
は垂直出力波形が揺られることになる。これは画
面上では垂直の揺れとなつて表われる。
Further, the lower limit value is arbitrarily determined by the value of the resistor R4 .
Furthermore, since this sawtooth wave generation circuit is directly connected to the next-stage comparison circuit and vertical output circuit,
If the power supply V CC fluctuates due to the influence of other circuits (it is particularly susceptible to changes in the output of the audio circuit), the upper limit value V H of the sawtooth wave will also fluctuate, causing the sawtooth wave to change. This will cause the vertical output waveform to oscillate. This appears as a vertical shake on the screen.

本発明は以上の様な不都合な点を改善するもの
である。第2図に本発明の一実施例を示す。
The present invention is intended to improve the above-mentioned disadvantages. FIG. 2 shows an embodiment of the present invention.

垂直同期信号がスイツチングトランジスタQ1
のベースに加えられ、コンデンサC2を充放電し
て垂直鋸歯状波を発生させているのは従来と同じ
である。
Vertical synchronization signal is switching transistor Q1
It is the same as before that the capacitor C2 is charged and discharged to generate a vertical sawtooth wave.

第2図ではさらにトランジスタQ2、ダイオー
ドD1〜D3、コンデンサC1、抵抗R3,R4によりリ
ツプルフイルターを構成している。ここでトラン
ジスタQ2のベースのバイアス回路は抵抗R3とコ
ンデンサC1より十分に時定数の長い回路として
いる。したがつて電源VCCが揺られてもトランジ
スタQ2のベース電位はほぼ固定され、よつてト
ランジスタQ1のコレクタ電位もほとんど変化し
ない。したがつて、この回路で発生する鋸歯状波
の上限値VHは VH=(VCC−3VD)×R4/R3+R4−VBE2 −VCE(sat)1−VBE4 で求められ、電源VCCが揺られてもこの上限値VH
はほとんど変化しない。ここでダイオードD1
D3を入れているのは垂直出力段の平均電圧の減
電圧特性および温度特性を考慮したためである。
In FIG. 2, a ripple filter is further constructed by a transistor Q 2 , diodes D 1 to D 3 , a capacitor C 1 , and resistors R 3 and R 4 . Here, the bias circuit at the base of transistor Q 2 has a sufficiently longer time constant than resistor R 3 and capacitor C 1 . Therefore, even if the power supply V CC fluctuates, the base potential of the transistor Q 2 is almost fixed, and the collector potential of the transistor Q 1 also hardly changes. Therefore, the upper limit value V H of the sawtooth wave generated in this circuit is V H = (V CC −3V D ) × R 4 /R 3 + R 4 −V BE2 −V CE (sat) 1 −V BE4. Even if the power supply V CC fluctuates, this upper limit value V H
remains almost unchanged. Here the diode D 1 ~
The reason for including D 3 is to take into consideration the voltage reduction characteristics and temperature characteristics of the average voltage of the vertical output stage.

ところが、この回路構成では電源スイツチオン
時においてコンデンサC1がゆつくり充電される
ため、画面上では横一スタートといつた副作用が
出てくる。
However, with this circuit configuration, capacitor C1 is slowly charged when the power is switched on, resulting in side effects such as horizontal start on the screen.

これを対策したのが、トランジスタQ3、ダイ
オードD4〜D6、抵抗R5,R6からなる回路であ
る。この回路は、電源スイツチオン時にすばやく
トランジスタQ3を介してコンデンサC1に充電す
る。またダイオードD4〜D6と抵抗R5,R6からな
るバイアス回路によりトランジスタQ3のエミツ
タの電位を抵抗R3とR4の接続点の電位より若干
低くすることにより定常状態ではトランジスタ
Q3はカツトオフにしている。ここでもダイオー
ドD4〜D6を入れているのは前記ダイオードD1
D3の場合と同じ理由からである。
A solution to this problem is a circuit consisting of a transistor Q 3 , diodes D 4 to D 6 , and resistors R 5 and R 6 . This circuit quickly charges capacitor C1 through transistor Q3 when the power supply is switched on. In addition, by using a bias circuit consisting of diodes D 4 to D 6 and resistors R 5 and R 6 to make the potential of the emitter of transistor Q 3 slightly lower than the potential of the connection point of resistors R 3 and R 4 , the transistor
Q3 is cut off. Here again, the diodes D 4 to D 6 are inserted into the diodes D 1 to D 6 .
This is for the same reason as in the case of D 3 .

以上説明した様に本発明によれば、電源ライン
のリツプルが増大しても直流レベルが変化しない
安定した垂直鋸歯状波波形が得られ、このリツプ
ルによる画面の垂直揺れをほとんどなくすことが
出来る。しかもこの垂直鋸歯状波波形が電源ライ
ンのスイツチオン時の立上りにすばやく追従出
来、出画をスムーズにすることが出来る。
As explained above, according to the present invention, it is possible to obtain a stable vertical sawtooth waveform in which the DC level does not change even if the ripples in the power supply line increase, and it is possible to almost eliminate the vertical shaking of the screen caused by the ripples. Furthermore, this vertical sawtooth waveform can quickly follow the rise of the power line when it is switched on, making it possible to output images smoothly.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来用いられてきた垂直鋸歯状波発生
装置の回路図、第2図は本発明の一実施例におけ
る垂直鋸歯状波発生装置の回路図である。 Q1……スイツチングトランジスタ、Q2……リ
ツプルフイルターを構成するトランジスタ、Q3
Q4……トランジスタ、C2……鋸歯状波発生用コ
ンデンサ。
FIG. 1 is a circuit diagram of a conventional vertical sawtooth wave generator, and FIG. 2 is a circuit diagram of a vertical sawtooth wave generator according to an embodiment of the present invention. Q 1 ... Switching transistor, Q 2 ... Transistor constituting a ripple filter, Q 3 ,
Q 4 ...transistor, C 2 ...capacitor for sawtooth wave generation.

Claims (1)

【特許請求の範囲】[Claims] 1 垂直同期信号を第1のトランジスタのベース
に入力し、この第1のトランジスタのベースとエ
ミツタ間に第1の抵抗を、コレクタとアース間に
第2の抵抗を各々接続し、第2のトランジスタの
コレクタは電源ラインに、エミツタは前記第1の
トランジスタのコレクタに、ベースは第1のバイ
アス回路に各々接続し、第3のトランジスタのコ
レクタは前記電源ラインに、エミツタは前記第2
のトランジスタのベースとかつ第1のコンデンサ
を介してアースに、ベースは第2のバイアス回路
に各々接続し、第4のトランジスタのコレクタは
前記電源ラインに、ベースは前記第1のトランジ
スタのコレクタに、エミツタは第3の抵抗と第2
のコンデンサの並列回路を介してアースに各々接
続したことを特徴とする垂直鋸歯状波発生装置。
1. Input a vertical synchronizing signal to the base of the first transistor, connect a first resistor between the base and emitter of this first transistor, connect a second resistor between the collector and ground, and connect the second resistor to the base of the first transistor. has a collector connected to the power supply line, an emitter connected to the collector of the first transistor, and a base connected to the first bias circuit, a collector of the third transistor connected to the power supply line, and an emitter connected to the second transistor.
The base of the fourth transistor is connected to the ground via the first capacitor, the base is connected to the second bias circuit, the collector of the fourth transistor is connected to the power supply line, and the base is connected to the collector of the first transistor. , the emitter is the third resistor and the second
A vertical sawtooth wave generator characterized in that each of the capacitors is connected to ground through a parallel circuit of capacitors.
JP57109406A 1982-06-24 1982-06-24 Vertical sawtooth wave generator Granted JPS58225718A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57109406A JPS58225718A (en) 1982-06-24 1982-06-24 Vertical sawtooth wave generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109406A JPS58225718A (en) 1982-06-24 1982-06-24 Vertical sawtooth wave generator

Publications (2)

Publication Number Publication Date
JPS58225718A JPS58225718A (en) 1983-12-27
JPH0213857B2 true JPH0213857B2 (en) 1990-04-05

Family

ID=14509434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57109406A Granted JPS58225718A (en) 1982-06-24 1982-06-24 Vertical sawtooth wave generator

Country Status (1)

Country Link
JP (1) JPS58225718A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2531632B2 (en) * 1986-07-24 1996-09-04 日本電気ホームエレクトロニクス株式会社 Sawtooth wave generator
DE102009018996B3 (en) * 2009-04-27 2010-04-29 Siemens Aktiengesellschaft Circuit for switching capacitive loads

Also Published As

Publication number Publication date
JPS58225718A (en) 1983-12-27

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