JPH0242260B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a signal synchronization circuit for a wired or wireless secret signal system.

In wired or wireless communication, there is a problem in that the content of the communication can be intercepted by anyone if an appropriate receiving device is used. Therefore, special signal processing is applied to the transmitted signal so that even if it is intercepted, the content cannot be understood, so that only a specific receiver who has the means to reproduce the processed signal can receive it. Circuit schemes are used as needed. The present invention provides a signal synchronization circuit for this confidential communication system.

(B) Conventional technology Conventionally, as shown in Fig. 1, a base unit (B; Base) 1
and a slave unit (P; Portable) 2. In the cordless telephone 3, a base unit 1 is connected to an exchanger (Ex) 4 of a central office via a subscriber line 1 of a telephone line, and a wireless connection is established between the base unit and a portable handset, that is, a handset 2. Communication is carried out, and by using the transmitter and handset of the handset 2, you can talk to a desired destination connected to the telephone line 1. By carrying the handset, you can make cordless calls from any desired location. can be done.

In this cordless telephone, if the frequency of the carrier wave used for communication between the base unit and the slave unit is the same as that of a cordless telephone owned by a third party, problems of attempted theft and missed calls (lack of confidentiality) occur. The usable frequency band is restricted due to the connection with other wireless devices, and it is practically difficult to change the carrier frequency for each cordless telephone. In reality, only five types of carrier waves are used, and the above-mentioned problem is likely to occur.

Now, as shown in Fig. 2, if Party A sends a message using the handset of handset 2 in order to make a call to Party B's cordless telephone 1', a third party's (C) cordless telephone 1' and If the carrier frequencies are the same, operate the base unit of C. In this case,
This problem does not exist if C's base unit 1'' is outside the usable range (communicable distance; usually within 100 to 200 m) of A's cordless telephone.

Now, when C's base unit 1'' starts working, C's telephone line
A situation has arisen where Party A and Party B can talk through
The problem of billing for telephone usage arises. Cordless telephones transmit a pilot signal superimposed on the outgoing voice signal, and the base unit detects this pilot signal and turns on a relay to establish a connection with the telephone line (this relay is used for general standard telephones). (equivalent to a telephone switch that connects to a telephone line when you pick up the handset). Therefore, as a measure to prevent plagiarism, which poses the problem of billing, it is sufficient to key code the frequency and waveform of this pilot signal.

However, even in this case, there remains a problem regarding guaranteeing so-called confidentiality against leakage of telephone calls.
Even if C's base unit 1'' does not operate due to A's handset 2, since the audio signal is being sent from A's base unit 1 while A and B are talking, this is C's base unit 2''. It is possible to receive by. That is, in addition to the received signal from Party B, the voice signal from Party A includes information on the outgoing signal from Party A, called sidetone, and Party C can eavesdrop on the entire contents of the call.

In order to prevent such eavesdropping and maintain confidentiality, it is effective to scramble the audio in the transmitter and restore it in the receiver. According to this method, a third party (C) who is not equipped with a restoration circuit and a third party (C) who is equipped with a restoration circuit but whose key code is different
The contents of the call cannot be understood.

Conventionally, balance modulator type circuit elements are generally commercially available as confidential communication circuits for such purposes. In this method, the frequency of the audio signal is inverted before being transmitted, and the frequency is restored upon reception. Although this method is effective for third parties that do not have a restoration circuit, it has the disadvantage that it is not effective against third parties that have the same type of restoration circuit because key codes cannot be multiplied.

Therefore, the present applicant previously proposed Japanese Patent Application No. 57-164763 entitled ``Secret Communication Method and Apparatus'' dated September 20, 1981. That is, we have proposed a method for compressing and expanding the time axis of an audio signal and transmitting it as a method that has a relatively simple circuit scale and high confidential speech performance. Furthermore, on October 20, 1981, he proposed Patent Application No. 184916 ``Clock circuit for confidential communication system''.
The confidential communication method of the applicant's earlier application can use a large number of key codes.

(c) Purpose The present invention provides a signal synchronization circuit for a confidential communication system that is a more specific improvement on the technology of the prior application.

(d) Configuration First, the basic circuit of the circuit of the present invention will be explained with reference to FIG. FIG. 3 shows an example of a scrambling circuit and a restoring circuit. That is, a case is shown in which a scrambled audio signal is transmitted from the base side 1 in FIG.

The basic configuration of the base unit 1 in Figure 3a is BBD
A delay circuit 5 consisting of a Bucket Brigade Device, a selection circuit 6 for clock pulses 1 and 2, a counter 7 that controls the selection circuit, a sync.signal generator 8, and a synthesis circuit. (Adder) 9, Modulation Circuit
10, and a transmitter 11. The handset 2 in FIG. 3b also includes a receiving section 12 consisting of a high frequency amplification stage, a local oscillation stage, a mixing stage and an intermediate frequency amplification stage, a demodulation circuit 13, a filter circuit 14, It consists of a selection circuit 15 for clock pulses 1 and 2, and a BBD delay circuit 16.

The basic operation of the circuit shown in FIG. 3 will be explained below. In this method, two types 1 and 2 are used as the frequency of the clock pulse CP for BBD5 control,
Each time the control counter clocks N=(number of delay stages of BBD)/2, the clock pulse selection circuit 6 switches between 1 and 2.

Next, why is the maximum count value N of control counter 7?
We will explain how to reduce the number of delay stages to 1/2 of BBD5.

In this secret speech circuit, the audio signal input to the variable delay circuit is delayed by N stages (N clocks are input), and then
When the clock is output, the frequency of the clock is switched every N clocks. In this case, the audio signal input to the variable delay circuit with a frequency of ₁ changes to the frequency after N stages of delay.
₂ , so the frequency of the audio signal is ₂ /
The output is changed by a factor of ₁ (see Figure 9).

Here, when a BBD is used as a variable delay circuit, and the number of delay stages of the BBD is k, the audio signal input to the BBD is output after k/2 stages (k/2 clocks are input). The reason is as follows. That is, as shown in FIG. 10 which qualitatively shows the operation, BBD consists of two delay elements A and B as a pair.
constitute one delay element, and when clock q is input, _elements B _{1 ,} . . .
₂ ,... becomes lower, and the information _C1 , _C2 ... stored in elements _A1 , _A2 ... is transferred to elements _B1 , _B2 .... In FIG. 10a, elements B ₁ , B ₂ and B ₃ have no charge. In addition, in FIG. 1B, the charge is transferred from element A to B, so elements A ₁ , A ₂ , and A ₃ do not have charge. Next, when clock Q (inversion of clock q) is input, the levels of elements B ₁ , B ₂ . . . become higher, as shown in FIG _.
C ₂ ... moves (shifts) to elements A ₂ , A ₃ .... In C of the same figure, charges are transferred from elements B ₁ , B ₂ . . . to A ₂ , A _{3 .} . . , and B ₁ , B _{2 .} . . have no charge. This situation resembles a bucket brigade. Every time one clock is input here, the information C shifts from Aj to Aj+1. Furthermore, since clock Q is the inverse of q, it is not included in the number of input clocks. In BBD, the number of delay stages is displayed including both elements A and B, so the net number of delays is 1/2 of the number of delay stages.

The information shifting operation inside the BBD is the 10th
As shown in the figure, the input/output operations of the BBD are as follows. In other words, the input signal written to the BBD by a clock with a frequency of ₁ is shifted for each clock input (shifted by two stages in a bucket brigade style as described above), and N = (number of delay stages of BBD/
2) When the +1st clock is input, it is output from the BBD, but since the frequency of the clock is switched every N clocks, the clock with frequency ₂ is output. Also, an audio signal input with a clock with a frequency of ₂ will be output with a frequency of ₁ .

The audio signal that is now input to the BBD circuit 5 of the base unit
In is sampled at frequency 1 and memorized to BBD5. After the clock pulse (frequency 1) is counted N by the control counter 7, this signal becomes
Output from BBD. At this time, the clock pulse
The frequency of CP1 is switched to 2, and at this timing the signal memorized in BBD5 is changed to BBD.
is output from. Therefore, the audio signal is memorized at frequency 1 and output at frequency 2, so the frequency of the audio signal is subjected to time axis conversion, and the audio signal output from BBD has a frequency of m = 2/2 compared to the original audio signal. Converted to 1x. Conversely, it is memorized with 2,
When outputting at 1, the frequency is converted to 1/m times. Therefore, since conversion operations of m times the frequency and 1/m times the frequency are performed periodically, the output signal of the BBD 5 of the base unit has the waveform shown in FIG. 4 for, for example, a sine wave input signal. If a synchronization signal for the switching timing of the clock pulse frequency on base unit 1 is sent to slave unit 2 to synchronize the switching operation of the slave unit with that of the base unit, the slave unit will also be multiplied by m and 1/m. Repeat the frequency conversion of In this case, as shown in Figure 5,
Since the audio signal is delayed by N clocks by the BBD5, the signal converted by m times by the BBD5 of the base unit is converted by exactly 1/m times by the slave unit 2, so that it is converted to the original frequency. Similarly, what is converted by 1/m in the parent device is converted into m times in the slave device. In Fig. 5, a is the input original signal In, and b is the BBD of the base unit.
5, c is a restored signal restored by BBD 16 of the slave unit, and d is a clock frequency used for signal processing of BBD 5 and 16, respectively.

At this time, if the handset clock frequencies 1' and 2' differ from the master clock frequencies 1 and 2, the original audio signal will not be restored. Therefore, the key code can be multiplied by a combination of 1 and 2. For example, set the clock frequency to 1 or 2 for case A, and set the clock frequency for case C to 1 or 2.
Even in the case where m=2/1=2'/1' for 1' and 2', experiments have shown that if 1' differs from 1 by 5% or more, a practically sufficient scrambling effect can be obtained. Therefore, in this case, approximately 16 frequencies can be used per octave for 1, and the usable clock frequency range of BBD is quite wide from 10KHz to 200KHz, so a large number of key codes can be used. . Moreover, the number of key codes can be further increased by further changing the value of m. As described above, by using this secret message circuit, not only a third party C who is not equipped with a BBD restoration circuit, but also a large number of key codes can be obtained, so that secret information can be sufficiently retained.

Now, in the case of this secret circuit system, it is very important to exactly synchronize the switching of the clock frequency in the slave unit with that of the base unit. The synchronization signal is normally transmitted in a superimposed manner with the audio signal, and it is necessary to separate the audio signal and the synchronization signal in the handset.

The simplest method is to simply superimpose the output of the control counter on the base unit onto the audio signal, detect this signal on the slave unit, and switch the clock frequency, but this method has the following drawbacks: . That is, (a) Since the falling (or rising) characteristic of the control counter 7 of the base unit is steep, the spectrum of this synchronization signal has a wide spectrum at the base, and is therefore superimposed on the spectrum of the audio signal. This component cannot be separated from the audio signal by filter processing in the handset, and deteriorates the reproduced sound quality.

(b) In order to improve the separation from the audio signal, the control counter output can be further processed by a filter so that the spectrum does not overlap with the audio spectrum band, but in this case, a sharp falling (or rising) ) characteristics are not obtained, the synchronization timing is delayed, and the audio signal connection does not go well when restoring the signal or switching.

(c) When noise gets mixed in, it is easily affected by it and synchronization errors occur.

The present invention takes these drawbacks into consideration and provides an improved synchronization method. The present invention will be explained in detail below.

The synchronization method according to the present invention is shown in FIG. Figure a shows the master unit, and figure b shows the slave unit. Further, the signal waveform is shown in FIG. A signal obtained by gate-controlling the output of the single frequency oscillator 17 (see FIG. 7b) by the output of the clock pulse switching control counter 7 of the BBD 5 (see FIG. 7a) is further passed through a filter (HPF or BPF) 18. The processed signal is superimposed on the audio signal (after the scrambling process) and transmitted as a synchronizing signal in the synthesis circuit 9 as shown in FIG. The frequency of the oscillator 17 is 5 to 10 KHz, considering the band required for audio reproduction (usually 300 to 3.4 KHz).
Approximately Hz is appropriate. As shown in FIG. 7b, the spectrum of the output signal of the gate-controlled oscillator 17 has its center frequency at the frequency of the oscillator, which is sufficiently high compared to the audio signal, but the tail of the spectrum is superimposed on the audio spectrum. Filter 18 processing is applied to prevent this. In this case, due to the filter, the envelope of the rising portion is not steep, but has a slightly rounded shape, as shown in FIG. 7c. This figure 7c
A signal as shown in FIG. 1 is superimposed on the audio signal and transmitted as a synchronization signal.

On the other hand, in the handset, after separating the synchronization signal superimposed on the audio signal by the filter 19, when an input signal as shown in FIG. 7d is applied to the input of the comparator 20, a pulse train as shown in FIG. 7e is generated. can get. Further, when this pulse train signal is supplied to the synchronous trigger generation circuit 21, a single pulse synchronized with the rise of the first pulse output from the comparator 20 is obtained. Although noise N and the audio signal level as shown in FIG. 7d are superimposed on the input signal of the comparator 20, since the reference voltage E1 of the comparator 20 is set high, the influence of noise etc. can be suppressed. Further, the output of the comparator is output in the form of a large number of pulse trains as shown in FIG. 7e.

Now, the basic concept of the synchronization method in the present invention is that the timing of the first rise of the pulse train of the output signal of the comparator 20 [FIG. 7e] causes the synchronization trigger generation circuit 21 to generate a signal as shown in FIG. 7f. When a preset pulse signal is generated, this preset pulse signal presets (or resets) the control counter 22 separately provided in the handset 2, and the output of this control counter 22 switches the clock frequency CP2 and synchronizes. The aim is to

Since the synchronization signal is filtered by the master unit and slave unit, the comparator output [Figure 7e]
The timing of the first pulse is slightly delayed from the fall timing of the control counter 7 of the parent device. The preset P operation of the control counter 22 of the slave unit has the effect of compensating for this time delay Δt, and the output of the control counter 22 of the slave unit is
As shown in FIG. g, the output matches the output of the control counter 7 of the base unit, and synchronization can be achieved.

Next, this operation will be explained in more detail. That is, when the synchronization signal passes through a transmission path with a limited band, it forms an envelope as shown in FIG. 7c, which delays the time at which the synchronization trigger can be detected. Therefore, the first
As shown in Figure 1, the number of clocks h within the time delay Δt
If the counter (2N base ₎ 22 is preset to the value of (h = △t It is possible to compensate for synchronization timing shifts caused by In addition, the same figure c
shows the situation when the counter 22 is not preset, and is out of synchronization.

Next, in order to obtain the preset synchronization trigger pulse [Fig. 7f] from the pulse train that is the comparator output, the output of the comparator 20 is supplied to the integrating circuit 23 as shown in Fig. 8. A pulse is obtained, and when this signal is further passed through a short pulse generation circuit 27 consisting of an inverting amplifier 24, an integrating circuit 25, and an AND circuit 26, a synchronous trigger signal for presetting the control counter 22 [FIG. 7f] is obtained. . Then, by adjusting the number of presets as described above, the control counter 22 of the slave unit
The output [Fig. 7g] can be synchronized at the same timing as the main unit [Fig. 7a].

In the above description, an example is described in which the synchronous trigger generation circuit 21 generates a preset pulse signal as shown in FIG. 7f based on the timing of the first rising edge of the pulse train of the output signal of the comparator 20 [FIG. 7e]. However, it goes without saying that the same objective can be achieved by using a desired pulse in the pulse train of FIG. 7e.

In the present invention, since the comparator 20 uses a relatively high level as the comparison reference voltage, it is possible to eliminate the influence of noise superimposed on the synchronization signal (FIG. 7d). Also, the first comparator output
The influence of noise on the pulse rise timing is also small. Furthermore, since the influence on the audio signal spectrum is reduced by the filter 18 before superimposition with the audio signal, separation is easy, and the time delay associated with filter processing is compensated for by preset processing. ing. In the above description, an example has been described in which the synchronization signal is generated on the base unit side, but it is also possible to generate the synchronization signal on the slave unit side.

(E) Effect As described above, the present invention provides a reliable synchronization circuit in a scrambling circuit using a delay circuit that can take a large number of key codes, and by using this synchronization circuit, the original signal can be completely and completely synchronized. It is possible to reliably restore data, and it is possible to make calls with guaranteed privacy using a cordless telephone, which is very useful in practice.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional cordless telephone, Fig. 2 is a diagram showing the route of missed calls in the same circuit, and Fig. 3 is a block diagram for explaining the basic principle of the synchronous circuit of the confidential communication system of the present invention. , 4th
The figure shows a signal scrambled by the circuit of Fig. 3, Fig. 5 is a drawing for explaining the basic operation of the circuit of Fig. 3, and Fig. 6 shows a signal synchronization circuit of the secure communication system of the present invention. 7 is a diagram showing the signal waveforms of FIG. 6, and FIG. 8 is a specific embodiment of the synchronization trigger generation circuit shown in FIG. 6. Fig. 9 is a drawing showing the write and read pulses of the BBD, Fig. 10 is a drawing showing how information shifts inside the BBD, and Fig. 11 is a drawing showing the state of information shifting inside the BBD.
The figure is a diagram for explaining the preset operation by the counter. 1, 1', 1''...Main unit, 2, 2', 2''...Slave unit, 5, 16...Delay circuit, 6, 15...Clock pulse selection circuit, 7, 22...Control circuit, 8 …
...Synchronizing signal generation circuit, 9...Synthesizing circuit, 10...
Modulation circuit, 11... Transmission circuit, 12... Receiving circuit, 13... Demodulation circuit, 14, 18, 19... Filter circuit, 17... Synchronization signal generation circuit, 20...
... Comparator, 21 ... Synchronous trigger generation circuit,
23...Integrator circuit, 27...Short pulse generation circuit.

Claims (1)

[Claims] 1. The transmitter side is equipped with a variable delay circuit for a signal whose delay time can be controlled by a clock, and the variable delay circuit is connected to the first
The transmission signal is controlled by a second clock to alternately compress and expand the time axis of the transmission signal and send it out, and the delay circuit on the receiver side also has a variable delay circuit for the signal that can be controlled by the clock. A confidential signal system for restoring the original signal by alternately temporally expanding and compressing the time axis of the received signal by clock-controlling the variable delay circuit at the same time as the transmitting side. On the machine side, first and second clock signal generation circuits for clock control of the variable delay circuit, a control circuit for counting clocks corresponding to the maximum number of delay stages of the variable delay circuit, and an output of the control circuit are provided. A clock selection circuit that selects the first and second clocks, and a synchronization signal generation circuit that generates a synchronization signal of a predetermined frequency, the output of the synchronization signal frequency oscillation circuit being gate-controlled by the output of the control circuit. The transmission signal is superimposed on the transmission signal and transmitted, and on the receiver side, the transmission signal and the synchronization signal are separated by a filter circuit, a pulse train is generated in response to the separated synchronization signal, and the first pulse train of the pulse train is generated. In response to the time difference between the second pulse and the rise or fall of the output gate pulse of the control circuit on the transmitter side, the control circuit of the clock selection circuit on the receiver side is preset by the number of clocks corresponding to the time difference. 1. A signal synchronization circuit for a confidential communication system, characterized in that switching times of first and second clock pulses on a transmitter side and a receiver side are synchronized by synchronizing the switching times of the first and second clock pulses on the transmitter side and the receiver side.