JPH0249013B2 - - Google Patents
Info
- Publication number
- JPH0249013B2 JPH0249013B2 JP56156494A JP15649481A JPH0249013B2 JP H0249013 B2 JPH0249013 B2 JP H0249013B2 JP 56156494 A JP56156494 A JP 56156494A JP 15649481 A JP15649481 A JP 15649481A JP H0249013 B2 JPH0249013 B2 JP H0249013B2
- Authority
- JP
- Japan
- Prior art keywords
- gold
- gold paste
- paste layer
- adhesive
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/011—Apparatus therefor
- H10W72/0113—Apparatus for manufacturing die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
Landscapes
- Die Bonding (AREA)
Description
【発明の詳細な説明】
本発明は半導体パツケージの製造方法に関する
ものであり、更に詳しくはセラミツクパツケージ
の基板の凹部に金膜を形成する方法において、金
膜の厚さを均一にし、容易に大量生産し得る方法
を提供せんとするものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor package, and more specifically, a method for forming a gold film in a recessed part of a substrate of a ceramic package, in which the thickness of the gold film is made uniform and the gold film can be easily manufactured in large quantities. The aim is to provide a method that can be used for production.
従来、半導体素子を搭載する半導体パツケージ
としては、セラミツク基板に凹部を設け該凹部の
底面に金膜を形成したものがある。この金膜の形
成方法としてはスクリーン印刷によつて金ペー
スト層を凹部底面に形成し、焼成する方法。滴
下によつて金ペースト層を形成する方法があつ
た。しかしながらの方法では、凹部への直接印
刷が困難なため金ペースト層の膜厚が不均一にな
り易い。これは凹部が深くなる程顕著である。又
の方法では凹部の側面にも金ペーストが付着し
易く、搭載後の半導体素子の回路に悪影響を与え
ることが少なくない。又滴下量が一定になりにく
いため膜厚が不均一になる等の欠点があつた。 Conventionally, as a semiconductor package on which a semiconductor element is mounted, there is one in which a recess is provided in a ceramic substrate and a gold film is formed on the bottom surface of the recess. The method for forming this gold film is to form a gold paste layer on the bottom of the recess by screen printing and then bake it. There was a method of forming a gold paste layer by dripping. However, with this method, the thickness of the gold paste layer tends to be non-uniform because it is difficult to directly print onto the recesses. This becomes more noticeable as the recess becomes deeper. In other methods, the gold paste tends to adhere to the side surfaces of the recessed portions, which often has an adverse effect on the circuitry of the semiconductor element after it is mounted. Further, there were drawbacks such as non-uniform film thickness because the amount of dropping was difficult to keep constant.
本発明者らは以上のような従来法の諸欠点に鑑
みて種々研究考察した結果、本発明を完成するに
至つたものである。即ち本発明は、離型性を有す
る基体シート１上に接着性を有する金ペースト層
２を設けてなる転写材を用いて、セラミツク基板
３上に設けられた凹部４の底面に金ペースト層２
を形成した後、焼成して金皮膜５を形成すること
を特徴とする半導体パツケージの製造方法であ
る。 The present inventors have completed the present invention as a result of various research and considerations in view of the various drawbacks of the conventional methods as described above. That is, the present invention uses a transfer material in which a gold paste layer 2 having an adhesive property is provided on a base sheet 1 having a releasable property, and a gold paste layer 2 is provided on the bottom surface of a recess 4 provided on a ceramic substrate 3.
This method of manufacturing a semiconductor package is characterized in that after forming a gold film 5, a gold film 5 is formed by firing.
以下、本発明について更に詳しく説明する。 The present invention will be explained in more detail below.
まず、本発明において用いる転写材について説
明する（第１図参照）。転写材は離型性を有する
基体シート１および接着性を有する金ペースト層
２より構成される。離型性を有する基体シート１
としては例えばポリエチレンテレフタレート等の
フイルムを使用する。必要に応じて該フイルムに
メラミン樹脂を用いて離型処理を施したり、フイ
ルム上にワツクスよりなる離型層或いはアクリル
樹脂よりなる剥離層を設けてもよい。 First, the transfer material used in the present invention will be explained (see FIG. 1). The transfer material is composed of a base sheet 1 having releasability and a gold paste layer 2 having adhesive properties. Base sheet 1 with mold releasability
For example, a film such as polyethylene terephthalate is used. If necessary, the film may be subjected to a release treatment using a melamine resin, or a release layer made of wax or a release layer made of acrylic resin may be provided on the film.
接着性を有する金ペースト層２は、金ペースト
及び接着剤を含む混合物により構成されるか又は
金ペーストを主成分とする層及び接着剤層が積層
されて構成される。使用する金ペーストは例えば
金粉末20〜90重量％、ガラス分及び無機物0.2〜
20重量％、残部は有機物でペースト状又は液状に
したものを用いる。金ペースト層の作製に際して
は、スクリーン印刷、グラビア印刷等の印刷手段
にて離型性を有する基体シート１上の形成する。
尚、接着剤としては感熱性接着剤を用いるのが好
ましい。 The adhesive gold paste layer 2 is composed of a mixture containing gold paste and an adhesive, or is composed of a layer containing gold paste as a main component and an adhesive layer stacked together. The gold paste used is, for example, gold powder 20-90% by weight, glass content and inorganic matter 0.2-90% by weight.
20% by weight, the remainder being organic matter in paste or liquid form. When producing the gold paste layer, it is formed on the base sheet 1 having mold releasability by printing means such as screen printing and gravure printing.
Note that it is preferable to use a heat-sensitive adhesive as the adhesive.
以上のような転写材を用いて金ペースト層２を
セラミツク基板３上に設けられた凹部４の底面に
転写する（第２図参照）。転写は前記転写材を金
ペースト層２が凹部４に位置するように載置し、
しかる後、例えばゴム製の加圧体８を加熱したも
のを用いて加熱加圧し、金ペースト層２のみを凹
部４の底面に転写せしめる。このときの加熱は
160〜180℃の温度が好ましい。 The gold paste layer 2 is transferred onto the bottom surface of the recess 4 provided on the ceramic substrate 3 using the transfer material as described above (see FIG. 2). For the transfer, place the transfer material so that the gold paste layer 2 is located in the recess 4,
Thereafter, the gold paste layer 2 alone is transferred to the bottom surface of the recess 4 by applying heat and pressure using a heated pressurizing body 8 made of rubber, for example. The heating at this time is
A temperature of 160-180°C is preferred.
金ペースト層２を転写した後、焼成して金膜５
を形成する。焼成は800〜900℃で行う。 After transferring the gold paste layer 2, it is fired to form a gold film 5.
form. Firing is performed at 800-900°C.
本発明は以上のような半導体パツケージの製造
方法であるから、均一な厚さの金膜を凹部の底面
に対して一定した位置に形定することができる。
又、凹部の底面積に対してほぼ同じ面積の金皮膜
を形成でき、しかも凹部側面に金ペーストが付着
することもなく品質の優れた製品を得ることがで
きる。更に転写工程も簡単な手段によつてできる
ものであり、又転写材が所謂ウエツトな材料では
ないから品質管理、取扱いが容易であるから大量
生産に適した方法である。 Since the present invention is a method of manufacturing a semiconductor package as described above, a gold film having a uniform thickness can be formed at a constant position with respect to the bottom surface of a recess.
Furthermore, it is possible to form a gold film with approximately the same area as the bottom area of the recess, and to obtain a product of excellent quality without the gold paste adhering to the side surfaces of the recess. Furthermore, the transfer process can be carried out by simple means, and since the transfer material is not a so-called wet material, quality control and handling are easy, making this method suitable for mass production.
以下本発明はの実施例について説明する。 Examples of the present invention will be described below.
実施例 １
ポリエチレンテレフタレートフイルム上にメラ
ミン樹脂を用いて離型層を設け、その上に下記の
組成よりなる金ペースト層をスクリーン印刷にて
形成し、更にその上にポリアミド系樹脂よりなる
接着剤を用いて接着剤層を設けた。Example 1 A release layer was provided on a polyethylene terephthalate film using melamine resin, a gold paste layer having the composition shown below was formed on top of it by screen printing, and an adhesive made of polyamide resin was further applied on top of it by screen printing. An adhesive layer was provided using the following method.
金ペースト層のペースト状の配合例を掲げる。 An example of the paste-like composition of the gold paste layer is shown below.
金粉末 60（wt％） 平均粒径2μ
ガラス粉末 ６（wt％）
（70％Pbo、15％B2O3、15％SiO2）
ベクヒル 34（wt％） 10％エチルセルロース
90％ブチル・カルビトールアセテート
パターン面積 3.2×2.3mm
金ペースト層 10μ（焼成厚み5μ）
上記の転写材を用いてセラミツク基板上の凹部
（3.5×2.5mm）の底面に下記の転写条件で金ペー
スト層を転写した。しかる後、下記の条件で焼成
し凹部底面に均一な厚さの金膜を形成した半導体
パツケージを得た。Gold powder 60 (wt%) Average particle size 2μ Glass powder 6 (wt%)
(70% Pbo, 15% B 2 O 3 , 15% SiO 2 ) Bekhil 34 (wt%) 10% ethyl cellulose 90% butyl carbitol acetate Pattern area 3.2 x 2.3 mm Gold paste layer 10μ (fired thickness 5μ) Above A gold paste layer was transferred to the bottom of a recess (3.5 x 2.5 mm) on a ceramic substrate using a transfer material under the following transfer conditions. Thereafter, it was fired under the following conditions to obtain a semiconductor package in which a gold film of uniform thickness was formed on the bottom surface of the recess.
転写条件
転写温度 180℃
転写時間 0.8sec
焼成条件
焼成温度 850℃5min保持
焼成時間 55min
実施例 ２
ポリエチレンテレフタレートフイルム上にワツ
クスよりなる離型層を設け、その上にアクリル系
樹脂よりなる剥離層を設け、更に下記組成の金ペ
ースト層及びアクリル系樹脂よりなる接着剤層を
順次積層した。Transfer conditions Transfer temperature 180℃ Transfer time 0.8sec Firing conditions Firing temperature 850℃Holded for 5 minutes Firing time 55min Example 2 A release layer made of wax was provided on a polyethylene terephthalate film, and a release layer made of acrylic resin was provided on top of it. Furthermore, a gold paste layer having the following composition and an adhesive layer made of an acrylic resin were sequentially laminated.
金ペースト層のペースト状の配合例を掲げた。 An example of a paste-like formulation of the gold paste layer is listed.
金粉末 60（wt％） 平均粒径2μ
ガラス粉末 ６（wt％）
（70％Pbo、15％B2O3、15％SiO2）
ベクヒル 34（wt％） 10％エチルセルロース
90％ブチル・カルビトールアセテート
パターン面積 3.2×2.3mm
金ペースト層 10μ（焼成厚み5μ）
上記の転写材を用いてセラミツク基板上の凹部
（3.5×2.5mm）の底面に下記の転写条件で金ペー
スト層を転写した。しかる後、下記の条件で焼成
し凹部底面に均一な厚さの金膜を形成した半導体
パツケージを得た。Gold powder 60 (wt%) Average particle size 2μ Glass powder 6 (wt%)
(70% Pbo, 15% B 2 O 3 , 15% SiO 2 ) Bekhil 34 (wt%) 10% ethyl cellulose 90% butyl carbitol acetate Pattern area 3.2 x 2.3 mm Gold paste layer 10μ (fired thickness 5μ) Above A gold paste layer was transferred to the bottom of a recess (3.5 x 2.5 mm) on a ceramic substrate using a transfer material under the following transfer conditions. Thereafter, it was fired under the following conditions to obtain a semiconductor package in which a gold film of uniform thickness was formed on the bottom surface of the recess.
転写条件 転写温度 180℃ 転写時間 0.8sec 焼成条件 焼成温度 850℃5min保持 焼成時間 55minTransfer conditions Transfer temperature 180℃ Transfer time 0.8sec Firing conditions Firing temperature held at 850℃ for 5 minutes Baking time 55min
第１図は本発明において使用する転写材の部分
拡大断面図、第２図は本発明における転写工程を
示す拡大断面図、第３図は本発明にかかる製造方
法によつて得られた半導体パツケージの一実施例
の拡大断面図を各々示す。
図中、１……離型性を有する基体シート、２…
…接着性を有する金ペースト層、３……セラミツ
ク基板、４……凹部、５……金膜、８……加圧
体。
FIG. 1 is a partially enlarged sectional view of the transfer material used in the present invention, FIG. 2 is an enlarged sectional view showing the transfer process in the present invention, and FIG. 3 is a semiconductor package obtained by the manufacturing method according to the present invention. FIG. 6 shows enlarged cross-sectional views of one embodiment of the invention. In the figure, 1... base sheet having mold releasability, 2...
... Gold paste layer having adhesive properties, 3 ... Ceramic substrate, 4 ... Recessed portion, 5 ... Gold film, 8 ... Pressure body.
Claims (1)
る金ペースト層を設けてなる転写材を用いて、セ
ラミツク基板上に設けられた凹部の底面に金ペー
スト層を形成した後、焼成して金膜を形成するこ
とを特徴とする半導体パツケージの製造方法。 ２ 接着性を有する金ペースト層が金ペースト及
び接着剤を含む混合物により構成されたものであ
ることを特徴とする特許請求の範囲第１項記載の
半導体パツケージの製造方法。 ３ 接着性を有する金ペースト層が金ペーストを
主成分とする層及び接着剤層が積層したものであ
ることを特徴とする特許請求の範囲第１項記載の
半導体パツケージの製造方法。[Claims] 1. A gold paste layer is formed on the bottom surface of a recess provided on a ceramic substrate using a transfer material in which a gold paste layer with adhesive properties is provided on a base sheet with mold releasability. 1. A method for manufacturing a semiconductor package, characterized in that the semiconductor package is then fired to form a gold film. 2. The method of manufacturing a semiconductor package according to claim 1, wherein the adhesive gold paste layer is composed of a mixture containing gold paste and an adhesive. 3. The method for manufacturing a semiconductor package according to claim 1, wherein the gold paste layer having adhesive properties is a lamination of a layer containing gold paste as a main component and an adhesive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56156494A JPS5857730A (en) | 1981-09-30 | 1981-09-30 | Manufacture of semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56156494A JPS5857730A (en) | 1981-09-30 | 1981-09-30 | Manufacture of semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5857730A JPS5857730A (en) | 1983-04-06 |
| JPH0249013B2 true JPH0249013B2 (en) | 1990-10-26 |
Family
ID=15628973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56156494A Granted JPS5857730A (en) | 1981-09-30 | 1981-09-30 | Manufacture of semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5857730A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6063939A (en) * | 1983-05-20 | 1985-04-12 | Tomoegawa Paper Co Ltd | Method of forming semiconductor fixing film on ceramic-sealed substrate |
| CA1222071A (en) * | 1984-01-30 | 1987-05-19 | Joseph A. Aurichio | Conductive die attach tape |
| US4959008A (en) * | 1984-04-30 | 1990-09-25 | National Starch And Chemical Investment Holding Corporation | Pre-patterned circuit board device-attach adhesive transfer system |
| KR100333452B1 (en) | 1994-12-26 | 2002-04-18 | 이사오 우치가사키 | Film-like organic die-bonding material and semiconductor device using the same |
| US6717242B2 (en) | 1995-07-06 | 2004-04-06 | Hitachi Chemical Company, Ltd. | Semiconductor device and process for fabrication thereof |
| TW310481B (en) | 1995-07-06 | 1997-07-11 | Hitachi Chemical Co Ltd |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5846388B2 (en) * | 1978-04-19 | 1983-10-15 | 日本電気ホームエレクトロニクス株式会社 | Solder supply method |
-
1981
- 1981-09-30 JP JP56156494A patent/JPS5857730A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5857730A (en) | 1983-04-06 |
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