JPH0252862B2 - - Google Patents

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a surge absorption element for protecting an electric circuit system from abnormal voltages caused by various surge factors such as lightning and switching surges, and in particular, the present invention relates to a surge absorption element for protecting an electric circuit system from abnormal voltages caused by various surge factors such as lightning and switching surges. This invention relates to a surge absorbing element using.

<Prior art> A surge absorbing element is a surge absorbing element that, when a high voltage higher than a specified voltage value called "breakdown voltage" is applied, forms an equivalent low-impedance current line within itself in the subsequent process. , which absorbs the large current associated with the high voltage and clamps the voltage across the element below a certain voltage value to prevent such abnormal voltage from affecting the electrical circuit system to be protected. The operating mechanism of most of the products on the market was based on the avalanche yield principle.

That is, the avalanche breakdown voltage when a reverse bias is applied to a diode structure using a pn junction or a diode connection structure of a transistor is used to define the breakdown voltage as a surge absorbing element.

<Problems to be Solved by the Invention> As mentioned above, in the conventional surge absorbing element based on the avalanche breakdown principle, the avalanche breakdown voltage itself is the "breakdown voltage" used to describe the characteristics of the surge absorbing element. ” will be directly defined.

However, on the other hand, the avalanche breakdown voltage in such conventional elements depends on the impurity concentration of one of the semiconductor regions forming the high resistivity side of the two regions forming the pn junction, and therefore generally of the semiconductor substrate.
It is almost uniquely defined.

Therefore, in such conventional avalanche breakdown type surge absorbing elements, as long as semiconductor substrates with the same impurity concentration are used, it is impossible or extremely difficult to change the breakdown voltage arbitrarily, and it is difficult to obtain products with different breakdown voltages. Therefore, semiconductor substrates with different impurity concentrations must be used accordingly.

Not only is this extremely irrational in itself, but changing the breakdown voltage also changes other electrical characteristics other than the breakdown voltage, such as junction capacitance and series resistance. In other words, junction capacitance, series resistance, etc. cannot be designed independently of breakdown voltage.

Conversely, in these conventional devices, the impurity concentration of different lots varies from the beginning, even if it is within the allowable tolerance range for each lot. In the case where the board has been supplied, and even if it was known in advance, there is no way to easily correct it, and the result is a surge absorption problem after the product is completed. This is honestly reflected as variations or variations between lots in the breakdown voltage of the device.

The same can be said of the clamp voltage after the element is turned on due to a surge exceeding the breakdown voltage or a voltage called breakover voltage. Conventionally, there was nothing that could freely design this clamp voltage.

Furthermore, in this type of conventional avalanche breakdown type surge absorbing element, there are often restrictions in terms of the actual physical structure.

This is because, in this type of surge absorbing element, when the second semiconductor region is formed in a buried manner by diffusion of impurities into the first semiconductor region, avalanche breakdown is generally likely to occur from the electric field concentration areas at both ends of the junction. This is because it becomes extremely difficult to flow current uniformly over the entire area of the junction when clamping the input voltage after breakdown.

In addition to these drawbacks, the above-mentioned conventional device also has the drawback that the above-mentioned clamp voltage does not become very low in absolute value when the input voltage is clamped after breakdown. In the case of avalanche breakdown, the clamp voltage is rather higher than the breakdown voltage at which avalanche breakdown begins.

Therefore, after breakdown, the power consumed within the device is the product of this clamp voltage and the absorption current, which is quite high in absolute value, resulting in a large amount of heat generation in the device. This, in turn, means that, from a heat capacity standpoint, there are significant limitations on the absorption current that can be tolerated by the device.

However, this does not mean that it is better to just lower this clamp voltage as much as possible.

This is because this type of surge absorption element is inserted between the power supply section of the circuit system to be protected and the load in parallel to the load, so the clamp voltage of the element used is sufficiently low. If the power supply voltage is lower than the power supply voltage of the relevant power supply, it may turn once due to a surge.
This is because once it is turned on, even if the surge factor disappears afterwards, this element will remain in the turned-on state, and power supply energy will continue to be wasted (this is called a follow-on phenomenon).

Therefore, it is most desirable that the clamp voltage can be set to a value as close as possible to the power supply voltage of the circuit system to which it is applied, although it is higher than the power supply voltage, although this is also a matter of balance with the above-mentioned design efficiency. This is because, while heat generation during clamping can be suppressed to the minimum limit, once the surge factor disappears, it will automatically reset without causing a follow-on phenomenon.

The present invention has been made in view of the above-mentioned conventional circumstances, and it is possible to achieve any desired breakdown voltage with ease of design over a considerable width, regardless of the impurity concentration, resistivity, or thickness of the semiconductor substrate used. Therefore, regardless of breakdown voltage or clamp voltage, junction capacitance, series resistance, etc.
Other electrical characteristics can be designed independently, and when absorbing a surge, the clamp voltage is compared to the breakdown voltage, and it is possible to absorb large currents while reducing the voltage sufficiently to the lower limit that does not cause a follow-on phenomenon. The present invention aims to provide a surge absorbing element.

<Means for solving the problems> In order to achieve the above object, in the present invention,
Regarding the breakdown mechanism at the beginning of operation, instead of the conventional avalanche breakdown type, a punch-through phenomenon is introduced as a new operating principle, while the avalanche breakdown, Zener breakdown, or punch-through phenomenon is used to specify the clamp voltage after breakdown. The following surge absorbing element is provided as a surge absorbing element having a novel configuration.

1. A first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; one surface side of both upper and lower surfaces of the first semiconductor region; a second semiconductor region that is formed in a conductivity type opposite to the first semiconductor region and forms a pn junction diode with the first semiconductor region; a third region that is in contact with the second semiconductor region and defines an effective thickness of the second semiconductor region by determining a distance between the third region and the first semiconductor region; inside the surface,
formed on the other surface side opposite to the one surface, or formed laterally spaced apart from the second semiconductor region on the one surface side, and forming an injection bond with the first semiconductor region. a fourth region to be formed; a fifth region to form a rectifying junction with the fourth region by contacting the fourth region from the opposite side to the first semiconductor region; A surge current is absorbed by the punch-through between the first semiconductor region and the third region that occurs when the depletion layer generated by the reverse bias of the pn junction diode reaches the corresponding third region, and the surge current is absorbed by the fourth region. A surge absorbing element characterized in that a clamp voltage is defined by a breakdown voltage of the rectifying junction between and the fifth region.

2. A first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; one surface side of both the upper and lower surfaces of the first semiconductor region; a second semiconductor region forming a pn junction diode with the first semiconductor region, which is formed in a conductivity type opposite to the first semiconductor region; a third region that is in contact with the second semiconductor region and defines an effective thickness of the second semiconductor region by determining a distance between the third region and the first semiconductor region; inside the surface,
formed on the other surface side opposite to the one surface, or formed laterally spaced apart from the second semiconductor region on the one surface side, forming an injection junction with the second semiconductor region. a fourth region that forms a rectifying junction with the fourth region by contacting the fourth region from the side opposite to the first semiconductor region; , and a sixth region forming a rectifying junction from the opposite side to the fourth region; A surge absorption element characterized in that a surge current is absorbed by punch-through between the first semiconductor region and the third region, and a clamp voltage is defined by punch-through through the fifth region.

3. A first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; one surface side of both upper and lower surfaces of the first semiconductor region; a second semiconductor region that is formed in a conductivity type opposite to the first semiconductor region and forms a pn junction diode with the first semiconductor region; a third region that is in contact with the second semiconductor region and defines an effective thickness of the second semiconductor region by determining a distance between the third region and the first semiconductor region; is formed on the other surface side opposite to the one surface, or is formed laterally apart from the second semiconductor region on the one surface side, and is separated from the first semiconductor region. a fourth region forming an injection junction; and an auxiliary region forming a rectifying junction from the opposite side of the third region from the second semiconductor region; The punch-through between the first semiconductor region and the third region that occurs when the layer reaches the third region absorbs the surge current and rectifies the current between the third region and the auxiliary region. 1. A surge absorption element characterized in that a clamp voltage is determined by a breakdown voltage of a magnetic junction.

<Function> First, to describe the function common to all of the first to third inventions, in the surge absorbing element of the present invention, a pn formed by a first semiconductor region and a second semiconductor region. As a reverse bias is applied to the junction diode, the depletion layer generated at the junction extends toward the first semiconductor region and at the same time extends toward the third region.

When this depletion layer continues to grow in accordance with the magnitude of the applied voltage and eventually reaches the third region, punch-through occurs between the first semiconductor region and the third region, and a surge occurs through this current path. Current begins to be absorbed. This punch-through operation starting voltage is shown as the breakdown voltage in FIG.

However, even if the fifth region etc. in the first and second inventions are formed protruding from the fourth region, this absorbed voltage mainly flows through the path from the fourth region to the first semiconductor region. As mentioned in the summary, the first region is made of a material that forms an injection junction capable of injecting minority carriers into the first semiconductor region (for example, a semiconductor of a conductivity type opposite to that of the first semiconductor region, silicide, and Also, if the first semiconductor region is p-type, injection of minority carriers from the fourth region into the first semiconductor region occurs, and as long as the first semiconductor region is made of a metal capable of injecting electrons, etc. Even if the second semiconductor region and the third region are electrically short-circuited via the external terminal, a voltage drop occurs in the second semiconductor region as a result of the minority carriers flowing into the second semiconductor region, and a voltage drop occurs in the third semiconductor region. Injection of carriers occurs into the second semiconductor region.

As this carrier injection process is repeated, a current larger than the value shown as the breakover current in Figure 4 eventually flows, and through a positive feedback phenomenon, the fourth region The voltage between the three regions is extremely low under clamped conditions.

However, the voltage across the element, that is, the clamp voltage as an element characteristic, is the avalanche breakdown voltage or Zener breakdown voltage between the fourth region and the fifth region in the first invention, and the avalanche breakdown voltage or Zener breakdown voltage between the fourth region and the fifth region in the second invention. The punch-through voltage through the region, and in the case of the third invention, the avalanche or Zener breakdown voltage between the third region and the auxiliary region are added to the extremely low voltage between the third and fourth regions, respectively. Become.

This clamp voltage can be achieved by controlling the impurity concentration and/or thickness of each region related to the avalanche breakdown voltage, Zener breakdown voltage, or punch-through voltage regulations, and is equivalent to that with good design efficiency even with existing technology. It can be set arbitrarily within a certain design range.

Therefore, while the surge absorbing element of the present invention is capable of absorbing large currents while suppressing heat generation in the element, the clamp voltage can be designed arbitrarily, and therefore the circuit system to which the present surge absorbing element is applied It is also possible and easy to set the optimum clamp voltage to prevent the following current phenomenon according to the power supply voltage of the circuit, and to automatically reset the circuit.

Note that a voltage exhibiting a breakover current can be called a breakover voltage, and this breakover voltage is generally higher than the breakdown voltage as shown in FIG. 4.

Therefore, if we follow the voltage history across the device from its initial operation to voltage clamping, we can see that with the application of a surge, if it is above the breakdown voltage, punch-through operation will begin, and the absorbed current will break over. The voltage across the element increases somewhat until the current reaches the current, but once it exceeds the breakover current, the voltage shifts from the breakover voltage to the clamp voltage, which can be set arbitrarily as described above.

The value of the breakover current is determined by the resistance of the second semiconductor region, the shape of the third region with respect to the first semiconductor region, the shape of the fourth region with respect to the first semiconductor region, and the shape of the fourth region with respect to the first semiconductor region. When one semiconductor region is directly connected to an external terminal, it can be determined depending on the resistance of the first semiconductor region and the shape of the vicinity of the fourth region.

On the other hand, considering the breakdown voltage that starts the punch-through operation, in the surge absorbing element of the present invention, the height position of the third semiconductor region that is in contact with the second semiconductor region on the opposite side of the first semiconductor region is In other words, depending on how much the effective thickness of the intermediate second semiconductor region is set, the punch-through voltage between the first and third regions, that is, the breakdown voltage can be arbitrarily changed. It becomes something that can be controlled.

For example, if the effective thickness of the intermediate second semiconductor region is set thick, a larger reverse bias will be required for the generated depletion layer to extend to the third region, assuming other conditions are the same. This ultimately increases the breakdown voltage at which the device breaks down, and conversely, if the effective thickness of the intermediate second semiconductor region is set thin, the generated depletion layer can easily become the third semiconductor region even at a relatively low applied voltage. This means that the breakdown voltage has been set low.

Of course, such breakdown voltage can also be controlled by the impurity concentration of the intermediate second semiconductor region, but
In any case, in view of the above, in accordance with the present invention, it is possible to use an appropriate commercially available semiconductor substrate wafer as the first semiconductor region as it is, or to use the same type of semiconductor substrate as the starting material. It can be seen that a surge absorbing element with a desired breakdown voltage can be obtained.

Furthermore, by appropriately controlling the effective thickness of the second semiconductor region and its impurity concentration, it becomes possible to design the junction capacitance and series resistance independently for any breakdown voltage.

Furthermore, with respect to the semiconductor substrate itself or a first semiconductor region formed separately on the semiconductor substrate,
The method of sequentially forming the second semiconductor region and the third region may be based on existing epitaxial growth technology, ion implantation, selective diffusion, etc. Since the effective thickness and impurity concentration of the second semiconductor region can be extremely well controlled even with current technology, the surge absorbing element produced by the present invention will ultimately have extremely high precision. It can be done.

On the other hand, from a structural point of view, the effective thickness of the second semiconductor region can be set thin regardless of the thickness of the first region. No pre-processing,
It is also possible to use the device in its thick form as is (which is also more common), so it does not require an increase in the number of steps and does not cause a decrease in physical strength. It is also possible to form a plurality of them, which has the effect of facilitating integration.

Further, as is clear from the above principle, the second semiconductor region and the third region may be placed at the same potential at the external terminal, and therefore, the external terminal may be drawn out from the same drawing terminal. However, on the contrary, it may be possible to draw out signals independently from each dedicated terminal and apply an appropriate bias between these two terminals.In this way, even after the device is completed or when the device is in actual operation, By changing and adjusting the bias voltage, the punch-through voltage, that is, the breakdown voltage as a surge absorbing element can be made variable.

Note that, as is clear from the above, the breakover voltage naturally changes as the breakdown voltage changes.

<Examples> Some of the illustrated embodiments of the present invention will be described in detail below. Of course, there are individual examples of the first invention, second invention, and third invention, but as already mentioned, they are all very closely related and can be referred to from each other, and especially Considerations and modifications other than how to define the clamp voltage are mutually applicable.

The surge absorbing elements 10 shown in FIGS. 1A, B, and C are basic embodiments of the first invention, the embodiment shown in FIG. 2 is of the second invention, and the embodiment shown in FIG. This is an embodiment corresponding to the third invention.

In either case, the semiconductor substrate is used as it is as the first semiconductor region 1 of the first conductivity type, and the third,
In addition to the fourth regions 3 and 4 being semiconductor regions, the fifth region 5 in the first and second inventions and the auxiliary region 7 in the third invention are also made of semiconductor material.

In the embodiment shown in FIG. 1A, FIG. 2, and FIG. The fourth semiconductor region 4 is formed on the other surface of the first semiconductor region 1, that is, on the back surface side, with respect to the second semiconductor region 2 and the third semiconductor region 3, as shown in FIGS. 1B and 1C. In the embodiment shown, a fourth semiconductor region 4 is formed by diffusion techniques on the same surface as the second semiconductor region 2 is provided, but laterally spaced apart from the second semiconductor region 2. has been done.

In these embodiments, the first semiconductor region 1 was selected to be an n-type semiconductor in relation to the cross-sectional structure, and therefore the second semiconductor region 2 was made to be a p-type semiconductor by a diffusion technique of an appropriate impurity such as boron. At the same time, the fourth semiconductor region 4 is also a p-type semiconductor region.

Therefore, of course, in the embodiments of the first and second inventions shown in FIGS. 1 and 2, a rectifying junction is formed with respect to this fourth semiconductor region 4 from the side opposite to the first semiconductor region 1. The conductivity type of the fifth semiconductor region 5 is selected to be n type, and the conductivity type of the auxiliary region 7 forming a rectifying junction with the third region 3 in the embodiment of the third invention shown in FIG. 3 is selected to be p type. It will be done.

In the case of the embodiment shown in FIGS. 1B and 1C, it is preferable that a high concentration impurity layer 1b, which will be described later, be provided on the back surface side of the first semiconductor region 1, but this itself is not included in the present invention. Since it is not directly involved in the basic configuration or principle operation, it can be assumed that it does not exist at the beginning in the following explanation.

The third region 3 related to the first and second inventions and the auxiliary region 7 related to the third invention form one end of the main current line when punch-through occurs, and therefore preferably have high conductivity. In each of these embodiments, high impurity concentration, ie, p ⁺ type and n ⁺ type regions, are formed by double diffusion of impurities.

Each region 2; 3 or 7; 5 or 6 is completed as an element by attaching an ohmic extraction terminal, but the extraction terminal 2t of the second semiconductor region 2 and the third The extraction terminal 3t of area 3 can be short-circuited at the manufacturing stage, as shown by the virtual line Ls in each corresponding figure, or it can be pulled out separately and short-circuited by the user. Alternatively, an appropriate bias source may be inserted as described below. On the other hand, the second area 2 and the third area 3 regarding the third invention are
As shown in the figure, an external fixed connection is generally provided through a line or an electrode Lc.

In the case where the terminals 2t and 3t are short-circuited in the above example, the line Ls is actually deposited in series on the exposed surface of the second semiconductor region 2 and the exposed surface of the third region 3, so as to contact the ohmic. It can be formed of a metal layer or the like.

First, both the terminals 2t and 3t are short-circuited by the lines Ls and Lc in this way, and between the two terminals as a surge absorption element, that is, in the embodiments of the first and second inventions, the terminals 2t and 3t are short-circuited by the lines Ls and Lc. The description will be made assuming that a surge voltage is applied between the lead terminal 5t of the fifth semiconductor region 5 and between the auxiliary region terminal 7t and the fourth region terminal 4t in the embodiment related to the third invention.

In such a surge absorbing element 10, as already explained in the operation section, when a reverse bias is applied to the pn junction between the first semiconductor region 1 and the second semiconductor region 2, the depletion caused by the reverse bias is applied. The layer is applied not only to the side of the first semiconductor region 1 but also to the third region 3.
It also grows towards the side.

Therefore, if a surge voltage is applied between the terminals 2t, 3t and the terminal 5t or between the terminal 4t and the terminal 7t, and it is considerably large in the phase of applying reverse bias to the pn junction, It may happen that the upper end of the depletion layer reaches the third region 3.

This state is the start of a punch-through state between the first semiconductor region 1 and the third region 3, and is the start of a low impedance state in which a large current can flow or a breakdown state as the present surge absorbing element. This starting point is shown in FIG. 4 as the breakdown voltage on the voltage axis.

When such a breakdown start state is realized, the terminal 2
t, between 3t and terminal 5t, or between terminal 4t and terminal 7
A surge current begins to flow between t and the fourth semiconductor region 4
Holes are injected into the first semiconductor region 1, collected in the second semiconductor region 2, and passed through the external terminal.
External current ((device current).

Therefore, the product of the resistance of the second semiconductor region 2 narrowed between the third region 3 and the first semiconductor region 1 and the above current is equal to the forward voltage of the pn junction diode composed of regions 2 and 3. When the temperature decreases, electrons are injected from the third region 3 into the second semiconductor region 2, which causes an increase in current, and holes are again injected from the fourth semiconductor region 4, a positive feedback phenomenon. arise.

The current value at which such a positive feedback phenomenon begins to occur is the breakover current mentioned above, and the voltage across the element at this time (external terminals 3t, 5
t or between external terminals 4t and 7t) becomes the breakover voltage.

As mentioned above, this breakover voltage is somewhat larger than the breakdown voltage, but
Once positive feedback begins to occur, the voltage between the third region 3 and the fourth region 4 transitions to a significantly lower value. Specifically, this value is approximately equal to the product of the absorbed current and the series resistance of each part plus one forward voltage of the pn junction.

However, the clamp voltage for the element shown in FIG. 4 is defined as follows depending on the embodiment of each invention.

First, in the embodiments shown in the first figures related to the first invention, the breakdown voltage at the rectifying junction between the fourth semiconductor region 4 and the fifth semiconductor region 5 is added to the extremely low voltage between the third and fourth regions. It becomes what it is.

Therefore, by appropriately setting the impurity concentration of the fourth semiconductor region 4, the clamp voltage of this element can be set arbitrarily.

In the embodiment related to the second invention shown in FIG. 2, a sixth region (here, a p-type semiconductor region) 6 made of a material capable of forming a rectifying junction with respect to the fifth semiconductor region 5 is provided. , the punch-through voltage in the fifth region is added to the extremely low voltage between the third and fourth regions.

Therefore, by controlling the impurity concentration and thickness of the fifth region 5, any desired clamp voltage can be obtained with good controllability over a considerably wide design range.

In the embodiment shown in the third diagram related to the third invention, the avalanche or Zener breakdown voltage between the auxiliary region 7 formed in the third region 3 and the third region is the same as that between the third and fourth regions. This is added to the extremely low voltage, so by controlling the impurity concentration of the third semiconductor region, the clamp voltage of the element can be set arbitrarily.

Note that in the embodiment shown in FIG. 1C according to the first invention, as can be seen when compared with the embodiment shown in FIG. 1B, the corner of the fifth semiconductor region 5 in contact with the fourth semiconductor region 4 is This is a device that allows the breakdown current to flow uniformly across the junction surface. It is for the same reason that the sides of regions 4 to 6 are mesa-shaped in the embodiment of the second invention shown in FIG.

As understood from the above mechanism, the surge absorbing element 10 of the present invention maintains a high breakdown voltage when no surge is applied, suppresses the current flowing within the element to the minimum limit, and has a significant effect on the surge absorbing element 10 of the present invention. while preventing power from being consumed.
Once a surge is applied above the breakdown voltage, it will soon reach the specified clamp voltage set arbitrarily, and
In addition to absorbing large currents and reliably protecting the subsequent circuit system, by setting the clamp voltage appropriately, it is possible to prevent follow-on current phenomena, and the power supply voltage of the circuit system can protect the subsequent circuit system even after the surge factor has disappeared. This prevents unnecessary turn-on.

The breakdown voltage in the present surge absorbing element 10 that operates in this manner is determined not only by the resistivity or impurity concentration of the first semiconductor region 1 but also by the distance between the first semiconductor region 1 and the third region 3. Since the punch-through voltage can be controlled depending on the effective thickness Dt of the second semiconductor region 2 and/or the impurity concentration, it can be arbitrarily set within a fairly wide design range. In fact, according to experiments conducted by the present applicant, it has been confirmed that this design width covers an extremely wide range from several volts to several hundred volts.

In each of the above embodiments, as described above, the second semiconductor region 2 and the third region 3 are formed on the semiconductor substrate 1 by the double diffusion technique.
In such a case, the effective thickness Dt of the second semiconductor region 2 can be determined by controlling the diffusion depth Dd of the impurity for forming the third semiconductor region from the surface after the second semiconductor region 2 is formed. , will be directly controlled. That is, in the case of the double diffusion technique, changing or changing the height position of the third region 3 with respect to the first semiconductor region directly changes the effective thickness Dt of the second semiconductor region 2.

On the other hand, when the second semiconductor region 2 and the third region 3 are formed by epitaxial growth technology,
The effective thickness Dt of the second semiconductor region 2 is generally defined by the growth film thickness itself, which is determined based on the various conditions in the epitaxy, but in that case, in practice, the thickness Dt of the second semiconductor region 2 is There is no change in the fact that the existence of 3 defines the effective thickness Dt regarding punch-through.

In addition, whether by diffusion technology or epitaxy, the effective thickness Dt of the second semiconductor region 2 can be controlled with extremely high precision even with existing technology. , the breakdown voltage can be set with extremely high accuracy.

Similarly, the impurity concentration in the second semiconductor region 2, which is another factor that determines the punch-through voltage and eventually the breakdown voltage of this device, can be adjusted and controlled with extremely high precision using existing technology. .

In the case of the device of the present invention, the effective thickness Dt of the second semiconductor region 2 is also used to design the breakdown voltage.
This means that it has two variables, ie, and impurity concentration, which are both well designed and independent of each other. Therefore, by using only one or both of these variables and arranging them appropriately, it is possible not only to set the breakdown voltage over a very wide range, but also to adjust the breakdown voltage by using other electrical factors such as junction capacitance and series resistance. It can be seen that it is also possible to design the physical characteristics independently of the breakdown voltage.

Of course, the fourth semiconductor region 4 and the fifth semiconductor region 5, as well as the sixth region 6 and the auxiliary region 7, which are related to the regulation of the clamp voltage, are formed with good controllability by using conventional techniques such as impurity diffusion and epitaxy. In particular, the fifth region of the first invention, the sixth region of the third invention, the auxiliary region of the third invention, etc. are not limited to being made of a semiconductor, but may be made of a semiconductor depending on the conductivity type of the first semiconductor region. can be made of silicide or metal as the case may be.

Furthermore, as mentioned briefly above, in the case of the embodiments shown in FIG. 1B and FIG. Regardless, it is desirable to form an n ⁺ or p ⁺ type high concentration impurity region layer 1b because carriers can be transported efficiently.

That is, as shown in the figure, n is formed in the first semiconductor region 1.
If type semiconductor is selected, high concentration impurity region layer 1
When the conductivity type of b is selected to be n ⁺ type, a kind of built-in electric field is generated between the high concentration impurity region layer 1b and the first semiconductor region 1, and as represented by the arrow f1 in FIG. As shown, the holes injected from the fourth semiconductor region 4 reach the high concentration impurity region layer 1b.
It is repelled in the vicinity of , and does not escape to the back surface side of the first semiconductor region.

In addition, when a p ⁺ type high concentration impurity region layer 1b is formed on the back side of the same n type first semiconductor region 1, the arrow f2 is schematically shown in FIG.
As shown by a and f2b, the p ⁺ -type high concentration impurity region layer 1b is filled with holes, which increases its potential, and eventually holes start to be emitted from the high concentration impurity region layer 1b. ,
Alternatively, as shown by the arrow f2c, the light is bounced back, thereby preventing transmission to the back side of the first semiconductor region.

Such a so-called lateral arrangement can also be adopted for the embodiments shown in FIG. 2 and FIG. It can also be formed on the back side of the area.

As is clear from the above explanation through each of the embodiments of the first, second, and third embodiments of the present invention, in the surge absorbing element of the present invention, in principle, punching occurs between the first and third regions. The current distribution of the surge current after the through occurs becomes relatively uniform.

However, if further uniformity is to be ensured, a configuration as shown in FIG. 5, which is representative of a modified example of the first illustrated embodiment according to the first invention, can also be adopted.

That is, in the embodiment shown in the fifth figure, a plurality of third regions 3 are formed for the second semiconductor region 2 of the opposite conductivity type formed on one surface side of the semiconductor substrate or the first semiconductor region 1. Divided third area elements 31, 32, 33, ..., 3n (n in the case shown)
=5), each area element 31
~3n are designed to be electrically connected to the outside from a common lead terminal 3t.

With such a structure, the electric field concentration effect seen in conventional avalanche breakdown devices can be avoided, and a uniform current distribution can be obtained. Therefore, the current capacity can also be increased approximately in proportion to the element area.

In the case of this embodiment, the fifth region is formed to protrude laterally from the fourth region, but this is to maintain uniformity of breakdown current based on avalanche or Zener breakdown in this part. , as in FIG. 1C above, has the meaning of excluding corner joints.

In the embodiment shown in FIG. 5, the other considerations described in the embodiments shown in FIGS. , when the fifth regions 4 and 5 are arranged on the same surface side of the second and third regions 2 and 3 and the first semiconductor region 1, the above-mentioned high concentration impurity region on the back surface side of the first semiconductor region This may be similarly adopted for the layer 1b if necessary. In addition, two terminals 2
t and 3t can not only be short-circuited due to the operating principle as described above, but also have the effect of avoiding transient phenomena when used in a short-circuited manner.

Conversely, the idea of the embodiment shown in FIG. 5 can be applied as is to the embodiments shown in FIGS. 2 and 3.

In the surge absorbing element configured as in the present invention, the breakdown voltage that should be originally determined by the punch-through phenomenon is different between the first semiconductor region 1 and the second semiconductor region 2.
As the avalanche breakdown voltage approaches the avalanche breakdown voltage, controllability may deteriorate.

When there is such a risk, in order to prevent or suppress the avalanche breakdown that starts to occur at the junction of the end or corner of the second semiconductor region 2 at an early stage, the second semiconductor region 2 is removed as shown in FIG. A guard ring region 2G of the same conductivity type as the second semiconductor region is formed to surround the second semiconductor region, or a guard ring region 2G of the same conductivity type as the second semiconductor region is formed, or a guard ring region 2G is formed in series on the surfaces of the second semiconductor region 2 and the third semiconductor region 3, as shown in FIG. Edge of formed ohmic electrode Ma
It is preferable to further extend the Mat through the insulating film 8 so as to exceed the junction with the first semiconductor region at the end of the second semiconductor region.

In this way, the concentration of the electric field at the edge of the second semiconductor region is alleviated and the avalanche breakdown voltage is effectively increased, thereby reducing the breakdown voltage that can only be achieved by punch-through, in accordance with the idea of the present invention. Designability can be expanded and improved.

Further, in the embodiment shown in FIG. 7, each end edge Mbt of the ohmic electrode Mb formed in series on the surface of the fifth region 5 is also connected to the junction end with the fourth semiconductor region 4 via the insulating film 9. It is made to extend further beyond this point.

Of course, the ideas of the embodiments shown in the sixth and seventh figures can also be applied to the second and third inventions, and the ideas of the sixth and seventh embodiments can be applied to the second and third inventions.
In FIG. 7, each third region 3 is composed of a set of a plurality of region element groups 31 to 3n for the region, but the third region 3 shown in FIG.
Most basically, these third regions 3 may each be formed as a single region, as represented by.

In the case of the surge absorbing element of the present invention as shown in each of the embodiments described above, in principle, additional treatments such as end face polishing, which are required in the conventional avalanche yielding type, are not required after the element is completed. Therefore, a plurality of the configurations of each of the above-mentioned embodiments can be simultaneously manufactured in one semiconductor substrate 1.

However, when there is no need to integrate a large number of semiconductors, as another means for increasing the avalanche breakdown voltage mentioned above, as shown in FIG. The portion corresponding to the joint end may be etched or cut with a slope perpendicular to the surface or at an angle.
Such processing may also be effective regarding the relationship between the fourth region 4 and the fifth region 5. However, when such a simple method is used, a suitable protective film (not shown) is usually required on the cut-off surface.

Furthermore, in order to increase the uniformity of the current flowing through the junction that defines the clamp voltage, the fourth region 4 is divided into a plurality of region elements 41, 42, . . . as shown in FIG.
..., 4n. Similarly, this divided structure can be applied to each of the embodiments of the second and third inventions.

Here, a somewhat special usage of the surge absorbing element of the present invention will be explained by referring to the embodiment shown in FIG. 1A. The second semiconductor region 2 and the third region 3
If these are drawn out individually from different terminals 2t and 3t, the punch-through voltage can be applied externally by inserting an appropriate bias source Vb between these terminals 2t and 3t, as shown in Figure 10A. It also becomes possible to control.

As a model of surge voltage, terminal 3 for the third region
t and the terminal 5t of the fifth semiconductor region 5. As shown in FIG. 10B, the energy band structure of the present surge absorbing element is such that the surge voltage The state shown by the solid line when no voltage is applied changes to the state shown by the imaginary line in the figure when the high voltage Vr corresponding to the surge voltage is applied. However, in the case of illustration, in order to see the bias effect as described below,
The high voltage source potential corresponding to the surge voltage is shown in a state that has not yet reached the level where punch-through occurs.

In this state, depending on the polarity and magnitude of the bias potential supplied from the bias source Vb,
Regarding the second region 2 and the third region 3, the band structure changes as shown by the arrow "ⓓ" in the case of reverse bias and as shown by the arrow "ⓓ" in the case of forward bias. Therefore, it can be seen that the punch-through voltage of the surge absorbing element can be controlled externally by the bias potential and its polarity.

Each embodiment of the present invention has been described in detail above, and finally, as an example, the effects of the present invention will be confirmed by comparing actual devices.

First, a surge absorbing element of the present invention shown in FIG. 5 without the fourth semiconductor region 4 and the fifth region 5 was prepared for comparison using the steps described below.

Resistivity 5Ω-cm, conductivity type n-type, (111) plane,
A 300 μm thick silicon wafer is placed in the first semiconductor region 1.
A starting material of 6000Å is first applied to the front and back surfaces of the
A SiO ₂ film was formed.

Among them, only the SiO ₂ film on the back surface was removed and high concentration phosphorus was diffused to a depth of 3 μm.

Next, in order to define the planar shape of the second semiconductor region 2, a photo-etching process was applied to the silicon oxide film on the surface according to a predetermined pattern to open an impurity diffusion window.

Boron was diffused through this diffusion window to form a p-type region with a depth of 2.5 μm.

After newly forming a silicon oxide film on the wafer surface, the silicon oxide film is photo-etched in accordance with a predetermined pattern in order to define the planar shape of the plurality of third region elements 31 to 3n.
Impurity diffusion windows for a plurality of third region elements were formed.

Phosphorus was diffused at a high concentration through this diffusion window to form a third region 3 consisting of a set of n ⁺ -type third region elements 31 to 3n having a depth of 1.2 μm. Therefore,
At the same time, the second semiconductor region 2 was formed, and its effective thickness Dt was set to 1.3 μm.

After that, the ohmics common to the second and third areas
Electrodes or terminals 2t and 3t were formed through photo-etching, metal thin film deposition, and etching steps for forming contacts. Electrodes or terminals on the semiconductor substrate side were also formed at the same time in the metal thin film deposition process.

The breakdown voltage of a comparison surge absorbing element produced by this process was 120V, and the surge absorption current could reach a maximum of 300A/cm ² .

On the other hand, as a surge absorbing element according to the idea of the present invention, the manufacturing process up to the third region is the same as that of the comparative surge absorbing element, but a fourth semiconductor region is formed on the back side of the n-type semiconductor substrate. A surge absorption element in which a p ⁺ region is formed by impurity diffusion, an n ⁺ region as a fifth semiconductor region 5 is formed by impurity diffusion, and then an electrode or terminal 5t is formed by metal thin film deposition. In this case, the breakdown voltage was almost the same as 121V, but
The breakover current was 4A/cm ² and the surge absorption current was up to 5000A/cm ² .

In addition, the range of change in clamp voltage is from 5 to 50V.
It could be controlled to any value.

Looking at this characteristic example, it can be seen that the functions of the fourth semiconductor region 4 and the fifth region 5 provided according to the present invention are extremely large.

Also, under the same conditions as above, when the diffusion time for forming the n ⁺ type third region, which essentially defines the effective thickness of the second semiconductor region 2, was changed, the breakdown occurred. The voltage could be varied between 30V and 170V. Of course, this variation range is not the maximum variation range, and it has been confirmed that if other conditions are also taken into account, an extremely wide variation range from several volts to several hundred volts can be obtained.

It was also confirmed that the surge absorption mechanism in this device can be reliably controlled solely by the punch-through phenomenon, without relying on tunneling or avalanche breakdown.

For example, in the device shown in the third figure, the fourth region 4 in the figure is modified to consist of a stack of the second and third regions 2 and 3 and the auxiliary semiconductor region 7, but the impurity concentration of the third region is By controlling the concentration to such a level that, together with the region, can define the breakdown voltage for defining the clamp voltage, the effects of the present invention can be exhibited against bipolar surge currents.

<Effects of the Invention> According to the present invention, various superior effects can be obtained as compared to existing avalanche breakdown type elements, as listed below.

Semiconductor substrates or semiconductor wafers are the most expensive and least flexible components of this type of device, but according to the present invention, surges with different breakdown voltages can be removed even from a starting wafer with the same material constant. An absorption element can be obtained.

The set of the second semiconductor region and the third region, the set of the fourth semiconductor region and the fifth region, or the set of the second semiconductor region, the third region, and the auxiliary region are both identical with respect to the first semiconductor region. Since it can be formed only from the surface side, the breakdown voltage and/or clamp voltage can be changed and controlled to a predetermined breakdown voltage and clamp voltage very easily and with high precision.

Other electrical characteristics, such as junction capacitance and series resistance, can be designed independently of the breakdown voltage and clamp voltage, and therefore, for example, even with different breakdown voltages and clamp voltages, other electrical characteristics are approximately the same. It is also possible to do the same.

It is also easy to integrate multiple elements within a common semiconductor substrate.

It has a design principle in which the clamp voltage is reduced even more than the breakdown voltage in the large current region, so it can absorb even extremely large surge currents and has extremely high ability to protect circuit systems.

Even though the clamp voltage is greatly reduced, if necessary, the value can be set so that it does not become an extremely low value, or so that it corresponds to the power supply voltage of the circuit system to which this surge absorbing element is applied. Therefore, it is also possible to prevent a follow-on phenomenon in which conduction continues even after the surge factor has disappeared.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of a first embodiment according to the first invention of the present invention, FIG. 2 is a schematic configuration diagram of an embodiment of a surge absorbing element according to the second invention, and FIG. 3 is according to the third invention. 4 is a diagram showing the operating characteristics of the device of the present invention; FIG. 5 is a schematic diagram of a modified example according to the first invention; FIGS. 6, 7, 8, and 9
The figures are schematic configuration diagrams of further modified examples of the embodiment of the present invention, and FIG. 10 is an explanatory diagram of an example of a special usage of the surge absorbing element of the present invention. In the figure, 1 is a first semiconductor region or a semiconductor substrate,
2 is a second semiconductor region, 3 is a third region, 31 to 3n
is a third region element, 4 is a fourth region, 41 to 4n are fourth region elements, 5 is a fifth region, 6 is a sixth region, 7 is an auxiliary region, and 10 is the surge absorbing element of the present invention as a whole. be.

Claims (1)

[Claims] 1. A first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; on both upper and lower surfaces of the first semiconductor region; a second semiconductor region formed on one surface side, having a conductivity type opposite to the first semiconductor region and forming a pn junction diode with the first semiconductor region; a third region that defines an effective thickness of the second semiconductor region by determining a separation distance from the first semiconductor region by contacting the second semiconductor region from a side opposite to the first semiconductor region; Of both the upper and lower surfaces of the semiconductor region, it is formed on the other surface side opposite to the one surface, or it is formed on the one surface side laterally spaced apart from the second semiconductor region. ,
a fourth region forming an injection junction with the first semiconductor region; forming a rectifying junction with the fourth region by contacting the fourth region from a side opposite to the first semiconductor region; A surge occurs due to punch-through between the first semiconductor region and the third region, which occurs when the depletion layer generated by reverse bias of the pn junction diode reaches the corresponding third region. A surge absorption element that absorbs current and has a clamp voltage defined by a breakdown voltage of the rectifying junction between the fourth region and the fifth region. 2. A first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; one surface side of both the upper and lower surfaces of the first semiconductor region; a second semiconductor region that is formed in a conductivity type opposite to the first semiconductor region and forms a pn junction diode with the first semiconductor region; a third region that is in contact with the second semiconductor region and defines an effective thickness of the second semiconductor region by determining a distance between the third region and the first semiconductor region; Formed in the surface on the other surface side opposite to the one surface, or formed laterally spaced apart from the second semiconductor region on the one surface side,
a fourth region forming an injection junction with the first semiconductor region; a fourth region forming a rectifying junction with the fourth region by contacting the fourth region from a side opposite to the first semiconductor region; a fifth region; and a sixth region forming a rectifying junction from the opposite side of the fourth region to the fifth region; the depletion layer generated by reverse bias of the pn junction diode corresponds to the sixth region; A surge current is absorbed by a punch-through between the first semiconductor region and the third region that occurs when the third region is reached, and a clamp voltage is defined by the punch-through through the fifth region. A surge absorption element featuring: 3. A first semiconductor region of a first conductivity type formed as the semiconductor substrate itself or separately formed with respect to the semiconductor substrate; one surface side of both upper and lower surfaces of the first semiconductor region; a second semiconductor region that is formed in a conductivity type opposite to the first semiconductor region and forms a pn junction diode with the first semiconductor region; a third region that is in contact with the second semiconductor region and defines an effective thickness of the second semiconductor region by determining a distance between the third region and the first semiconductor region; Formed in the surface on the other surface side opposite to the one surface, or formed laterally spaced apart from the second semiconductor region on the one surface side,
a fourth region forming an injection junction with the first semiconductor region; an auxiliary region forming a rectifying junction from the opposite side of the third semiconductor region from the second semiconductor region; When the depletion layer generated by the reverse bias of A surge absorbing element characterized in that a clamp voltage is defined by a breakdown voltage of the rectifying junction between.