JPH0324779B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device by improving the formation of multilayer wiring in the semiconductor device.

Generally, as the integration density of semiconductor devices increases, multilayer wiring from one to two wiring layers to three or more wiring layers becomes necessary.

Conventionally, multilayer wiring for semiconductor devices is formed by forming the first metal wiring and then depositing the insulating film using the CVD method (vapor phase reaction method).
etc., to form a through hole, and then form a second metal wiring. However, with this method, the step of the first metal wiring is as large as 5,000 to 12,000 Å, and the insulating film is formed by CVD, etc. There are drawbacks such as an overhanging structure when deposited, and if the second metal wiring is formed as is, there is a risk that failures such as wire breakage due to poor step coverage may occur at the step portion. This is a particularly important problem in terms of structure when forming multilayer wiring.

Therefore, in the prior art, a method for forming smooth multilayer wiring has been devised as a solution to these problems. According to this method, for example, an Al wiring section is formed on a semiconductor substrate, and a polyimide resin that provides a smooth surface is applied as an insulating film on both the substrate and the Al wiring section. However, although this method requires fewer processing steps, it has the disadvantage that impurities contained in the polyimide resin, such as chlorine, deteriorate element characteristics or corrode metal wiring.

Next, other conventional methods first deposit Al on the semiconductor substrate.
After forming a wiring part and growing a thick CVD insulating film on both, an organic film is applied, and then both the CVD insulating film and the organic film are plasma etched at approximately the same etching speed, This is a method in which the smooth surface shape of the organic film is transferred to the CVD insulating film. However, in such a plasma etching method, the etching speed fluctuates non-uniformly due to variations in the film quality of both the above-mentioned films, and even if this speed fluctuation is prevented, the pressure, gas, flow rate of the above-mentioned films, etc. It is difficult to delicately control conditions such as the temperature of the semiconductor substrate, and in fact, maintaining the same etching rate is itself an extremely difficult technical problem.

The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional devices, and it is possible to use a semiconductor device that does not require impurity contamination or difficult etching rate control techniques, and can smooth the surface with high precision in the formation of multilayer wiring in semiconductor devices. The object of the present invention is to provide a method for manufacturing the device.

Two embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which 1 is a semiconductor substrate, 2 is a narrow Al wiring portion formed on the semiconductor substrate 1, and 3 is the above-mentioned semiconductor substrate.
A polyimide resin film formed on the Al wiring part 2,
4 is a photoresist film formed on the polyimide resin film 3; 5 is a PSG film deposited on both the polyimide resin film 3 and the semiconductor substrate 1 by CVD; 6 is a photoresist film formed on the PSG film 5; 7 is a road shoulder portion of the PSG film convex portion 8 formed on the Al wiring portion 2 of the PSG film 5; 9 is a polyimide resin film formed on the side surface of the polyimide resin film 3; This is an over-etched portion formed by over-etching the local surface of the polyimide-based resin film 6 and the PSG film 5 below the polyimide-based resin film 6.

In such a structure, the manufacturing method according to an embodiment of the present invention first forms an Al wiring part 2 on a semiconductor substrate 1, as shown in FIG. A photoresist film 4 is formed and patterned on the resin film 3.
The resin film 3 is patterned. Next, using this patterned resin film 3 as a mask, the Al wiring section 2 is selectively etched,
When the photoresist film 4 is removed, what is shown in FIG. 1b is obtained.

Next, as shown in FIG. 1c, a PSG film 5 having approximately the same thickness as the Al wiring portion 2 is formed by the CVD method,
A polyimide resin film 6 is formed thereon. As shown in FIG. 1d, this polyimide resin film 6 is formed by spin coating to be thin on the PSG film road shoulder portion 7 and PSG convex portion 8, and thick on other portions.

Next, as shown in FIG. 1e, the polyimide resin 6 is uniformly dry-etched until the road shoulder portion 7 and the PSG convex portion 8 are exposed. Next, using the etched polyimide resin 6 as a mask, the road shoulder portion 7 and the PSG convex portion 8 are
As shown in FIG.
Selective etching is performed until the film thickness is approximately the same as that of the Al wiring portion 2. Even if the PSG film 5 is slightly over-etched, only the shoulder portion 9 of the Al wiring section 2 is slightly etched, and the polyimide resin film 3 is completely removed, as shown in FIG. 1g. , by further depositing the PSG film 10 again, as shown in FIG.
A smooth and flat surface of the PSG film 10 can be obtained.

In the above embodiment, polyimide resin was used as the organic coating 6 applied on the PSG film 5, but other organic substances such as photoresist may be used instead, and the same effect as in the above embodiment can be obtained. can get.

Further, a photosensitive polyimide resin film may be used instead of the photoresist film 4 and the polyimide resin film 3.

Figure 2 shows the case where the line width of the Al wiring part 2 is wide,
In the figure, the same reference numerals as in FIG. 1 indicate the same parts or corresponding parts, and detailed explanation thereof will be omitted.

That is, as shown in FIG. 2a, only the road shoulder portion 7 is thin and the other portions are thick, so by removing the polyimide resin film 6 by the same film thickness by dry etching, the polyimide resin film 6 is removed as shown in FIG. 2b. As such, only the road shoulder portion 7 is exposed. Next, by etching the exposed PSG film 5 on the road shoulder portion 7, a product as shown in FIG. 2c is obtained. By removing the polyimide resin films 3 and 6, the PSG film 5 can be removed at the same time as the polyimide resin film 3 below it, and as shown in FIG.
A flat surface shape is obtained by the film 5, and by further forming a PSG film 10 (not shown) thereon, the PSG film 10 has a flat surface shape.

As explained above, in the first embodiment, Al
By increasing the level difference in the wiring section 2 with the polyimide resin film 3, a large level difference can be obtained in the PSG film 5 formed thereon, so it is possible to apply a particularly thin layer of the polyimide resin film 6 to the road shoulder part 7. It becomes possible. Therefore, when the polyimide resin film 6 is uniformly etched, it is easy to leave the polyimide resin film 6 above the Al wiring section 2 except for the part including the road shoulder part 7, and to remove the road shoulder part 7 in particular. becomes.

Note that since the roadside portion 7 of the PSG film 5 is selectively etched, it is not necessary to etch the polyimide resin film 6 and the PSG film 5 at substantially the same etching speed as in the conventional example, and therefore the above-mentioned Technical difficulties can be completely avoided.

Further, according to the first embodiment of the present invention, the above
Since it is possible to over-etch the PSG film 5 to some extent, there is a great advantage that the etching conditions are considerably relaxed. Furthermore, since the organic substance used is ultimately removed, there is the advantage that there is no concern that impurities in the organic substance will affect the semiconductor characteristics, unlike in the conventional example.

Next, FIG. 3 shows another embodiment of the present invention. That is, another embodiment of the present invention has the same configuration as the first embodiment shown in FIG. 1d, but as shown in FIG. This is for etching the resin film 6. By the method of this other embodiment, the road shoulder portion 7 of the polyimide resin film 6 can be preferentially etched,
A mask for the polyimide resin film 6 when selectively etching the road shoulder portion 7 of the PSG film 5 can be easily formed. The following steps are the same as those in the first embodiment described above as shown in FIGS. 1e-h.

As shown in the above-described embodiments of the present invention, the planarization technique has wide utility as a method for forming an interlayer insulating film of multilayer wiring in a semiconductor device. Furthermore, according to the above embodiment, the photoresist film coated on the surface of the flat insulating film can be obtained as a uniform film thickness with no unevenness, so this can be applied as a technical means to obtain a highly accurate mask pattern. It is possible to do so.

As described above, according to the present invention, by interposing an organic film between the Al wiring part and the PSG film in the multilayer wiring formation process of a semiconductor device, the PSG
By increasing the step difference in the film and performing a process to form the organic film applied on top of it to be particularly thin on the roadside, it is easy to form a mask during etching by simply removing only the roadside part of the PSG film. , the PSG film surface can be planarized with high precision without the need for technically difficult etching, and as a result, conventional impurity contamination and Al
It is possible to solve the problem of disconnection at the step part of the wiring, and at the same time, it has a wide range of utility value as a method for forming interlayer insulating films in multilayer wiring of semiconductor devices and as a method for obtaining high-precision mask patterns. be effective.

[Brief explanation of drawings]

FIG. 1 is a process explanatory diagram of a semiconductor device showing one embodiment of the present invention, FIG. 2 is a diagram corresponding to FIG. 1 when the line width of the Al wiring part is wide, and FIG. 3 is another embodiment of the present invention. FIG. 1 is a diagram corresponding to FIG. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Al wiring part, 3, 6... Polyimide resin film, 4... Photoresist film, 5, 1
0...PSG film, 7... Road shoulder portion of PSG film 5, 8...
Convex portion of PSG film 5, 9... road shoulder portion of Al wiring portion 2.

Claims (1)

[Claims] 1. A semiconductor device in which a multilayer wiring is formed on a semiconductor substrate by patterning an organic film deposited on a wiring conductor layer, etching the wiring conductor layer using this as a mask, and removing the organic film. In the manufacturing method, an insulating film having approximately the same thickness as the wiring conductor layer is formed on the entire surface including the convex step formed of the wiring conductor layer and the first organic film, and further, By etching and removing the second organic film thinly on the road shoulder and thickly on other parts to a uniform thickness, the remaining film remaining only on the road shoulder is used as a mask to cover the road shoulder. After selectively etching and removing the insulating film, the first and second
1. A method of manufacturing a semiconductor device, comprising: performing a step of removing an organic film.