JPH0328138B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a digital relay, and particularly to a digital relay that is highly adaptable to system changes.

[Technical background of the invention]

Digital relay devices using microcomputers are being developed on a global scale as high-performance protective relay devices that utilize the advanced digital processing capabilities of microcomputers, and some of them have already been put into practical use. Some have been. FIG. 1 is a block diagram of a conventional digital relay device, which will be explained below.

In FIG. 1, 1 is a filter circuit (FIL) that removes unnecessary frequency components from the voltage and current of the system. 2 is sample hold circuit (S/H)
and samples all inputs simultaneously. 3 is a multiplexer, which takes out necessary signals from a plurality of inputs from the sample-and-hold circuit 2; 4 is an analog/digital conversion circuit which sequentially converts the analog signal from the multiplexer 3 into a digital signal. A setting circuit (SET) 5 sets and stores a setting value for the digital relay device, and also sets external conditions for forcing the digital relay device to operate. Reference numeral 6 denotes a direct memory access control circuit (DMA), which operates to send a digital signal output from the analog/digital conversion circuit 4 to a data memory to be described next. A data memory (RAM) 7 stores digital signals sent from the direct memory access control circuit 6, and also stores results of the arithmetic processing device described below. 8 is program memory (PROM)
It stores programs and the like for functioning as a digital relay device. 9 is a digital input circuit (DI), which takes in the setting value output from the setting circuit 5 and external conditions such as forced operation.
Reference numeral 10 denotes an arithmetic processing unit which takes in the outputs of the data memory 7 and the digital input circuit 9 and performs protection calculations etc. according to the program in the program memory 8. Reference numeral 11 denotes a digital output circuit (DO), which outputs trip commands and the like as the arithmetic processing results of the arithmetic processing device 10 to the outside.

When a digital relay device having the above configuration is applied to protect a plurality of line systems, conventionally, system failures, step-outs, overloads, etc. have been detected according to the processing procedure described below.

FIG. 2 shows a processing flow diagram of a digital relay device when detecting step-out and underfrequency in an electric station where four power transmission lines are connected to a double bus. In FIG. 2, step 12 is a line designation processing section which sequentially designates the lines on which step-out detection is to be performed. Next, the process moves to the first comparison section in step 13, where N, which is the output of the line designation processing, is determined to be N.
If it is N5, the process moves to step 14, the line designation initialization section, where N is set to N=1. If it is not N5 or after step 14 has passed, the process moves to step 15 and the current and voltage data of the designated line data is read out. Step 16 is a step-out detection processing section, which performs step-out detection processing using each data provided in step 15. Step 17 is a second comparing section, which outputs a trip command to the corresponding line when it is determined that the corresponding processing line is out of step according to the result of the step-out detection processing section 16, and the step-out detection processing section 16 outputs a trip command to the corresponding line. If not, proceed to the next stage of processing. Step 18 is a third comparison section that determines whether all line processing for which step-out detection is to be performed has been completed. and unfinished (N≠
4), return to step 12, and when all lines have been processed (N=4), proceed to the next step 19.
Transfer processing to Step 19 is a bus voltage data read processing section which reads bus current and voltage data from the data memory 7. Step 20 is an underfrequency detection processing section, which uses the data given by the bus voltage data reading section of step 19 to detect an abnormal drop in frequency. Step 21
is a fourth comparator, which generates a trip output when it is determined as a result of step 20 that the frequency has decreased abnormally, and returns to step 12 when the frequency has not decreased abnormally. Regarding specific processing methods for step-out detection and underfrequency detection, there are impedance measurement methods and period measurement methods, respectively, but since these are already well known, their explanations will be omitted here.

[Problems in the background art] When the digital relay device described above is applied to out-of-step detection and underfrequency detection in electrical stations with multiple lines, the number of lines to be detected is limited to a certain number, considering detection accuracy and operation time. There is a limit. Therefore, in order to detect the number of lines exceeding this limit, it is necessary to install a plurality of digital relay devices. Generally speaking, lines that are likely to cause synchronization are often known in advance from the system configuration, so only the current and voltage data for that line should be input to the digital relay device via cables, etc. Normally, step-out detection is performed for a small number of lines. However, conventional digital relay devices require a long time to change connections such as cables to import current and voltage data into the digital relay device when lines that are prone to synchronization change due to system changes, etc. This method requires a lot of work and has the drawback of requiring a long period of system operation outage.

[Purpose of the invention]

The present invention was made in order to solve the above-mentioned drawbacks, and it is an object of the present invention to provide a digital relay device that is adaptable to system changes and the like.

[Summary of the invention]

In the present invention, the bus voltage configuring the power system,
The current and voltage data of multiple lines connected to this bus are stored in a data memory, and each data of an arbitrary line and bus is selected by the line setting section, and the data specified by the setting section is selected. The aim is to perform calculation processing using the data obtained.

[Embodiments of the invention]

Examples will be described below with reference to the drawings. FIG. 3 is a block diagram showing an embodiment of the digital relay device according to the present invention. In FIG. 3, numerals 1 to 11 correspond to those in FIG. Reference numeral 22 denotes a line setting section (SETI) which sets the line to be detected by external operation. 23 is a digital input section (DI1), which inputs the setting result from the line setting section 22 into the calculation section 10. Other configurations are first
It is similar to the figure.

FIG. 4 is a processing flow diagram of the digital relay device shown in FIG. 3. In Figure 4, step 2
Reference numeral 4 denotes a step-out detection line acquisition section, which is set by the line setting section 22 and is connected to the digital input section 2.
3, one or more lines are taken in and stored in the data memory 7. The reason for incorporating a specific line is that once the system configuration is decided in the power system,
This is because lines that require specific protection operations such as loss of synchronization are identified, and the amount of electricity required for the operation processing must be selected in accordance with changes in the system configuration. Next, the process moves to step 25, a step-out detected line reading section, where the out-of-step detected line stored in the data memory 7 is read out. Reference numeral 26 denotes a corresponding one line data readout unit, which is the out-of-step detected line readout unit 2.
Based on the result of step 5, current and voltage data are read from the data memory 7 for the corresponding line for which step-out detection is to be performed. Step 27 is a step-out detection processing section, which performs step-out detection processing using the current and voltage data of the corresponding one line. Step 28 is a first comparing section, which determines whether or not the aforementioned processing line is out of step. If it is determined that the step is out of step, a trip command is output, and if the step is not out of step, the process proceeds to the next stage. Step 29 is a second comparison section that determines whether or not the step-out detection process for all applicable lines has been completed. If the processing for all applicable lines has not been completed, the processing returns to the single line data reading section 26 in step 26, and if it has been completed, the process proceeds to step 19 and subsequent steps similar to the conventional process.

Note that each process in steps 19, 20, and 21 is the same as in the case of FIG. 2 described above, and since the process here is a protection operation common to all lines, such as detecting an insufficient frequency, detailed explanation will be omitted. do.

FIG. 5 is a configuration diagram of an embodiment of the line setting section.
Note that numerals 22 and 23 in the figure correspond to those in FIG. 22a is a tap constituting the line setting section 22, one end of which is connected to the digital input section 23, and the other end connected to OV. Therefore, by inserting a plug into an arbitrary tap 22a, the line to be detected by the arithmetic processing section 10 is taken in via the digital input section 23.

FIG. 6 is a block diagram of another embodiment of the line setting section. In this embodiment, a case is shown in which a rotary switch is used. Note that in this embodiment as well, the reference numerals in the drawings correspond to those in FIG. 3. 22b is a contact point of the rotary switch 4 constituting the line setting section and is connected to the digital input section 23, and the common terminal is connected to OV. In this case as well, by operating the rotary switch, it is possible to input the line to be detected and processed by the arithmetic processing section 10 via the digital input section 23.

Note that in the above embodiment, a case was shown in which an applicable line was selected for one detection element, ie, step-out detection, and digital processing was performed; however, the present invention is not limited to this. It is clear that digital processing is also possible for a plurality of detection elements with different detection methods such as , accident detection, etc.

〔Effect of the invention〕

As explained above, according to the present invention, current and voltage data of a bus bar and all lines connected thereto are stored in a data memory, and current and voltage data for a small number of lines assumed in advance from the system configuration are stored. The system is configured so that the detection processing for only a small number of lines is performed by reading out only the data from the data memory, which not only enables high-speed and highly accurate detection processing, but also enables highly adaptable digital processing when changing the system configuration. Can provide relay equipment.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram of a conventional digital relay device, FIG. 2 is a processing flow diagram of a conventional digital relay device, and FIG. 3 is a circuit configuration diagram showing an embodiment of a digital relay device according to the present invention. , FIG. 4 is a processing flow diagram showing one embodiment of the digital relay device according to the present invention, FIG. 5 is a block diagram of one embodiment of the line setting section, and FIG. 6 is a block diagram of another embodiment of the line setting section. It is. 1... Filter circuit, 2... Sample hold circuit, 3... Multiplexer, 4... Analog
Digital conversion circuit, 5... Setting circuit, 6... Direct memory access control circuit, 7... Data memory, 8... Program memory, 9... Digital input circuit, 10... Arithmetic processing unit, 11...
Digital output circuit, 22... Line setting section, 22
...Digital input section.

Claims (1)

[Claims] 1. In a digital relay device having single or plural busbar voltages and current and voltage data of a plurality of lines connected to the busbars as inputs, the voltage data of each busbar and the current and voltage data of the plurality of lines are stored. means for selecting from the storage means data for only some specific lines that can be assumed in advance among the plurality of lines; A first means for performing protection calculations for all lines, and a second means for performing protection calculations common to all lines.
A digital relay device comprising: