JPH0353788B2 - - Google Patents

Description

[Detailed Description of the Invention] Semiconductor memory allows stored information to be retrieved easily and at high speed as an electrical signal, and with the development of integrated circuit (hereinafter referred to as IC) technology, large-scale integration (hereinafter referred to as LSI) is possible. Due to its improved bit density and reliability, it has recently been used as a high-speed memory device for electronic computers.

However, unlike magnetic memories, semiconductor memories have the disadvantage that when the supply of bias power is cut off, the stored contents disappear (hereinafter referred to as volatility). In order to obtain a semiconductor memory that does not have this drawback, research has been carried out on the memory function of semiconductor glasses such as chalcogenide glass, but this has not yet reached a practical stage.

In addition, as a non-volatile semiconductor memory, in the field of silicon semiconductor ICs, MNOS field effect transistors having a structure of metal (M), silicon nitride film (N), silicon oxide film (O), and silicon (S) are used. However, in this case, the silicon oxide film (SiO ₂ ) must be made thin enough to allow carriers on the semiconductor surface to tunnel, so pinholes are likely to occur in the silicon oxide film, and the memory climate is near trap-like. Because of this, there is a risk that productivity and reproducibility may be degraded due to the position, and for this reason, it has not been put to practical use in electronic computers.

However, as another field of semiconductor memory, there is a read-only memory (hereinafter referred to as ROM) which takes advantage of the high bit density and high speed of semiconductor memory to read fixed storage contents. There are two ways to configure this ROM, one of which is to provide fixed information on the glass mask used for photo-etching when making ICs. The other method is to manufacture ICs uniformly regardless of the content to be stored, and then electrically write information in accordance with the content to be stored.

Three methods of the latter method are known.
That is, the first method is to fuse the wiring with a current pulse, the second method is to use the memory characteristics of alumina traps, and the third method is
In this method, carriers having the same shape as the semiconductor substrate are injected into the oxide film by avalanche breakdown of the junction between the drain of the MOS transistor and the semiconductor substrate when no channel current flows, and the carriers are buried in the oxide film. This is a method of writing information by charging a polycrystalline silicon thin film layer.

The present invention relates to the third of these three methods, and the conventional method will first be described in more detail with reference to FIG. In this case, as shown in FIG. 1A, a drain region 2 and a source region 3 having a conductivity type opposite to that of the substrate 1 and having a high impurity concentration, a gate silicon oxide film 4, and a silicon A field effect transistor 7 consisting of a silicon polycrystalline layer 6 buried between oxide films 4 and 5 is formed. In this field effect transistor 7, when the drain voltage is increased, a depletion layer 8 spreads from the drain region 2 into the substrate 1, but especially in the portion 9 below the silicon polycrystalline layer 6, an arrow appears. As shown, the electric field is concentrated and becomes higher than other parts of the depletion layer 8, and finally reaches the critical electric field of avalanche. At this time, electron-hole pairs of electrons 10 and holes 11 are generated in this portion 9, as shown in FIG. 1B.
For example, if the substrate 1 is n-type, the electric field causes electrons 10
is accelerated in the direction of the oxide film 4 as shown by arrow 12,
This obtains high energy and injects it into the oxide film 4. The electrons 10 injected in this manner pass through the oxide film 4 and reach the silicon polycrystalline layer 6, charging it negatively. On the other hand, the holes 11 are transported to the drain region 2 as shown by an arrow 13 by the electric field.

By thus obtaining the charged state of the silicon polycrystalline layer 6, information can be written. However, in the conventional methods and structures described above, there is no method or means for controlling the efficiency or speed of writing information, and it has not been possible to improve the writing efficiency or speed.

SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide a method for writing an avalanche injection type nonvolatile field effect transistor that improves the efficiency or speed of writing information.

The present invention provides a source and drain region formed on a semiconductor substrate of one conductivity type and having a conductivity type opposite to that of the semiconductor substrate of one conductivity type, which generates avalanche by applying an arbitrary voltage, and a source and drain region between the source and drain regions. consisting of a gate insulating film provided on a semiconductor substrate, a second insulating film continuous with the gate insulating film, and a first gate electrode embedded between the gate insulating film and the second insulating film, In the avalanche injection type nonvolatile field effect transistor, a second gate electrode is provided to face the first gate electrode with the second insulating film interposed therebetween, and the charge generated by the avalanche injection is transferred to the avalanche injection type nonvolatile field effect transistor. This is a writing method for an avalanche injection type nonvolatile field effect transistor characterized by applying a potential in the direction of injection to the first gate electrode.

The features of the storage method and storage device according to the present invention will become clearer from the following detailed description in conjunction with the drawings.

First, to describe the storage method according to the present invention with reference to FIG. 2, the storage field effect transistor 21 in this case has an insulating film 27 made of a silicon oxide film.
It has the same structure as the field effect transistor 7 of FIG. 1, except that a second gate electrode 23 is provided thereon.

In FIG. 2, 22 is a gate insulating film, and 24 is a gate insulating film.
25 is a drain region, 26 is a source region, 27 is an insulating film continuous to the gate insulating film 22, and 28 is the gate insulating film 22 and the insulating film 2.
The first gate electrode buried between the electrodes 7 and 29 represents a depletion layer, respectively.

By the way, in order to inject the carriers in the substrate 24 into the gate insulating film 22 of the field effect transistor 21, it is necessary to give the carriers enough energy to cross the barrier between the substrate 24 and the insulating film 22. . Therefore, in the case of FIG. 2, the potential of the second gate electrode 23 is set to be the same potential as that of the substrate 24, and a voltage higher than the breakdown voltage with respect to the substrate 24 is applied to the drain region 25. Thus, an avalanche breakdown occurs between the drain region 25 and the substrate 24, which causes the electric field between the electrode 28 and the breakdown point to
It is accelerated in the direction of the electrode 28 and injected into the insulating film 22, and eventually the electrode 28 is charged.

According to the method described above with reference to FIG. 2, information can be written reliably as desired simply by changing the bias conditions of the storage field effect transistor as a storage element, and once the information has been written, It is possible to preserve the element as it is without applying a bias to the element. Therefore, even when a large number of memory unit cells having storage transistors according to this method are incorporated into an actual device, desired bits can be selected and information can be written individually with great ease.

Also, according to the configuration shown in FIG. 2 that realizes this method,
Since the electrode 23 is provided, a potential that accelerates the injected carriers can be applied to the electrode 28, and thereby the carrier injection speed and efficiency are high, so that the first gate electrode 28 can be sufficiently charged. Therefore, it is possible to obtain a memory field effect transistor with good performance as a memory element. Furthermore, by applying the above potential to the electrode 28, the breakdown voltage between the drain region 25 and the substrate 24 can be lowered compared to the structure with only the first gate electrode, so the elements of this structure can be connected in an array. It can also be used for element selection in such cases.

As a result of an experiment using the field effect transistor 70 shown in FIG. 3 according to the method of the present invention, the relationship shown in FIG. 4 was obtained. In this case, the semiconductor substrate 24 is made of n-type silicon with an impurity concentration of 5×10 ¹³ /cm ³ ,
The surface impurity concentration near the junction of the source region 26 with the region 46 is approximately 10 ¹⁶ /cm ³ , the thickness l ₁ of the gate insulating film (SiO ₂ ) 22 is approximately 1000 Å, and the insulating film (SiO ₂ )
The thickness l ₂ of 27 is approximately 1000 Å, and the channel length L is approximately 10 μ.
m, and the voltage of the buried gate electrode (Si) is
For 4, measure the time required to change from 0V to -4V equivalent when writing "1", and from -4V to 0V equivalent when writing "0", and compare the results to the second
gate electrode 23 (Al) and source region 26
It is expressed as time t versus terminal voltage _VGS of (P).

In FIG. 4, the symbols indicate the values obtained when the drain terminal D and source terminal S are grounded, the substrate terminal B is given a positive bias, and the reverse current in the junction between the source region 26 and the region 46 is 100 μA. The sign of the curve is when the substrate terminal B is grounded, the drain terminal D is given a negative bias, the source terminal S is given a slight negative bias, and the reverse current at the junction between the substrate 24 and the drain region 25 is 10 μA. The curves obtained are shown respectively. Note that the curve indicated by the symbol is an example of the present invention in which avalanche precipitation occurred between the drain substrate.

From this measurement result, firstly, the second gate electrode 23
Second, when the voltage of the second gate electrode 23 changes in a direction that promotes electron injection, the writing time is significantly shortened. It has been demonstrated that two gate voltages direct the charge generated by avalanche breakdown into the first gate electrode, and third, the writing time decreases inversely with the avalanche current of the junction undergoing breakdown. Ta. Furthermore, it has been found that the transistor to be written can be selected from the cells arranged in an array by biasing the second gate electrode.

As described above, according to the present invention, it is possible to obtain a semiconductor memory that combines the high speed of readout that semiconductor memory inherently has and the nonvolatile memory that has conventionally been put into practical use only with magnetic memory. When manufacturing such a memory, it is possible to easily manufacture it at high density using conventional silicon gate technology or molybdenum gate technology without requiring any other special technology.

Further, according to the present invention, since the voltage applied to the memory non-volatile field effect transistor and the voltage applied during writing can be set to the necessary and sufficient level, the write operation of the memory non-volatile field effect transistor can be ensured and can be made faster. It has the advantage of stable operation.

In addition, in the above explanation, the memory contents are "1" and "0".
It is clear that it can also be used to store non-volatile analog information, although this is digital information. Furthermore, the information stored in the transistor of the present invention can be erased with ultraviolet light.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a field effect transistor for explaining a conventional information writing method, and FIG. 2 is a cross section showing a storage field effect transistor for explaining an example of a nonvolatile memory storage method according to the present invention. 3 and 4 are diagrams showing experimental results according to an example of the method of the present invention. In the figure, 21, 70... memory field effect transistor, 22... gate insulating film, 23... second gate electrode, 24... semiconductor substrate, 25... drain region, 26, 54... source region, 27... Insulating film, 28... First gate electrode, 29... Depletion layer, 30... Channel, 31... Pinch-off region.

Claims (1)

[Claims] 1 A semiconductor substrate of one conductivity type, a drain region of the opposite conductivity type to the one conductivity type semiconductor substrate, which is formed on the one conductivity type semiconductor substrate and generates avalanche precipitation by applying an arbitrary voltage, and a drain region of the opposite conductivity type. a source region, a gate insulating film provided on a semiconductor substrate between the source and drain regions, a second insulating film continuous with the gate insulating film, and a second insulating film embedded in the gate insulating film and the second insulating film. In the avalanche injection type nonvolatile field effect transistor, the avalanche injection type nonvolatile field effect transistor is further provided with a second gate electrode provided so as to face the first gate electrode with the second insulating film interposed therebetween. . A writing method for an avalanche injection nonvolatile field effect transistor, characterized in that a potential is applied in a direction to inject charges generated by the avalanche into the first gate electrode.