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JPH0415656B2 - - Google Patents
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JPH0415656B2 - - Google Patents

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Publication number
JPH0415656B2
JPH0415656B2 JP56200154A JP20015481A JPH0415656B2 JP H0415656 B2 JPH0415656 B2 JP H0415656B2 JP 56200154 A JP56200154 A JP 56200154A JP 20015481 A JP20015481 A JP 20015481A JP H0415656 B2 JPH0415656 B2 JP H0415656B2
Authority
JP
Japan
Prior art keywords
current
circuit
supply
switch circuit
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56200154A
Other languages
Japanese (ja)
Other versions
JPS58101556A (en
Inventor
Ichiro Oohigata
Junjiro Kitano
Toshio Hayashi
Toshuki Tawara
Isamu Ueki
Kenzo Takada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Oki Electric Industry Co Ltd
NTT Inc
Original Assignee
Fujitsu Ltd
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP56200154A priority Critical patent/JPS58101556A/en
Publication of JPS58101556A publication Critical patent/JPS58101556A/en
Publication of JPH0415656B2 publication Critical patent/JPH0415656B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M19/00Current supply arrangements for telephone systems
    • H04M19/001Current supply source at the exchanger providing current to substations
    • H04M19/005Feeding arrangements without the use of line transformers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Signal Processing (AREA)
  • Devices For Supply Of Signal Current (AREA)

Description

【発明の詳細な説明】 本発明は電話交換機における電話機等への直流
電流供給回路に係り、特に半導体集積回路化に好
適な直流供給遮断回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DC current supply circuit for telephones and the like in a telephone exchange, and more particularly to a DC supply cutoff circuit suitable for semiconductor integrated circuits.

例えば電話機の直流電流供給回路としては、レ
ターコイルが用いられて来たが、時分割交換機に
おいて各加入者対応に直流電流供給回路を設ける
構成をとろうとすると、実装容量が大となる問題
があつた。このため電子化さらには半導体集積回
路化して小形化を図るべく、種々の提案がなされ
ている。第1図はその代表的な構成を示すもの
で、1はレターコイルと等価な特性を有する電子
化直流電流供給回路、2は4個のPNPNスイツ
チS1,S2,S3,S4で構成される直流電流極性反転
回路、3は電話機である。
For example, letter coils have been used as DC current supply circuits for telephones, but when trying to configure a time-sharing switch to provide a DC current supply circuit for each subscriber, there is a problem in that the mounting capacity becomes large. Ta. For this reason, various proposals have been made to reduce the size of the device by electronic or even semiconductor integrated circuits. Figure 1 shows its typical configuration. 1 is an electronic DC current supply circuit with characteristics equivalent to a letter coil; 2 is a circuit consisting of four PNPN switches S 1 , S 2 , S 3 , and S 4 . The DC current polarity reversing circuit is constructed, and 3 is a telephone.

かかる構成における直流電流供給回路において
は、2組の電流通路を形成しているPNPNスイ
ツチS1,S4又はS2,S3を開放するために、電子化
直流電流供給回路1に電流開閉機能を持たせる
か、PNPNスイツチS1〜S4にゲートターンオフ
機能を持たせる必要がある。ここで、直流電流と
して100mA程度の大電流を切断する必要がある
場合には、半導体集積回路化したPNPNスイツ
チでゲートターンオフ動作させるのは困難であ
る。
In the DC current supply circuit having such a configuration, the electronic DC current supply circuit 1 is provided with a current switching function in order to open the PPN switches S 1 , S 4 or S 2 , S 3 forming the two sets of current paths. It is necessary to provide a gate turn-off function to the PNPN switches S 1 to S 4 . Here, if it is necessary to cut off a large DC current of about 100 mA, it is difficult to perform gate turn-off operation with a PNPN switch made of a semiconductor integrated circuit.

本発明はこのような状況に鑑みて発明されたも
ので、半導体集積回路化して、容易に直流電流の
開閉を行ない得る直流供給遮断回路を提供するこ
とを目的とする。
The present invention was devised in view of the above situation, and an object of the present invention is to provide a DC supply cutoff circuit which is implemented as a semiconductor integrated circuit and can easily switch on and off the DC current.

本発明においては、半導体集積回路化されたゲ
ートターンオフPNPNスイツチを用いるととも
に、遮断所望時にそのゲートとカソードの間を短
絡することでPNPNスイツチをゲートターンオ
フさせ得る程度の電流レベルまで直流電流供給回
路の電流を低下させた後、ゲートターンオフ動作
をすることにより、直流供給の遮断動作を行なう
ようになしたことを特徴とする。
In the present invention, a gate turn-off PNPN switch implemented as a semiconductor integrated circuit is used, and the DC current supply circuit is turned off to the extent that the gate of the PNPN switch can be turned off by short-circuiting its gate and cathode when shutoff is desired. The present invention is characterized in that the DC supply is cut off by performing a gate turn-off operation after reducing the current.

以下本発明を図面に示した一実施例回路により
詳細に説明する。第2図は本発明の第1の実施例
を示し、図において、11は内部抵抗を可変とな
した直流電流供給回路、R0は基準抵抗、Aa,
Ab,Ba,Bb,Ca,Cbは直流電流供給回路11
の内部抵抗を基準抵抗R0の1/n化する負帰還
回路を構成する電流伝達回路、Q1,Q2は負帰還
回路を遮断するトランジスタである。12は直流
電流極性反転回路、S1〜S4はPNPNスイツチ、
Q3〜Q6はゲートターンオフ用のトランジスタで
ある。13は電圧VBB(−48V)を持つ電源であ
る。
The present invention will be explained in detail below with reference to an embodiment circuit shown in the drawings. FIG. 2 shows the first embodiment of the present invention. In the figure, 11 is a DC current supply circuit with variable internal resistance, R 0 is a reference resistance, Aa,
Ab, Ba, Bb, Ca, Cb are DC current supply circuit 11
Q 1 and Q 2 are transistors that cut off the negative feedback circuit. 12 is a DC current polarity inversion circuit, S 1 to S 4 are PNPN switches,
Q3 to Q6 are gate turn-off transistors. 13 is a power supply having voltage V BB (-48V).

直流電流供給回路11はVBB/2点を中心にして サフイツクスa,bで示した上下対象な平衡形回
路で構成されている。サフイツクスaで示した上
側の回路動作を説明すると抵抗R0を通して流れ
る電流IROが電流伝達回路Aaの入力に入り、その
出力はα倍αIROされて次の電流伝達回路Baの入
力電流となり、これがさらにβ倍αβIROされて次
の電流伝達回路Caの入力電流となり、その出力
がさらにまたγ倍αβγIROされる。すなわち、直流
電流供給回路の入力電流IaはROを流れる電流を
IROとすると Ia=IRO(1+α・β・γ) …(1) 入力電圧Vaとすると IRO=Va/RO …(2) 従つて内部抵抗Rinaは Rina=Va/Ia=RO/1+α・β・γ≒ RO/α・β・γ …(3) サフイツクスbで示した下側の回路も同様に求
められ内部抵抗Rinbとすると Rinb=Vb/Ib≒RO/α・β・γ …(4) 従つて上側、下側の内部抵抗RinOは RinO=Rina+Rinb =2RO/1+α・β・γ≒2RO/α・β・γ …(5) で表わされる。トランジスタQ1,Q2をオンさせ
るとAa,Abでの電流伝達αが0となり負帰還回
路が遮断されるため、内部抵抗Rin0は Rin0≒2RO …(6) となる。すなわち内部抵抗はα・β・γ倍され
る。
The DC current supply circuit 11 is composed of a vertically symmetrical balanced circuit shown by suffixes a and b centered on the V BB /2 point. To explain the operation of the upper circuit shown by suffix a, the current IRO flowing through the resistor R0 enters the input of the current transfer circuit Aa, and its output is multiplied by αIRO and becomes the input current of the next current transfer circuit Ba. This is further multiplied by αβI RO to become the input current of the next current transfer circuit Ca, and its output is further multiplied by αβγI RO by γ. In other words, the input current Ia of the DC current supply circuit is the current flowing through R O
If I RO , then Ia=I RO (1+α・β・γ) …(1) If the input voltage Va, then I RO = Va/R O …(2) Therefore, the internal resistance Rina is Rina=Va/Ia=R O / 1+α・β・γ≒ R O /α・β・γ …(3) The lower circuit shown by suffix b is found in the same way, and if the internal resistance is Rinb, then Rinb=Vb/Ib≒R O /α・β・γ...(4) Therefore, the upper and lower internal resistances Rin O are expressed as Rin O = Rina + Rinb = 2R O /1 + α・β・γ≒2R O /α・β・γ (5). When the transistors Q 1 and Q 2 are turned on, the current transfer α in Aa and Ab becomes 0 and the negative feedback circuit is cut off, so that the internal resistance Rin0 becomes Rin0≈2R O (6). In other words, the internal resistance is multiplied by α, β, and γ.

通常、Rin0=440Ωに選ばれ、電源4は−48V
が使用されるため、100mA程度の電流まで
PNPNスイツチS1〜S4を流れることになる。こ
の電流を半導体集積回路化したPNPNスイツチ
で切断するのは容易ではない。
Usually Rin 0 = 440Ω is chosen and power supply 4 is -48V
is used, so the current up to about 100mA
It will flow through PNPN switches S1 to S4 . It is not easy to cut off this current using a PNPN switch implemented in a semiconductor integrated circuit.

しかし本発明によれば、基準抵抗ROを数10KΩ
に選び、直流供給遮断時にトランジスタQ1,Q2
により上記負帰還路を遮断すれば、PNPNスイ
ツチS1〜S4を流れる電流は、上記(2)式のように内
部抵抗が増大されることから1mA程度に低くす
ることができる。従つてこの程度の電流になれ
ば、半導体集積回路化したPNPNスイツチS1
S4でもゲートとカソードの間をそれぞれトランジ
スタQ3〜Q0で短絡することにより、容易に切断
することが可能になる。
However, according to the present invention, the reference resistance R O can be set to several tens of kilohms.
transistors Q 1 and Q 2 when the DC supply is cut off.
If the negative feedback path is cut off, the current flowing through the PNPN switches S 1 to S 4 can be reduced to about 1 mA since the internal resistance is increased as shown in equation (2) above. Therefore, if the current reaches this level, the PNPN switch S 1 ~
S4 can also be easily disconnected by short-circuiting the gate and cathode using transistors Q3 to Q0 , respectively.

第3図は本発明の第2の実施例を示す等価回路
で、第2図で示した直流電流供給回路11の基準
抵抗ROを、中点電位VBB/2側に接続した場合の構 成例を示すものである。第3図において、IOは定
電流源、A,B,Cは第2図と同様の電流伝達回
路で、直流電流供給回路21の内部抵抗を基準抵
抗ROの1/n化する負帰還回路を構成する。
FIG. 3 is an equivalent circuit showing a second embodiment of the present invention, in which the reference resistor R O of the DC current supply circuit 11 shown in FIG. 2 is connected to the midpoint potential V BB /2 side. This is an example. In FIG. 3, I O is a constant current source, A, B, and C are current transfer circuits similar to those in FIG. 2, and negative feedback reduces the internal resistance of the DC current supply circuit 21 to 1/n of the reference resistance R O. Configure the circuit.

この回路構成における直流電流供給回路21の
動作を第2図と同様にVBB/2から上側の回路で説 明すると、抵抗ROを通して流れる電流が電流伝
達回路Aaでα倍され、これがさらに電流伝達回
路Baでβ倍され、この電流と定電流IOとの差分
が電流伝達回路Caの入力に入り、これがγ倍さ
れる。すなわち直流電流供給回路の入力電流Iaは
ROを流れる電流をIROとすると Ia=−IRO+(IO−IROα・β)γ …(7) トランジスタQ7をオンさせるとAa,Abでの
電流伝達αが0となるため Ia=−IRO+IO …(8) となる。この時IOは定電流のため内部抵抗Rina≒
ROであり直流電流供給 回路21の上下合せた
内部抵抗Rin1は Rin1=Rina+Rinb≒2RO …(9) に見える。すなわち第2図の構成と同様に直流電
流供給回路の内部抵抗を高抵抗化し、PNPNス
イツチS1〜S4をゲートターンオフ動作させて直流
電流の遮断を容易に行うことができる。
The operation of the DC current supply circuit 21 in this circuit configuration will be explained using the circuit above V BB /2 as in FIG. 2. The current flowing through the resistor R O is multiplied by α in the current transfer circuit Aa, and this is further The current is multiplied by β in circuit Ba, and the difference between this current and constant current I O enters the input of current transfer circuit Ca, where it is multiplied by γ. In other words, the input current Ia of the DC current supply circuit is
If the current flowing through R O is I RO , then Ia = −I RO + (I O − I RO α・β) γ …(7) When transistor Q7 is turned on, the current transfer α at Aa and Ab becomes 0. Ia=−I RO + I O …(8). At this time, since I O is a constant current, the internal resistance Rina≒
R O and the internal resistance Rin1 of the upper and lower parts of the DC current supply circuit 21 appears to be Rin1=Rina+Rinb≒2R O (9). That is, similar to the configuration shown in FIG. 2, the internal resistance of the DC current supply circuit is made high, and the gate turn-off operation of the PNPN switches S1 to S4 is performed, thereby easily interrupting the DC current.

上記した実施例はいずれも平衡形回路の構成例
を示したが、本発明は不平衡形回路にも適用でき
るものである。また実施例中の電流伝達回路A,
B,Cは良く知られた電流ミラー回路で構成する
ことができる。さらにまたPNPNスイツチS1
S4のゲートターンオフ動作は、ゲートカソード間
の短絡だけでなく、ゲートからより低電位へ向け
てゲート電流を逆流させることによつて行う回路
構成をとつてもよいことは勿論である。
Although the above-mentioned embodiments all show configuration examples of balanced circuits, the present invention can also be applied to unbalanced circuits. In addition, current transfer circuit A in the embodiment,
B and C can be constructed from well-known current mirror circuits. Furthermore, PNPN switch S 1 ~
Of course, the gate turn-off operation of S4 may be performed not only by a short circuit between the gate and cathode, but also by a circuit configuration in which the gate current flows backward from the gate toward a lower potential.

以上詳しく説明したように、本発明は、通常時
においては直流電流供給回路11,21内の基準
抵抗ROを低抵抗化(1/n)せしめてPNPNス
イツチに大電流を供給し、直流供給遮断時には、
上記供給回路11,21内の抵抗値を高抵抗化す
ることによつてPNPNスイツチS1〜S4への流通
電流を小電流化し、この時PNPNスイツチをゲ
ートターンオフせしめるものであるから、直流電
流の開閉がきわめて容易にでき、この種回路の半
導体集積回路化にきわめて好都合なものである。
As explained above in detail, the present invention lowers the resistance (1/n) of the reference resistance R O in the DC current supply circuits 11 and 21 in normal times to supply a large current to the PNPN switch, thereby supplying DC current. When shutting off,
By increasing the resistance value in the supply circuits 11 and 21, the current flowing to the PNPN switches S 1 to S 4 is reduced, and at this time the gate of the PPNN switch is turned off. It is extremely easy to open and close the circuit, making it extremely convenient for converting this type of circuit into a semiconductor integrated circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の直流電流供給回路の回路図、第
2図及び第3図は本発明による直流供給遮断回路
の一実施例を含む直流電流供給回路の2つの実施
例を示す回路図である。 11,21……直流電流供給回路、12……直
流電流極性反転回路、RO……基準抵抗、A,B,
C……電流伝達回路、Q1,Q2,Q7……トランジ
スタ、S1〜S4……PNPNスイツチ、Q3〜Q0……
ゲートターンオフ用トランジスタ、IO……定電流
源。
FIG. 1 is a circuit diagram of a conventional DC current supply circuit, and FIGS. 2 and 3 are circuit diagrams showing two embodiments of the DC current supply circuit, including one embodiment of the DC supply cutoff circuit according to the present invention. . 11, 21...DC current supply circuit, 12...DC current polarity inversion circuit, R O ...Reference resistance, A, B,
C...Current transfer circuit, Q1 , Q2 , Q7 ...Transistor, S1 to S4 ...PNPN switch, Q3 to Q0 ...
Gate turn-off transistor, I O ...constant current source.

Claims (1)

【特許請求の範囲】 1 端末に結合され、ゲートターンオフ機能を備
えたスイツチ回路と、電源と、該電源と上記スイ
ツチ回路との間に設けられ、該スイツチ回路に第
1の大電流と該スイツチ回路のゲートターンオフ
が可能で、その保持電流以上の電流値であり、か
つ、上記第1の大電流より小さい第2の小電流を
切り替えて供給する直流電流供給回路からなる直
流供給遮断回路であつて、 上記直流電流供給回路は、上記スイツチ回路と
上記電源との間に結合された所定の抵抗値を有す
る基準抵抗及び該基準抵抗に流れる電流を増幅し
て上記スイツチ回路を通して上記端末に供給する
電流伝達回路手段と、該電流伝達回路手段に結合
され、上記スイツチ回路の直流供給遮断時に該電
流伝達回路手段を制御し、上記直流電流供給回路
の内部等価抵抗を増大する手段とからなり、 上記スイツチ回路の直流供給遮断時において、
上記電流伝達回路手段を制御して、上記直流電流
供給回路の内部等価抵抗値を大きくならしめ、上
記直流電流供給回路から上記スイツチ回路への供
給電流を上記第1の大電流から上記第2の小電流
に切り替えた後、上記スイツチ回路をゲートター
ンオフ動作させ、これにより電流を遮断すること
を特徴とする直流供給遮断回路。
[Scope of Claims] 1. A switch circuit coupled to a terminal and having a gate turn-off function, a power supply, and a switch circuit provided between the power supply and the switch circuit, and supplying a first large current to the switch circuit. A DC supply cutoff circuit that is capable of turning off the gate of the circuit, and is composed of a DC current supply circuit that switches and supplies a second small current whose current value is higher than the holding current and which is smaller than the first large current. The DC current supply circuit includes a reference resistor having a predetermined resistance value coupled between the switch circuit and the power supply, and amplifies the current flowing through the reference resistor and supplies the amplified current to the terminal through the switch circuit. the current transfer circuit means; and means coupled to the current transfer circuit means for controlling the current transfer circuit means when the DC supply to the switch circuit is cut off and increasing the internal equivalent resistance of the DC current supply circuit; When the DC supply to the switch circuit is cut off,
The current transfer circuit means is controlled to increase the internal equivalent resistance value of the DC current supply circuit, and the current supplied from the DC current supply circuit to the switch circuit is changed from the first large current to the second large current. A DC supply cutoff circuit characterized in that after switching to a small current, the switch circuit is operated to turn off the gate, thereby cutting off the current.
JP56200154A 1981-12-14 1981-12-14 Direct current supply and interrupting circuit Granted JPS58101556A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56200154A JPS58101556A (en) 1981-12-14 1981-12-14 Direct current supply and interrupting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56200154A JPS58101556A (en) 1981-12-14 1981-12-14 Direct current supply and interrupting circuit

Publications (2)

Publication Number Publication Date
JPS58101556A JPS58101556A (en) 1983-06-16
JPH0415656B2 true JPH0415656B2 (en) 1992-03-18

Family

ID=16419681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56200154A Granted JPS58101556A (en) 1981-12-14 1981-12-14 Direct current supply and interrupting circuit

Country Status (1)

Country Link
JP (1) JPS58101556A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS603258A (en) * 1983-06-21 1985-01-09 Oki Electric Ind Co Ltd Polarity inverting system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4424825Y1 (en) * 1966-02-16 1969-10-20
JPS51114856A (en) * 1975-04-01 1976-10-08 Mitsubishi Electric Corp Semiconductor switch
JPS545649A (en) * 1977-06-15 1979-01-17 Mitsubishi Electric Corp Gate turn-off thyristor
JPS587105B2 (en) * 1979-01-17 1983-02-08 日本電気株式会社 Terminal startup method

Also Published As

Publication number Publication date
JPS58101556A (en) 1983-06-16

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