JPH0426147B2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Technical Field of the Invention The present invention relates to an automatic wiring route determination processing method, and in particular to a process for determining wiring routes along wiring grids formed on both sides of a printed circuit board. This provides information for setting a wiring grid area with multiple wiring grids as one unit, and when determining wiring routes within each wiring grid area, it is possible to determine the wiring route in two dimensions on one surface of the printed board. The present invention relates to an automatic wiring route determination processing method that easily performs a process of allowing an extended route.

(B) Technical Background and Problems Conventionally, when determining the wiring route to be placed on a printed circuit board, a wiring route search processing unit is used to determine the wiring route as shown in Figure 7. is being carried out. In addition, in Fig. 7,
1 represents a wiring route search processing section, 2 represents a wiring result storage memory, and 3 represents a wiring processing information input section. That is, desired information is input from the wiring processing information input section 3, a wiring route is determined by the wiring route search processing section 1, and the obtained wiring route is stored in the wiring result storage memory 2.

This situation will be explained with reference to FIG. In the figure, 4 is a printed board, 5 is a wiring grid formed on both the front and back sides of the printed board 4, and the wiring route to be determined is determined along the wiring grid, and 5-1 is a grid. Point, 6 is
IC pin, 7 is a via formed on the printed board,
Reference numeral 8 represents a wiring route formed on, for example, the front side of the printed board, and 9 represents a wiring route formed on the back side of the printed board.

The processing in the wiring route search processing section 1 shown in FIG. 7 will be described later with reference to FIG. 2, but for example, when determining the wiring route from IC pin 6A to IC pin 6B shown in FIG. For example, on the front side of the printed board, a wiring route 8 is provided that extends only in the illustrated X-axis direction (extension in the Y-axis direction for one grid is allowed), and on the back side of the printed board, it is provided in the illustrated Y-axis direction. Only in the direction (1
(The extension of the lattice portion in the X-axis direction is allowed.) An extending wiring route 9 is provided, and when connecting the two wiring routes 8 and 9, vias 7 are formed on the printed board 4 to connect them. That's what I do. Of course, when determining the wiring route between the IC pins 6A and 6B, the wiring route is determined by using only the surface of the printed board 4, for example, and extending in both the X-axis direction and the Y-axis direction. However, if this decision is allowed, it may undesirably intersect with the wiring route 8 between the IC pins 6C and 6D shown in FIG. For this purpose, the wiring route 8 extending in the X-axis direction and the wiring route 9 extending in the Y-axis direction are coupled by vias 7 to avoid the above-mentioned intersection.

The wiring route search processing unit 1 shown in FIG. 7 determines the wiring route as explained with reference to FIG. As in the case with 9, other X
If the wires are not intersected by wiring routes extending in the axial direction, there is no reason to take the trouble to create vias 7 and utilize both the front and back sides of the printed board. In addition, in cases where it is necessary to run the wiring with an extremely slight shift in the Y-axis direction, such as the wiring routes 8-1, 8-2, and 8-4 shown in FIG.
It is not preferable to provide a via 7 as described with reference to FIG. 5 every time a route in the Y-axis direction is provided.

As described above, allowing routes extending in both the X-axis direction and the Y-axis direction on the same plane requires processing to avoid the above-mentioned intersections. Furthermore, as explained in connection with FIG. 6, it is also undesirable to provide an undesirably large number of vias 7. In order to solve these conflicting problems, the basic policy is to prohibit the extension of both the X and Y axes, and to
It is desirable to give special consideration to areas where problems such as those described in connection with the figures occur. In addition, when adding this special consideration, it is desirable that the processing system that performs the automatic wiring route determination process can be correctly understood and that there is no human complexity.

(C) Object and structure of the invention The present invention aims to solve the above-mentioned points, especially those mentioned in relation to FIG. , set a wiring grid area UNiT in which multiple wiring grids 5, for example, five wiring grids are one unit, and
When determining wiring routes within one UNiT, the purpose is to eliminate the presence of vias 7 as much as possible. Therefore, the wiring route automatic determination processing method of the present invention has wiring pattern information related to the grid points corresponding to the grid points in the wiring grid formed on one side of the printed board, and also has wiring pattern information related to the grid points on the other side of the printed board. A storage device is provided corresponding to a grid point in a wiring grid formed on a surface and has wiring pattern information related to the grid point, and at least one of the grid points is set as a starting point and at least one other of the grid points is set as a starting point. In a wiring route processing system that determines a wiring route passing through the wiring grid using a wiring route search processing unit that determines a wiring route with one end point on the printed board, the wiring route search processing unit a one-dimensional search condition state mode in which a substantially one-dimensional search is performed on one surface of the printed board and a two-dimensional search condition state mode in which a two-dimensional search is performed on one surface on the printed board; After providing a setting section and causing the wiring grid area setting section to set a wiring grid area in which a plurality of wiring grids are one unit,
The wiring route search processing section is configured to give identification information to each wiring grid in the same wiring grid area so as to be distinguishable from wiring grids in other wiring grid areas, and the wiring route search processing section is configured to give identification information to each wiring grid in the same wiring grid area, When determining a wiring route within each individual wiring grid area, the wiring route search processing section processes the wiring route in a two-dimensional search condition state mode by referring to the identification information in the wiring grid area; When determining a wiring route to move to another wiring grid area, the wiring route search processing section is processed in a one-dimensional search condition state mode, and the wiring result is stored in the storage device. It is characterized by This will be explained below with reference to the drawings.

(D) Embodiments of the Invention FIG. 1 shows the configuration of an embodiment for carrying out the method of the present invention, FIG. 2 is an explanatory diagram illustrating the processing in the wiring route search processing section shown in FIG. Similarly, FIG. 4 shows a flowchart specifically representing the processing in the wiring route search processing section. In addition, FIG. 5 is an explanatory diagram explaining the prerequisite problem of the present invention,
FIG. 6 shows an explanatory diagram for explaining the wiring grid region according to the present invention, and FIG. 7 shows an explanatory diagram for explaining the conventional method.

In Fig. 1, the numbers 1, 2, and 3 in the figure are the 7th
Corresponding to the figure, 11 represents a wiring grid area setting section. As explained with reference to FIGS. 5 and 7, the illustrated wiring route search processing unit 1 searches wiring routes extending in the X-axis direction on the front surface of the printed board, and wiring routes extending in the Y-axis direction on the back surface of the printed board. A two-dimensional search condition that has a search function in the one-dimensional search condition state where the route is determined, and can extend in either the X-axis direction or the Y-axis direction only on the front or back side of the printed board. It has a state search function. It can be considered that the mode can be changed by switching the mode.

Before explaining the present invention, the processing in the illustrated wiring route search processing section 1 will be explained.

As shown in FIG. 2A, "lattice point information" is stored in the memory corresponding to the grid points 5-1, 5-1, . . . shown in FIG. Note that the memory shown in FIG. 2A may be considered to be stored and input into the wiring processing information input section 3 shown in FIG. Generally the coordinates (xi,
It can be considered that the following is described as the grid point information corresponding to the grid point with yi).

That is, the types of information are (a) "Numberable grid" information that indicates whether or not it is permissible to spread numbering for wiring route searching as described later; (b) wiring route searching. (c) "Route search start or end grid point" information indicating that the wiring route is a starting point or end point (such as the position of an IC pin); (c) "Obstacle" information indicating that the wiring route is prohibited; "Object grid point" information is prepared, and as data for each information, (d) Corresponding to the information in (a) above, data indicating that it is vacant or the number that has been propagated is written, ( e) Corresponding to the information in (b) above, it is written whether it is a start point S, a point SN adjacent to the start point, an end point E, or a point EN adjacent to the end point, (f) Corresponding to the information in (c) above, the multiplicity of obstacles is described. Furthermore, whether or not the grid point is prohibited from forming a via, and if so, its multiplicity is given.

Assuming that the wiring route search processing unit 1 shown in FIG. 1 is in a mode that allows the above-mentioned two-dimensional search, the wiring route search is performed as shown in FIGS. 2B and 2C.

First, as shown in FIG. 2B, the starting point S of the wiring route is the coordinates (0, 0) as shown,
Information such as that the end point E is at coordinates (7, 0) and the obstacle grid point is at coordinates (4, 0) is stored (or has been stored) in the memory 10 shown in FIG. 2A. ). In addition, the coordinates (1, 0), (0,
1), (-1, 0), (0-1) are adjacent points to the starting point
Being SN, the coordinates (8, 0), (7, 1),
It is stored that (6, 0) and (7, -1) are points EN adjacent to the end point.

Under this state, the above lattice point is stored on memory a12.
Collect grid point information regarding SN. Then, focusing on one grid point SN (for example, coordinates (1, 0)),
A lattice of lattice points corresponding to coordinates (2, 0), (1, 1), (1, -1) in two-dimensional directions (however, one direction is omitted because it is the direction of the ripple source) adjacent to the lattice point. The point information is collected on the memory b13, and the number "1" is given to the "numberable grid" information of the grid point. Similarly, focusing on the grid point SN (coordinates (0, 1)), coordinates (1, 1), (0, 2),
Collect the lattice point information about the lattice points corresponding to (-1, 1) on the memory b13 and set the number "1"
give. In the same manner, when the number "1" has finished spreading next to the grid point SN, next memory b13
The contents of the grid point are transferred to the memory a12, and the neighboring grid points to which the number "1" has spread are collected in the memory b13, thereby giving the number "2". That is, as shown in FIG. 2B, the numbers "1", "2",
``3''... will spread in sequence. At this time, if there is an obstacle grid point as in the case of coordinates (4, 0), the ripple effect is performed while avoiding it. While carrying out such propagation, when the grid point EN is reached as shown in FIG. 2B, the propagation process is stopped there. In the explanation given with reference to FIG. 2B above, only the influence on the surface of the printed board 4 is considered, but in reality, if it is allowed to create a via at each lattice point, the corresponding lattice point It is made to spread from the beginning to the other side.

When the propagation continues as described above and reaches the end point, the wiring route is determined by tracing the propagation route in reverse. That is, in the case shown in FIG. 2B, for example, the wiring route is determined to follow the arrow R in the diagram in the opposite direction to reach the starting point S, and the wiring route is determined to follow the arrow R, and the wiring route is determined to correspond to each lattice point that the route passes through. Indicates that the grid point is on the route in the grid point information.

FIG. 3 shows a flowchart corresponding to the above-mentioned spread, and FIG. 4 shows a flowchart corresponding to the process of retracing the above-mentioned spread route. "Memory c" in the figure indicates the memory 10 shown in FIG. 2A,
"Memory a" indicates the memory 12 shown in FIG. 2C,
"Memory b" indicates the memory 13 shown in FIG. 2C. Further, "being an X layer" refers to one surface of the printed board 4, and "not being an X layer" refers to another surface of the printed board 4. Furthermore, “X+1” in the diagram
is one lattice point to the right of the X coordinate value "X" of the lattice point of interest, "X-1" is one lattice point to the left of the X coordinate value "X", and "Y+1"
``Y-1'' is the lattice point one above the Y coordinate value ``Y'' of the lattice point of interest, which is also one lattice point with respect to the Y coordinate value ``Y'', and is the ``opposite side.'' indicates a lattice point that has the same coordinate values (X, Y) as the lattice point of interest and is on the opposite side of the printed board.

The illustrations in FIGS. 3 and 4 are flowcharts corresponding to processes in which one-dimensional search and two-dimensional search are performed according to the present invention.

As described above, the processing in the wiring route search processing unit shown in FIG. 1 is performed, but the wiring grid area setting unit 11 shown in FIG. Common special information is set for each wiring grid area so that it can be distinguished from that at grid points located in other wiring grid areas. The wiring route search processing unit 1 performs a two-dimensional search when performing the above-mentioned spread within the same wiring grid area, and performs a one-dimensional search when moving to another wiring grid area.

Wiring information is input from the input unit 3 shown in FIG. 1, and at this time, the wiring grid area setting unit 11 writes information that can be identified for each wiring grid area in each grid information. Of course, the above-mentioned start point S, end point E, etc. are given. and,
In this state, the wiring route search processing section 1 performs the above-mentioned search. At this time, the wiring route search processing section 1
When performing the propagation described with reference to FIG. 2B and FIG. 2C, propagation is performed by two-dimensional search for grid points in the same wiring grid area,
In addition, when moving to another wiring grid area, it operates to perform a one-dimensional search. The wiring route thus obtained is stored in the wiring result storage memory 2. That is, as shown in FIG. 6, when moving to another wiring grid area, the via 7 shown in FIG.
The via 7 will be created as shown in the figure. Needless to say, even within the same wiring grid area UNiT, vias 7 may be provided if necessary so that both the front and back sides of the printed board are used.

(E) Effect of the Invention As explained above, according to the present invention, as explained with reference to FIG. 6, vias are not used as much as possible within the same wiring grid area, and undesired Existence disappears. Furthermore, the possibility of improving the wiring density within the wiring grid region increases.

[Brief explanation of drawings]

FIG. 1 is an exemplary configuration for carrying out the method of the present invention, FIG. 2 is an explanatory diagram explaining the processing in the wiring route search processing section shown in FIG. 1, and FIGS. 3 and 4 are wiring route searching. A flowchart specifically representing processing in the processing section is shown. In addition, FIG. 5 is an explanatory diagram explaining the prerequisite problem of the present invention,
FIG. 6 is an explanatory diagram for explaining the wiring grid area according to the present invention, and FIG. 7 is an explanatory diagram for explaining the conventional method. In the figure, reference numeral 1 is a wiring route search processing unit, 2 is a wiring result storage memory, 3 is a wiring processing information input unit, and 4
is a printed board, 5 is a wiring grid, 5-1 is a grid point,
UNiT represents the wiring grid area.

Claims (1)

[Scope of Claims] 1. Wiring that corresponds to a grid point in a wiring grid formed on one surface of a printed board and has wiring pattern information related to the grid point, and that is formed on the other surface of the printed board. A memory device having wiring pattern information associated with each grid point in the grid is provided, and at least one of the grid points is set as a start point and at least one other of the grid points is set as an end point. In a wiring route processing system that determines a wiring route passing through the wiring grid using a wiring route search processing unit that determines a wiring route, the wiring route search processing unit is configured to perform a wiring route search processing unit that determines a wiring route that passes through the wiring grid using a wiring route search processing unit that determines a wiring route. It is configured to select between a one-dimensional search condition state mode in which an original search is performed and a two-dimensional search condition state mode in which a two-dimensional search is performed with respect to one surface on the printed board, and a wiring grid area setting section is provided to After the wiring grid area setting section sets a wiring grid area in which a plurality of wiring grids are set as one unit,
The wiring route search processing section is configured to give identification information to each wiring grid in the same wiring grid area so as to be distinguishable from wiring grids in other wiring grid areas, and the wiring route search processing section is configured to give identification information to each wiring grid in the same wiring grid area, When determining a wiring route within each individual wiring grid area, the wiring route search processing section processes the wiring route in a two-dimensional search condition state mode by referring to the identification information in the wiring grid area; When determining a wiring route to move to another wiring grid area, the wiring route search processing section is processed in a one-dimensional search condition state mode, and the wiring result is stored in the storage device. A wiring route automatic determination processing method characterized by: