JPH0545147B2 - - Google Patents

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention relates to a digital signal generation method used when testing the operating state of a circuit under test by applying a digital signal to a circuit under test, such as a semiconductor integrated circuit. Regarding equipment.

(Prior Art) For example, a digital signal generator used when testing semiconductor integrated circuits is required to be able to freely set high and low levels, to be able to obtain high-speed output, and to be able to protect the output. Conventionally, a device configured with a diode switch circuit in the output stage has been proposed.

(Problem to be Solved by the Invention) In a conventional device equipped with a diode switch circuit in the output stage, the output slew rate SR is determined by the maximum output current I and the capacitance CI of the load circuit to which the output digital signal is applied. If, SR=I/CI(V/
sec). Therefore, the slew rate SR
In order to increase the output current, the maximum output current I can be increased, but the power consumption of the circuit increases and heat generation becomes a problem. On the other hand, it is also possible to increase the output current transiently at the rise and fall of the signal.
There is a problem that overshoot and spikes occur when the amplitude is small.

The present invention was made in view of the above-mentioned problems, and its purpose is to provide a diode switch circuit in the output stage, but with short signal rise and fall times, and to prevent overshoot even at small amplitudes. The object of the present invention is to realize a digital signal generator that can obtain high-speed output without causing spikes or the like.

(Means for Solving the Problems) The present invention, which solves the above-mentioned problems, includes a high-level setting power supply, first and second current sources that can take three output current states, and a low-level setting power supply. , a first diode connected between the high level setting power supply and the first current source, and a second diode connected between the first current source and the output terminal of the device.
a third diode connected between the second current source and the output terminal of the device, and a fourth diode connected between the low level setting power source and the second current source; The operation of the second and third diodes is a current obtained by differentiating a pulse signal during a transition in switching between a high level output and a low level output, and the magnitude of this differentiated current changes depending on the amplitude of the output signal. The present invention is characterized in that it is comprised of first and second output current correction circuits that are superimposed on the current.

(Example) Hereinafter, an example of the present invention will be described in detail using the drawings.

FIG. 1 is a connection diagram showing one embodiment of the present invention. In the figure, A ₁ and A ₂ are the output signal high,
A high level setting power supply and a low level setting power supply for setting the low level, both of which have a DC setting voltage.
It is constructed using an amplifier to which Vih and Vil are given. Both Ia and Ib are constant current sources that can be turned on and off, and constitute a first current source _CS1 that can take three states of output current: 0, I, and 2I. Ic, Id
Both are constant current sources that can be turned on and off, and the second source has three output current states: 0, -1, and -21.
It constitutes current source CS ₂ . D ₁ is a first diode whose anode is connected to the output terminal of the first current source CS ₁ and whose cathode is connected to the output terminal of the high level setting power supply A ₁ , and D ₂ is a first diode whose anode is connected to the output terminal of the first current source CS 1.
A second diode connected to the output terminal of CS ₁ , with its cathode connected to the output terminal T _p of the device through a resistor R _p , D ₃ , whose anode is connected to the output terminal T _p of the device through a resistor R _p a third diode connected, the cathode of which is connected to the output of the second current source CS ₂ ;
_D4 is a fourth diode whose anode is connected to the output terminal of the low level setting power supply _A2 , and whose cathode is connected to the output terminal of the second current source _CS2 . Note that it is desirable to use paired diodes for the diodes _D1 and _D2 and _D3 and _D4 . CC ₁ and CC ₂ are first and second output current correction circuits that are featured in the present invention and are provided for the purpose of improving the slew rate. The pulse signal generated when switching the low level output is input. The first output current correction circuit CC ₁ includes a transistor TR ₁ and a resistor R _1
The output terminal _of this circuit ₍ transistor TR ₁
collector) is connected to the anode of the second diode _D2 . Second output current correction circuit
CC ₂ is composed of a differentiating circuit consisting of a transistor TR ₂ , a resistor R ₃ , and a capacitor C ₂ and a resistor R ₄ connected to the base of the transistor TR ₂ .
The output of this circuit (collector of transistor TR ₂ ) is connected to the cathode of the third diode D ₃ . These first and second output current correction circuits CC ₁ and CC ₂ each adjust the current obtained by differentiating the pulse signal to the operation of the second and third diodes during a transition in switching between high-level output and low-level output. It is superimposed on the current and changes the magnitude of this differential current according to the amplitude of the output signal.

FIG. 2 is a specific circuit diagram of the control circuit COL in FIG. 1. a is the first output current correction circuit
It is a control circuit connected to the transistor TR ₁ of CC ₁ , and b is a control circuit connected to the transistor TR ₂ of the second output current correction circuit CC ₂ . Both are composed of amplifiers OP ₁ , OP ₂ , output transistors Q ₁ , Q ₂ , and resistors R ₁₁ , R ₁₂ (R ₁₁ =R ₁₂ =R).
A differential voltage Vih-Vil between DC set voltages Vih and Vil is given, and a current (collector current) ic as shown in the following equation is given to the bases of each transistor TR ₁ and TR ₂ .

ic=(Vih-Vil)/R...(1) Therefore, the transistor _TR1 due to this current ic,
The base voltages Vb ₁ and Vb ₂ of TR ₂ are as shown in equations (2) and (3).

Vb ₁ = Vcc - (R ₂ /R) · (Vih - Vil) ... (2) Vb ₂ = Vee + (R ₄ /R) · (Vih - Vil) ... (3) Operation of the device configured in this way The explanation is as follows.

FIG. 3 is a diagram showing the operating state of the main element shown in FIG. Each of the constant current sources Ia, Ib, Ic, and Id in the first and second current sources CS ₁ and CS ₂ is turned on or off as shown in FIG. 3 depending on the output state. The off state is controlled by a control means (not shown).

In other words, when the output is at a high level, the constant current source
Since 1a and 1b are turned on, the discharge side current becomes 21, and because the constant current source 1c is turned off and the constant current source 1d is turned on, the suction side current becomes 1. Therefore,
The output level V _p is increased by these difference currents 1 . Then, when the output level V _p approaches Vh,
The first diode _D1 is turned on, and the difference flows into the high level setting power supply _A1 side through this first diode _D1 .

When there is no load, the first and second diodes
Assuming that the currents flowing through D ₁ and D ₂ are equal and the characteristics of diodes D ₁ and D ₂ are equal, the output level V _p becomes Vh.

When the output is at low level, the constant current source 1a is turned off, the constant current source 1b is turned on, the discharge side current becomes 1, and the constant current sources 1c and 1d are both turned on, so the suction side current becomes 21, and the output level V _p is reduced by the difference 1 between them. and,
When the output level _Vp approaches Vl, the fourth diode _D4 is turned on, and the difference is output from the low level setting power supply _A2 side via the diode _D4 .

If there is no load, the third and fourth diodes
Assuming that the currents flowing through D ₃ and D ₄ are equal and the characteristics of diodes D ₃ and D ₄ are equal, the output level V _p becomes Vl, and the output level V _p is increased by the fourth diode D ₄ . It will be clamped to the Vl level.

In high impedance state, each constant current source 1a
~1d are both turned off and the output becomes high impedance.

Next, the operations of the first and second output current correction circuits, which are the features of the present invention, will be explained separately for the case where the output changes from low level to high level and the case where the output changes from low level to low level. . (In the case of low level output → high level output) In the first output current correction circuit CC ₁ , a pulse falling from a high level to a low level is applied to one end of the capacitor C ₁ , and a differential voltage signal ed obtained by differentiating this pulse is applied to one end of the capacitor C 1. ₁ is applied to the base of transistor _TR1 . Also, from the control circuit COL, 1
The current given by the equation is given. Therefore, the base voltage Vb ₁₀ of the transistor TR ₁ is obtained by superimposing the differential voltage signal ed ₁ on Equation 2.

Figure 4 shows transistor TR ₁ (transistor TR ₂ )
FIG. 3 is a diagram schematically showing waveforms when changing Vih−Vil with respect to the base voltage of . When Vih−Vil is small (small amplitude), transistor TR ₁
(TR ₂ ), almost no transient current flows, but as Vih−Vil gradually increases,
Due to the current flowing through the transistor Q ₁ (Q ₂ ), the base level drops as shown in Figure _{4 ,} and the transient current (at its peak value) is
V ₁ /R ₁ , V ₂ /R ₁ ) begins to flow.

Such a transient current if ₁ is expressed by the following four equations, and this transient current if ₁ is superimposed on the current flowing through the diode D ₂ to increase the current output to the load side.

if ₁ = {Vcc−(Vb ₁ +ed ₁ +Vbe)}/R ₁ …(4) On the other hand, in the second output current correction circuit CC ₂ ,
When low level output → high level output, a pulse is similarly applied to one end of capacitor _C2 , and a differential voltage signal obtained by differentiating this pulse is sent to the transistor.
added to the base of TR ₂ , but the transistor
TR ₂ will not turn on. Therefore, the current flowing through the third diode _D3 is not corrected at this point.

(In the case of high level output → low level output) In the second output current correction circuit CC ₂ , a pulse rising from low level to high level is applied to one end of capacitor C ₂ , and a differential voltage signal ed obtained by differentiating this pulse is applied to one end of capacitor C 2. ₂ is added to the base of transistor TR ₂ . Also, from the control circuit COL, 1
The current given by the equation is given.

Therefore, the transistor TR ₂ superimposes the transient current if ₂ as expressed by equation 5 on the current flowing through the diode D ₃ to increase the current output to the load side.

if ₂ = {(Vb ₂ + ed ₂ + Vbe) − Vee}/R ₃ ...(5) On the other hand, in the first output current correction circuit CC ₁ ,
A pulse that rises from a low level to a high level is applied to one end of the capacitor _C1 , and a differential voltage signal obtained by differentiating this pulse is applied to the base of the transistor _TR1 .
TR ₁ will not turn on.

In this way, during a transition in switching between a high level output and a low level output, the transient currents if ₁ and if ₂ , which are currents obtained by differentiating a pulse current and whose magnitude changes depending on the amplitude of the output, are used as the second , 3rd
is superimposed on the operating current of the diode. (Note that the time constants of these transient currents are determined by capacitors C ₁ and C ₂ and resistors R ₁ and R ₃ ). By this,
The slew rate is improved by reducing the rise and fall times of the output signal and preventing overshoots and spikes from occurring even when the amplitude is small.

Figure 5 shows the output current correction circuit in the circuit shown in Figure 1.
FIG. 7 is a circuit diagram of main parts showing another example of CC ₁ , CC ₂ and the control circuit COL. In this example, a circuit consisting of an operational amplifier OP to which Vil and Vih are applied via a resistor R, a transistor Q ₃ connected to the output terminal of this operational amplifier OP, a resistor Re through which a current i flows, and a feedback resistor Rf is used. A current i proportional to the amplitude is passed through a transistor Q ₁ , which functions as a current switch.
Q ₂ and its output is connected to capacitor C ₁ ,
The differential current is differentiated by C ₂ and superimposed on the switch circuit formed by the first to fourth diodes D ₁ to _{D 4} . Here, the output amplitude i·Rl of the current switch is proportional to the amplitude Vih-Vil, and the same effect as the circuit of FIG. 1 can be obtained.

(Effects of the Invention) As explained in detail above, according to the present invention,
It is possible to realize a digital signal generating device that can obtain high-speed output without increasing static current, with short signal rise and fall times, and with little overshoot or spikes even when the amplitude is small.

[Brief explanation of the drawing]

Figure 1 is a connection diagram showing one embodiment of the present invention, Figure 2 is a connection diagram showing an embodiment of the present invention.
The figure is a specific circuit diagram of the control circuit in Figure 1,
Fig. 3 is an operation explanatory diagram showing the operating state of the main elements in Fig. 1, and Fig. 4 is a transistor in Fig. 1.
FIG. 5 is an explanatory diagram schematically showing the base voltage waveform of TR ₁ (TR ₂ ), and FIG. 5 is a main circuit diagram showing another example of the output current correction circuit and control circuit in FIG. 1. A ₁ ... High level setting power supply, A ₂ ... Low level setting power supply, CS ₁ ... First current source, CS ₂ ... Second
Current source, 1a to 1d... constant current source, CC ₁ ... first output current correction circuit, CC ₂ ... second output current correction circuit,
COL...control circuit, _D1 to _D4 ...first to fourth diodes.

Claims (1)

[Claims] 1. A high level setting power source, first and second current sources that can take three output current states, a low level setting power source, and a power source connected between the high level setting power source and the first current source. a first diode, a second diode connected between the first current source and the output terminal of the device, and a third diode connected between the second current source and the output terminal of the device; A fourth diode connected between the low level setting power supply and the second current source, and a current obtained by differentiating a pulse signal during a transition in switching between high level output and low level output; A digital signal generator comprising first and second output current correction circuits that superimpose a signal whose magnitude changes depending on the amplitude of the output signal on the operating currents of the second and third diodes.