JPH0548434B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a digital signal generator used, for example, in testing semiconductor integrated circuits.

(Prior Art) For example, as a digital signal generator used for testing digital semiconductor integrated circuits, high level and low level can be set freely, and tri-state operation can provide high level output, low level output, and high impedance output. It is necessary to be able to obtain high-speed output, and to be able to protect the output.

FIG. 3 is a block diagram showing an example of such a conventional device. In Figure 3, V _H is a high level power supply terminal, V _L is a low level power supply terminal, and a switch circuit is connected between these power supply terminals V _H and V _L.
SWa and SWb are connected in series. Ta is an input terminal for a digital pattern signal represented by "1" and "0", and Tb is an input terminal for a control signal for controlling tri-state operation. input terminal
Ta is connected to one input terminal of the gate Ga via the inverter INV and directly connected to one input terminal of the gate Gb, and the input terminal Tb is directly connected to the other input terminal of the gate Ga and the gate Gb is connected to the other input terminal of
The output signals of these gates Ga and Gb are from a switch circuit.
This is used as the opening/closing control signal for SWa and SWb, and the output signal of gate Ga is the switch circuit.
The output signal of the gate Gb is applied to the switch circuit SWb. switch circuit
A digital signal output terminal T ₀ of the device is connected to the connection point between SWa and SWb via an output resistor R ₀ .

In such a configuration, the switch circuit SWa
When switch circuit SWa is on and SWb is off, a high level signal is output, and when switch circuit SWa is off, SWb
When is on, a low level signal is output,
When switch circuits SWa and SWb are both off, the output becomes high impedance.

However, according to the configuration shown in FIG. 3, it is necessary to use high-speed elements with relatively high breakdown voltage as the switch circuits SWa and SWb, which increases the cost. Furthermore, in order to protect the output circuit, a separate protection circuit must be provided, which further increases costs.

Therefore, as a device to solve these drawbacks, current switches connected in series via digital signal output terminals are driven according to the output level control signal, and a diode is connected to the connection point of these current switches. Some are configured to apply an output level setting signal.

FIG. 4 is a block diagram showing an example of such a device. In Fig. 4, HL is a high-level setting power supply that receives a high-level signal from the terminal _VH at DC level, and IS ₁ is a power supply with three states of 0, I, and 2I depending on the control signal applied from control circuit CL ₁ . The first circuit consists of a current switch that outputs current.
, IS ₂ is a second current source composed of a current switch that outputs three-state currents of 0, -I, and -2I according to the control signal applied from control circuit CL ₂ , and LL is a terminal This is a low level setting power supply that provides a low level signal from _VL at DC level.
_D1 is a first diode whose anode is connected to the output terminal of the first current source _IS1 and its cathode is connected to the output terminal of the high level setting power supply HL, and _D2 is a first diode whose anode is connected to the output terminal of the first current source _IS1 . A second diode D 3 is connected to the output terminal and has its cathode connected to the output terminal T ₀ of the digital signal of the device, D ₃ has an anode connected to the output terminal T ₀ of the digital signal of the device and its cathode connected to the second current source IS The _third diode D4 connected to the output terminal of the second current source IS2 is a _fourth diode whose anode is connected to the low level setting power supply LL and whose cathode is connected to the output terminal of the second current source _IS2 . Note that the diodes D ₁ and D ₂ and D ₃ and D ₄
each uses a pair of diodes.

FIG. 5 is a circuit diagram showing a specific example of the main part of FIG. 4. The first current source IS ₁ includes transistors Q ₁ ,
The first current switch CSa consists of transistors Q ₂ and is turned on and off by the control signal applied from the control circuit CL ₁ , and the first current switch CSa consists of transistors Q ₃ and Q ₄ and is turned on by the control signal applied from the control circuit CL ₁ . , a second current switch controlled off
It consists of CSb and cascode transistor _Q5 . On the other hand, the second current source IS ₂ includes a third current switch CSc, which is composed of transistors Q ₆ and Q ₇ and is controlled on and off by a control signal applied from the control circuit CL ₂ , and transistors Q ₈ ,
A fourth current switch CSd and a cascode transistor Q ₁₀ are configured of Q ₉ and are controlled on and off by a control signal applied from the control circuit CL ₂ .
It is made up of. In addition, each current switch
The currents Ia to Id having the same current value I are outputted from CSa to CSd, respectively.

In such a configuration, each control circuit CL ₁ ,
CL ₂ outputs a control signal that controls each current switch CSa to CSd to be in the on or off state as shown in FIG. 6 depending on the state of the output. When the output is at high level, the current switch CSa and
Since CSb is turned on, the discharge side current becomes 2I, current switch CSc is turned off, and CSd
is turned on, the suction side current becomes I, and the output level increases due to the difference I between these. Then, when the output level approaches _VH , the diode _D1 is turned on, and the difference flows into the high level setting power supply HL via the diode _D1 . When there is no load, the currents flowing through the diodes D ₁ and D ₂ are equal, and since the characteristics of the diodes D ₁ and D ₂ are equal, the output level Vo becomes V _H. When the output is at low level, current switch CSa turns off and CSb turns on, so the discharge side current becomes I, and current switches Csc and CSd turn on, so the suction side current becomes 2I. Therefore, the output level decreases due to the difference I between them. Then, when the output level approaches V _L , diode _D4 is turned on, and the difference is output from low level setting power supply LL via diode _D4 . If there is no load,
Since the currents flowing through the diodes D ₃ and D ₄ are equal and the characteristics of the diodes D ₃ and D ₄ are the same, the output level Vo becomes V _L , and the output level is equal to that of the diode.
It will be clamped to the level of V _L by D ₄ . In the high impedance state, current switches CSa to CSd are all turned off, and the output becomes high impedance.

This configuration provides a low-cost device that has high speed, small output offset, large amplitude and good linearity, and essentially has a current limiter function.

(Problem to be Solved by the Invention) However, according to such a configuration, when the difference between the high level signal V _H and the low level signal V _L becomes small,
Current also flows through the diode _D1 or _D4 , which should normally be cut off, and as the amplitude decreases, the offset increases, resulting in the disadvantage that a pulse signal with a small amplitude (for example, 0.5Vpp or less) cannot be obtained. be. Such an offset can be reduced if the parasitic resistance of the diode is small, but it cannot be completely eliminated even with an ideal diode.

The present invention has been made with attention to such points, and its purpose is to eliminate the influence of the current flowing through the cut-off side diode by controlling the switch current, and to control the switch current to eliminate the influence of the current flowing through the cut-off side diode. The object of the present invention is to provide a digital signal generator that can obtain the following.

(Means for Solving the Problems) The present invention achieves the above object by using a first power supply which is composed of a high-level setting power supply and a current switch, and has three states of output current: 0, I, and 2I. a second current source that is configured with a current switch and whose output current can take three states -0, -I, and -2I; a low-level setting power supply; and a first current source whose anode is a first diode whose anode is connected to the output terminal of the first current source and whose cathode is connected to the output terminal of the high-level setting power supply; and a second diode whose anode is connected to the output terminal of the first current source and whose cathode is connected to the output terminal of the device. a third diode whose anode is connected to the output terminal of the device and whose cathode is connected to the output terminal of the second current source; and a third diode whose anode is connected to the output terminal of the low level setting power supply and whose cathode is connected to the output terminal of the second current source. a fourth diode connected to the output terminal of the current source; and a current control circuit connected to the current switch and controlling the switch current flowing through the current switch to eliminate the influence of the current flowing through the cut-off side diode. It is characterized by being composed of , and.

(Example) Hereinafter, a detailed explanation will be given using the drawings.

FIG. 1 is a block diagram showing the operating principle of the present invention, and the same parts as in FIG. 5 are given the same reference numerals. In Figure 1, CCL is a current control circuit that controls the current flowing through current sources Ia and Ic. One end is connected to the connection point between current source Ia and current switch CSa, and the other end is connected to the connection point between current source Ic and current switch CSa. Switch CSc
The control current Icc is bypassed.

In such a configuration, when V _H −V _L becomes small, diodes D ₁ and D ₄ start conducting, and unnecessary current Ix flows. Considering the case of high level output and no load, the current flowing through the diodes D ₃ and D ₂ decreases from I to I-Ix, so the current flowing through the diode D ₁ increases from I to I+Ix. An offset occurs between terminals V _H and To due to the difference in operating current of these diodes D ₂ and D ₁ . In order to eliminate such an offset, the currents flowing through the diodes _D1 and _D2 should be made equal. Therefore, in the case of FIG. 1, the current flowing through the diodes _D1 and _D2 is assumed to be I-Ix. Therefore, Ia + Ib - Icc = 2I - 2Ix, so Icc is set to 2Ix. The same applies when outputting low level, so Ic + Id - Icc = -2I + 2Ix.

FIG. 2 is a circuit diagram showing a specific example of a current control circuit that generates current 2Ix. In Figure 2,
D ₅ and D ₆ are diodes having the same characteristics as the diodes D ₁ to D ₄ . The anode of diode D ₅ is the terminal
V _H and its cathode is connected to a current source Ie. The anode of diode D ₆ is an operational amplifier
It is connected to the inverting input terminal of OA ₁ , and its cathode is connected to the current source Ie. The non-inverting input terminal of the operational amplifier OA ₁ is connected to the terminal V _L , and the output terminal is connected to the resistor
It is connected to the inverting input terminal via R ₁ and to the non-inverting input terminal of operational amplifier OA ₂ via resistor R ₄ . The inverting input terminal of the operational amplifier OA ₂ is connected to the terminal V _L via the resistor R ₃ , and the output terminal is connected to the base of the transistor Q ₁₁ . The collector of transistor _Q11 is connected to the connection point between current source Ia and current switch CSa, and the emitter of transistor _Q11 is connected to the connection point between current source Ic and current switch CSc via resistor _R2 . There is. One end of the resistor R ₂ is connected to the inverting input terminal of the operational amplifier OA ₂ via the resistor R ₅ , and the resistor
The other end of _R2 is connected to the non-inverting input terminal of operational amplifier _OA2 via resistor _R6 . In addition, R ₃ to R ₆
=R. As a result, operational amplifier OA ₁ and resistor R ₁ form a circuit that converts the current flowing through diode D ₆ into voltage, and operational amplifier OA ₂ and resistor R ₂
~ _R6 and transistor _Q11 constitute a circuit that outputs a current proportional to the current flowing through diode _D6 .

In such a configuration, the anode voltage of the diode _D6 is kept at the same potential as the voltage at the non-inverting input terminal of the operational amplifier _OA2 , and the cathode potentials of the diodes _D5 and _D6 are also kept at the same potential. Here, the current source
Focusing on the current flowing through Ie, it becomes the sum I of the currents flowing through diodes _D5 and _D6 . And the current flowing through diode D ₆ is equal to the current flowing through each diode D ₁ ~
Assuming that the characteristics of D ₆ are equal, it becomes Ix. on the other hand,
The output voltage of operational amplifier OA ₁ is V _L + IxR ₁ ,
The voltage between the terminals of resistor R ₂ is V _L +IxR ₁ −V _L =IxR ₁ . Therefore, if R≫R ₂ , the current flowing through the transistor Q ₁₁ will be Ix (R ₁ /R ₂ ), and in order to output _2Ix , _the resistors R ₁ , _R2
Select.

With this configuration, a pulse signal with a smaller amplitude can be obtained compared to conventional devices. In addition, during control, only the direct current bias current is changed, and the influence on transient characteristics is extremely small, allowing safe measurements. Further, the configuration of the current control circuit is relatively simple, and it may be added to an existing device only when a small amplitude pulse signal output is required.

(Effects of the Invention) As explained above, according to the present invention, it is possible to have characteristics necessary for testing digital semiconductor integrated circuits with a relatively simple configuration, and to eliminate the influence of the current flowing through the diode on the cut-off side. As a result, a low-cost digital signal generator capable of generating a pulse signal with a small amplitude can be realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
Fig. 2 is a circuit diagram showing a specific example of the main part of Fig. 1, Figs. 3 and 4 are block diagrams showing an example of a conventional device, and Fig. 5 is a specific example of the main part of Fig. 4. The circuit diagram shown in FIG. 6 is an explanatory diagram of the operating state of FIG. 5. CCL……Current control circuit, IS ₁ , IS ₂ , Ia~Ie……
Current source, CSa to CSd...Current switch, D ₁
~ _D6 ...Diode, _OA1 ~ _OA2 ...Operation amplifier, _R1 ~ _R6 ...Resistor, _Q1 ~ _Q11 ...Transistor.

Claims (1)

[Claims] 1. A first current source composed of a high-level setting power supply, a current switch and capable of taking three output current states of 0, I, and 2I, and an output current composed of the current switch. A second current source that can take three states -0, -I, and -2I, a low level setting power supply, and an anode connected to the output terminal of the first current source and a cathode connected to the output of the high level setting power supply. a first diode connected to the terminal; a second diode having an anode connected to the output terminal of the first current source and a cathode connected to the output terminal of the device; and a second diode having an anode connected to the output terminal of the device and a cathode connected to the output terminal of the device. a third diode whose anode is connected to the output terminal of the second current source, and a fourth diode whose anode is connected to the output terminal of the low level setting power supply and whose cathode is connected to the output terminal of the second current source. , a current control circuit connected to the current switch and controlling the switch current flowing through the current switch to eliminate the influence of the current flowing through the diode on the cut-off side. Device.