JPH0549130B2 - - Google Patents
Info
- Publication number
- JPH0549130B2 JPH0549130B2 JP62214582A JP21458287A JPH0549130B2 JP H0549130 B2 JPH0549130 B2 JP H0549130B2 JP 62214582 A JP62214582 A JP 62214582A JP 21458287 A JP21458287 A JP 21458287A JP H0549130 B2 JPH0549130 B2 JP H0549130B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- circuit
- exclusive
- transformer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/689—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit
- H03K17/691—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit using transformer coupling
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、パワーMOSFET等のパワースイツ
チング素子にオン、オフの駆動信号を信号源と絶
縁して伝送するための絶縁形駆動回路に関するも
のである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an isolated drive circuit for transmitting on/off drive signals to power switching elements such as power MOSFETs while insulating them from the signal source. It is.
従来、パワーMOSFET等のスイツチング素子
へのゲート駆動を行う絶縁信号伝達手段として
は、フオトカプラを使用する信号伝送回路が広く
利用されている。しかしながら、このような光間
接点弧式の従来回路においては、信号伝達遅れや
絶縁間の電位変動等のノイズによる誤動作が問題
となる。
Conventionally, signal transmission circuits using photocouplers have been widely used as insulated signal transmission means for driving gates of switching elements such as power MOSFETs. However, in such a conventional optical indirect ignition type circuit, malfunctions due to noise such as signal transmission delay and potential fluctuation between insulations are a problem.
これに対し、パルストランスを利用する電磁点
弧式の絶縁信号伝送回路も知られている。しかし
この種の回路においては、低周波を信号として用
いる場合は大形のトランスを必要とし、また直流
の信号は伝達することができないという欠点があ
るばかりでなく、駆動エネルギーの絶縁伝送も常
に問題となる。 On the other hand, an electromagnetic ignition type insulated signal transmission circuit using a pulse transformer is also known. However, this type of circuit not only requires a large transformer when using low frequency signals as a signal, but also has the drawback of not being able to transmit direct current signals, and the isolated transmission of drive energy is always a problem. becomes.
本発明の目的は前記従来例の不都合を解消し、
絶縁されたゲート駆動信号をパルストランスを用
いて高周波はもちろん、直流、低周波の領域にお
いても、迅速かつ正確に伝達でき、しかも小型か
つ廉価で信頼性の高いパワースイツチング素子の
絶縁形駆動回路を提供することにある。 The purpose of the present invention is to eliminate the disadvantages of the conventional example,
An isolated drive circuit for a power switching element that uses a pulse transformer to quickly and accurately transmit an isolated gate drive signal not only at high frequencies but also in the direct current and low frequency ranges, and which is small, inexpensive, and highly reliable. Our goal is to provide the following.
本発明は前記目的を達成するため、絶縁用トラ
ンスの一次巻線の一端に高周波電源の出力を接続
し、他端に、前記高周波電源の出力とオン、オフ
指令信号とを入力とするエクスクルシブオア回路
の出力を接続し、トランスの二次巻線に全波整流
器を接続し、該整流器の出力を駆動信号として得
ることを要旨とするものである。
In order to achieve the above object, the present invention connects the output of a high frequency power source to one end of the primary winding of an isolation transformer, and connects the output of the high frequency power source and ON/OFF command signals to the other end of the transformer. The gist is to connect the output of the sibu-or circuit, connect a full-wave rectifier to the secondary winding of the transformer, and obtain the output of the rectifier as a drive signal.
本発明によれば、絶縁用トランスの一次巻線に
はオン、オフ指令信号と高周波電源出力の排他的
論理和と、この高周波電源との差分を得た制御信
号が与えられる。これによりオン、オフ指令信号
が高周波で変調され、オン、オフ指令信号が直
流、低周波であつても絶縁用トランスを飽和させ
ることなく制御信号の伝達が可能となる。
According to the present invention, the primary winding of the insulating transformer is given a control signal obtained by obtaining the exclusive OR of the on/off command signal and the output of the high-frequency power source, and the difference between the high-frequency power source and the exclusive OR. As a result, the on and off command signals are modulated with high frequency, and even if the on and off command signals are direct current and low frequency, the control signal can be transmitted without saturating the isolation transformer.
以下、図面について本発明の実施例を詳細に説
明する。
Embodiments of the present invention will be described in detail below with reference to the drawings.
第1図は本発明のパワースイツチング素子の絶
縁形駆動回路の第1実施例を示す回路図で、図中
9はパワースイツチング素子としての
MOSFET、10はその素子駆動回路を示し、本
実施例では該素子駆動回路10はダイオード4〜
7のブリツジ接続回路による全波整流器とこれに
並列接続される抵抗8とで構成し、駆動回路10
の出力側はMOSFET9のゲート、ソース間に接
続される。 FIG. 1 is a circuit diagram showing a first embodiment of an isolated drive circuit for a power switching element according to the present invention, and in the figure, 9 indicates a power switching element.
MOSFET, 10 indicates its element drive circuit, and in this embodiment, the element drive circuit 10 includes diodes 4 to 4.
The drive circuit 10 is composed of a full-wave rectifier using a bridge connection circuit 7 and a resistor 8 connected in parallel to the full-wave rectifier.
The output side of is connected between the gate and source of MOSFET9.
図中3は絶縁用トランスで、その二次巻線に前
記ダイオード4〜7による全波整流器の入力側が
接続される。 In the figure, reference numeral 3 denotes an insulating transformer, the secondary winding of which is connected to the input side of a full-wave rectifier including the diodes 4 to 7.
絶縁用トランス3の一次巻線の一端には高周波
電源1の出力が接続され、該一次巻線の他端には
前記高周波電源1の出力とオン、オフ指令信号と
を入力とするエクスクルシブオア回路2の出力が
接続される。 The output of the high frequency power supply 1 is connected to one end of the primary winding of the isolation transformer 3, and the other end of the primary winding is connected to an exclusive winding which receives the output of the high frequency power supply 1 and an on/off command signal as input. The output of OR circuit 2 is connected.
次に動作について説明すると、第2図に示すよ
うに高周波電源1からの矩形波形の信号Aとオ
ン、オフ指令信号Bがエクスクルシブオア回路2
へ入力されると、両入力の排他的論理和によりC
のごとき信号が出力として得られる。絶縁用トラ
ンス3の一次巻線には前記波形Aの信号が一端
に、波形Cの信号が他端に与えられ、該トランス
3の二次巻線からは信号Dのごとき信号A,Cの
差分を得た信号が出力として得られる。 Next, to explain the operation, as shown in FIG.
When input to C, the exclusive OR of both inputs results in C
A signal like this is obtained as output. The signal of waveform A is applied to one end of the primary winding of the insulating transformer 3, and the signal of waveform C is applied to the other end, and the difference between signals A and C, such as signal D, is output from the secondary winding of the transformer 3. The obtained signal is obtained as the output.
そして、この信号Dはダイオード4〜7の全波
整流器により全波整流され、Eのごとき駆動信号
としてMOSFET9に与えられる。 Then, this signal D is full-wave rectified by a full-wave rectifier including diodes 4 to 7, and is given to the MOSFET 9 as a drive signal such as E.
第3図は本発明の第2実施例を示すもので、エ
クスクルシブオア回路20を構成するものとし
て、前記第1図のエクスクルシブオア回路2と同
様な動作をするエクスクルシブオアゲート22の
他に、エクスクルシブオアゲート23によるバツ
フアを用いて高周波電源1の出力をこのエクスク
ルシブオアゲート23を介して絶縁用トランス3
の一次巻線の一端に接続した。 FIG. 3 shows a second embodiment of the present invention, in which an exclusive OR circuit 20 includes an exclusive OR gate 22 which operates in the same manner as the exclusive OR circuit 2 shown in FIG. In addition, the output of the high frequency power supply 1 is passed through the exclusive OR gate 23 to the isolation transformer 3 using a buffer provided by the exclusive OR gate 23.
connected to one end of the primary winding.
このエクスクルシブオアゲート23があること
により一次巻線両端における高周波電源1からの
信号伝達時間のずれを避けることにより信号波形
が乱れるようないわゆるハザードが防止できる。 The presence of the exclusive OR gate 23 prevents a so-called hazard in which the signal waveform is disturbed by avoiding a shift in signal transmission time from the high frequency power supply 1 at both ends of the primary winding.
また、絶縁用トランス3の二次巻線は中間タツ
プを設けたものであるが、この二次巻線が接続さ
れる素子駆動回路21では、絶縁用トランス3の
二次巻線の両端にダイオード24,25を接続し
て全波整流器を構成し、このダイオード24,2
5の共通接続端と前記二次巻線の中間タツプ間と
に平滑抵抗27を接続し、その両端をMOSFET
9のゲート、ソース間に接続する。 Furthermore, the secondary winding of the insulating transformer 3 is provided with an intermediate tap, and in the element drive circuit 21 to which this secondary winding is connected, diodes are installed at both ends of the secondary winding of the insulating transformer 3. 24, 25 are connected to form a full wave rectifier, and these diodes 24, 2
A smoothing resistor 27 is connected between the common connection end of 5 and the middle tap of the secondary winding, and both ends of the smoothing resistor 27 are connected to the MOSFET.
Connect between the gate and source of 9.
そして、本実施例では、MOSFET9のゲート
への出力線中に能動素子としてのコンパレータ2
9,29′及び抵抗30によるバツフアを設けた。
これにより、高速に素子を駆動できるようにな
る。 In this embodiment, a comparator 2 as an active element is connected to the output line to the gate of MOSFET 9.
A buffer is provided by 9, 29' and a resistor 30.
This makes it possible to drive the element at high speed.
また、前記抵抗27の両端にダイオード26を
介してコンデンサ28を接続し、該コンデンサ2
8を電源としてコンパレータ29,29′に接続
する。 Further, a capacitor 28 is connected to both ends of the resistor 27 via a diode 26, and the capacitor 28
8 is connected to comparators 29 and 29' as a power source.
第4図はこの第3図回路の動作波形を示すもの
で、前記第1実施例の第1図回路とほとんど変わ
りはないが、前記コンデンサ28を設けることに
より絶縁用トランス3の二次巻線に得られた信号
を全波整流し、その電力の一部をこのコンデンサ
28に蓄積しておき、それを駆動回路の電源とす
ることにより高速で素子を駆動できるものとな
る。 4 shows the operating waveforms of the circuit of FIG. 3, which is almost the same as the circuit of FIG. 1 of the first embodiment, but by providing the capacitor 28, the secondary winding of the isolation transformer The signal obtained is full-wave rectified, a part of the power is stored in this capacitor 28, and this is used as a power source for the drive circuit, thereby making it possible to drive the device at high speed.
なお、信号Fにおいて信号Eの立上がり時のわ
ずかな落込みは、MOSFET9のオン時の静電容
量の充電のためである。 Note that the slight dip in signal F when signal E rises is due to charging of the capacitance when MOSFET 9 is on.
以上述べたように本発明のパワースイツチング
素子の絶縁形駆動回路は、オン、オフ指令信号
を、高周波信号を介して伝達するので、低周波の
信号、あるいは直流(連続的にオン、またはオフ
する)信号も、ひとつのパルストランスで伝送す
ることが可能となり、小型かつ廉価で信頼性の高
い駆動回路が得られるものである。
As described above, the isolated drive circuit for the power switching element of the present invention transmits the on/off command signal via a high frequency signal, so it transmits the on/off command signal via a high frequency signal. This makes it possible to transmit signals (transmitted) using a single pulse transformer, resulting in a compact, inexpensive, and highly reliable drive circuit.
第1図は本発明のパワースイツチング素子の絶
縁形駆動回路の第1実施例を示す回路図、第2図
は同上動作波形図、第3図は第2実施例を示す回
路図、第4図は同上動作波形図である。
1……高周波電源、2……エクスクルシブオア
回路、3……絶縁用トランス、4,5,6,7…
…ダイオード、8……抵抗、9……MOSFET、
10……素子駆動回路、20……エクスクルシブ
オア回路、21……素子駆動回路、22,23…
…エクスクルシブオアゲート、24〜26……ダ
イオード、27,30……抵抗、28……コンデ
ンサ、29,29′……コンパレータ。
FIG. 1 is a circuit diagram showing a first embodiment of an isolated drive circuit for a power switching element of the present invention, FIG. 2 is an operation waveform diagram of the same as above, FIG. 3 is a circuit diagram showing a second embodiment, and FIG. The figure is an operational waveform diagram of the same as above. 1...High frequency power supply, 2...Exclusive OR circuit, 3...Isolation transformer, 4, 5, 6, 7...
...Diode, 8...Resistor, 9...MOSFET,
10... Element drive circuit, 20... Exclusive OR circuit, 21... Element drive circuit, 22, 23...
...Exclusive OR gate, 24-26...Diode, 27,30...Resistor, 28...Capacitor, 29,29'...Comparator.
Claims (1)
源の出力を接続し、他端に前記高周波電源の出力
とオン、オフ指令信号とを入力とするエクスクル
シブオア回路の出力を接続し、トランスの二次巻
線に全波整流器を接続し、該整流器の出力を駆動
信号として得ることを特徴とするパワースイツチ
ング素子の絶縁形駆動回路。1 Connect the output of a high-frequency power source to one end of the primary winding of the insulating transformer, connect the output of an exclusive OR circuit that receives the output of the high-frequency power source and on/off command signals to the other end, and An isolated drive circuit for a power switching element, characterized in that a full-wave rectifier is connected to the secondary winding of the power switching element, and the output of the rectifier is obtained as a drive signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62214582A JPS6457820A (en) | 1987-08-27 | 1987-08-27 | Isolation drive circuit for power switching element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62214582A JPS6457820A (en) | 1987-08-27 | 1987-08-27 | Isolation drive circuit for power switching element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6457820A JPS6457820A (en) | 1989-03-06 |
| JPH0549130B2 true JPH0549130B2 (en) | 1993-07-23 |
Family
ID=16658105
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62214582A Granted JPS6457820A (en) | 1987-08-27 | 1987-08-27 | Isolation drive circuit for power switching element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6457820A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3346543B2 (en) * | 1999-08-26 | 2002-11-18 | ティーディーケイ株式会社 | Switching power supply |
-
1987
- 1987-08-27 JP JP62214582A patent/JPS6457820A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6457820A (en) | 1989-03-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |