JPH055514B2 - - Google Patents

Description

Detailed Description of the Invention (Industrial Application Field) The present invention controls the opening and closing of a movable piece of a winning device a predetermined number of times based on a winning in a specific winning opening provided on a game board, and when the winning device is opened and closed, a winning is won. When a pachinko ball enters the winning machine and enters the continuous winning opening in the winning machine, the movable piece is opened and closed a predetermined number of times, which is more times than when winning a prize in a specific winning opening, so that the pachinko ball enters the winning opening in the winning machine within a predetermined time. When the winning device starts to maintain a state in which the winning probability is increased, and a pachinko ball flies into the winning opening again during the winning probability increasing state of the winning device, the winning probability increases state starts again from the beginning. The present invention relates to a pachinko machine for so-called second type pachinko games.

(Prior Art) Conventionally, some pachinko machines increase the winning probability of a winning device using winning balls. This type of pachinko machine includes a winning device into which pachinko balls shot onto a game board can fly, a movable piece that can be opened and closed with respect to the winning device, and an electric drive unit for driving the movable piece. An opening/closing mechanism is provided between the electric drive unit and the movable piece and opens and closes the movable piece a predetermined number of times (for example, once or twice) based on the operation of the electric drive unit. Furthermore, the game board is provided with a plurality of specific winning openings, and different conditions are set for each of these openings, and the electric drive section opens and closes the movable piece via the opening/closing mechanism in response to the winning of the specific winning opening.
This causes the winning device to fluctuate and make it easier for pachinko balls to fly into the device, thereby increasing the winning probability of pachinko balls. Furthermore, based on this increased winning probability state due to winning in the specific winning opening, when a pachinko ball enters the continuous winning opening, a different winning probability increasing state is created. Generally, the number of openings and closings based on winnings in the continuous winning opening is set to be greater than the number of openings and closings based on winnings in the specific winning opening (for example, 18 times). Such a game is called a so-called second type pachinko game, and is generally widely known.

By the way, a solenoid is generally used in the electric drive unit of a pachinko machine, and the rod operates based on the excitation and de-excitation of the solenoid.During this operation, the rod and the solenoid slide, causing Foreign matter attached to the rod and rod material are scraped off minute by minute. If such foreign matter remains, it will cause the rod to malfunction, so it is desirable to remove it promptly.

Conventionally, the solenoid that moves the winning device is disposed on the back or side of the winning device, the rod of the solenoid and the movable piece are connected by an opening/closing mechanism, and a return spring is attached to the rod or the opening/closing mechanism. As a result, the movable piece is opened to the winning device by the excitation of the solenoid, while the elastic force of the return spring closes the movable piece to the winning device by canceling the excitation. The operating axis of such a solenoid is arranged in the vertical direction of the pachinko machine, and the insertion hole into which the rod is inserted is provided facing upward.

(Problem to be Solved by the Invention) Therefore, the foreign matter generated by the operation of the rod accumulates inside the solenoid.
The accumulated foreign matter prevents the rod from operating properly and causes malfunction of the prize winning device. In this case, even though the pachinko ball has entered the specific winning slot, the winning device is not changed to the winning probability increasing state, so no advantageous rights are generated for the player, so the player's motivation to play There was a problem with the decline in

Furthermore, to eliminate malfunctions in the winning device,
After removing the solenoid from the winning device and removing the foreign matter from the removed solenoid, the solenoid must be reinstalled. Therefore, maintenance work for the solenoid requires a large number of man-hours and a lot of work time, leading to deterioration of work efficiency.

Furthermore, due to the nature of the pachinko game, it is almost impossible for pachinko balls to enter the winning machine equally from both sides of the winning machine when the winning machine is opened. For this reason, pachinko balls tend to collide intensively against one movable piece, so
The impact has a strong tendency to cause malfunctions in one of the movable pieces, or in other words, the movable piece that is more likely to be hit frequently.

Therefore, the present invention facilitates the removal work of the foreign matter.
Moreover, it is an object of the present invention to provide a pachinko machine in which a pair of movable pieces can both operate satisfactorily.

(Means for Solving the Problems) Therefore, in order to solve such problems, the present invention provides a winning device that allows pachinko balls hit onto a game board to fly in from both sides, and a winning device that is provided on both sides of the winning device. a pair of movable pieces that are fixed to one end of a pair of pivot shafts arranged in the same direction and configured to form an open state in which pachinko balls can fly into the prize winning device and a closed state in which the pachinko balls cannot fly into the winning device according to the rotation of each pivot; , a solenoid that is integrally provided on the back side of the prize entry device and has an insertion port facing downward for inserting a rod that is driven in the vertical direction, and a solenoid that is connected to the rod and is connected to the drive axis of each rod and the movable piece. a drive plate in which a pair of elongated holes having long axes perpendicular to each pivot axis are formed; an elastic member for biasing the drive plate in a direction against the suction of the rod; and the other end of the pivot shaft. a pair of crank mechanisms having a base end fixed to the slot and a tip movable within the elongated hole; and a crank mechanism that opens and closes the solenoid a predetermined number of times based on winnings in a specific prize opening provided on the game board. a control circuit for continuously driving the solenoid to open and close a number of times greater than the number of times the solenoid is driven to open and close when a winning ball enters the continuous winning hole provided in the winning device in an open state based on the winning device; It is composed of the following.

(Function) Since the present invention is configured as described above, when the solenoid is energized and de-energized, the solenoid and the rod slide and generate foreign matter, but this foreign matter falls immediately after generation and then It is discharged to the outside from the opening of the insertion port. This prevents such foreign matter from accumulating inside the solenoid. In addition, the solenoid is integrated with the winning device and does not protrude from the side, bottom, or top of the winning device, so other components of the pachinko machine can be installed on the side, bottom, or top of the winning device. becomes easier to handle.

Furthermore, the control circuit opens and closes the solenoid a predetermined number of times based on a winning in a specific winning opening to open the winning device, and during this open state, a pachinko ball enters the winning device from both sides or one side, and continues. When a prize is won in the winning opening, the control circuit continuously drives the solenoid to open and close more times than when winning in the specific winning opening, thereby forming a so-called second type pachinko game.

In addition, when the solenoid is being driven to open and close, the drive plate equalizes the amount of movement of the pair of crank mechanisms, and the elongated hole is designed to accommodate the impact that is generated when a pachinko ball and movable piece collide, which is transmitted to the crank mechanism while the solenoid is being driven to open and close. absorb.

(Example) An embodiment of the present invention will be described below.

In FIG. 1, 1 is a winning device according to the present invention, and this winning device 1 is formed so that pachinko balls hit on a game board (not shown) can fly inward from both sides. A pair of pivots 1a, 1b
Guide vanes 1c and 1d are provided as movable pieces that open in the direction of picking up pachinko balls starting from the pivots 1a and 1b. A pair of guide blades 1c and 1d are fixed to one end of the pivot shafts 1a and 1b, and the winning device 1
An open state in which a pachinko ball can enter the ball and a closed state in which it is not possible are formed. That is, the guide vane 1c
rotate counterclockwise until it is as horizontal as possible,
The guide vane 1d is rotated clockwise until it becomes as horizontal as possible. These guide vanes 1c and 1d are connected to a solenoid 2a and
It is linked via an opening/closing mechanism 53 to rods 2c and 2d that constitute a part of the rod 2b. Therefore, the guide vanes 1c and 1d are opened in the opening/closing mechanism 53 by driving the solenoids 2a and 2b. The solenoids 2a, 2b are attached to mounting plates 54, 54 arranged on the back of the winning device 1, and the operating axes of the solenoids 2a, 2b are arranged in the vertical direction, and the rods 2c, 2d of the solenoids 2a, 2b are arranged in the vertical direction. Head, i.e. rod 2c,
The openings of the insertion ports (not shown) of the solenoids 2a and 2b into which the solenoids 2d are inserted are provided facing downward. As a result, the solenoids 2a and 2b do not protrude from the side, bottom, or top of the winning device 1.
Other components of the pachinko machine (not shown) can be installed on the side, below, or above the winning device 1.

The opening/closing mechanism 53 includes a pair of drive plates 55, 55 fixed to the rods 2c, 2d of the solenoids 2a, 2b.
and a pair of pivoting members 5 that pivot the pivots 1a and 1b.
6, 56, shaft mounting members 56, 56, and drive plate 5
A pair of connecting shafts 57, 5 spanned between 5, 55
The main components are 7 and 7.

As described above, the drive plates 55, 55 are fixed at both ends to the rods 2c, 2d of the solenoids 2a, 2b, with long holes 58, 58 formed at one end, and bent portions 59, 59 formed at the other end. are doing. Long hole 58,
Reference numeral 58 is for movably inserting linking shafts 57, 57 inside, and the long axes of the elongated holes 58, 58 are arranged so as to be orthogonal to the operating axes of the solenoids 2a, 2b and the axes of the pivots 1a, 1b. be. Bent part 5
9, 59, rods 2c, 2d are pivots 1a, 1b
The ends of the bent portions 59, 59 are connected to the mounting plates 54, 54.
is made as close as possible.

60, 60 are mounting hooks, and the mounting hooks 60, 60 are attached to the rods 2c, 2 between both ends of the drive plates 55, 55.
It protrudes directly below d. The mounting hooks 60, 60 are for attaching one ends of the return springs 61, 61 as elastic members.
The other ends of the mounting plates 54 and 61 are attached to mounting protrusions 62 and 62 that project from the lower ends of the mounting plates 54 and 54, respectively. The return springs 61, 61 return the rods 2c, 2d and the drive plates 55, 55 to each other via the drive plates 55, 55 by their elastic force and their own weight when the solenoids 2a, 2b are de-energized. 2c, 2d
This is to return the machine to its original position. As a result, the return springs 61, 61 are moved to the drive plates 55, 5
5 is a pair of rods 2 formed by solenoids 2a and 2b.
energize in a direction that resists the attraction of c and 2d. Also,
63 is a connecting member, and the connecting member 63 is connected to the drive plate 55,
55 is integrally formed, and thereby the rods 2c, 2
d and the driving plates 55, 55 are moved up and down together.

The shaft mounting members 56, 56 have a guide vane 1 at one end.
The other ends of the pivots 1a and 1b to which the pivots c and 1d are attached are attached, and the other ends of the linking shafts 57 and 57 are attached to the back side. Further, the pivots 1a and 1b are rotatably inserted into insertion holes (not shown) formed in the winning device. Therefore, when the solenoids 2a, 2b are excited and the rods 2c, 2d are attracted, first, the drive plates 55, 55 are moved upward while the link shaft 5
7, 57 upwards. At this time, the drive plate 5
5 and 55 are integrally formed by a connecting member 63 and connect the rods 2c and 2d, so even if a ball is concentrated on one of the pair of guide vanes 1c and 1d, the connecting shafts 57 and 57 The amount of lifting can be made equal.

Furthermore, linking shafts 57, 57 are provided in the elongated holes 58, 58.
Since it is provided movably, its shape absorbs the impact when the pachinko ball collides with the guide blades 1c and 1d. As a result, the link shafts 57, 5
7 is a long hole 58, and the inside of 58 is a solenoid 2a, 2b.
(center) direction, the shaft attachment members 56, 5
6 is rotated outward in FIG. 2 around the pivots 1a, 1b and the axis of the insertion hole. Therefore, the guide vanes 1c and 1d are opened. On the other hand, when the solenoids 2a and 2b are de-energized, the rods 2c and 2d move to the drive plates 55 and 2b.
55, the weight of the rods 2c, 2d, and the elastic force of the return springs 61, 61 to return to the original position. From this, the linking shafts 57, 57 move outward inside the long holes 58, 58, and the pivoting members 56, 56 move around the pivots 1a, 1b and the axis of the insertion hole as shown in FIG. Since the guide vanes 1c and 1d are rotated inwardly, the guide vanes 1c and 1d are closed.

At the bottom of the winning device 1, partition plates 3, 3 are set up, and between the partition plates 3, 3 is a continuous winning opening 4, and this continuous winning opening 4 is equipped with a continuous winning detector 18. An 18-time operation winning ball switch 5 is provided for causing the rotation operation. In addition to this, two other specific winning holes (not shown) are provided, and as shown in FIG. 3, this other one specific winning hole operates once as a specific winning detector. A one-time operation winning ball switch 6 is provided to perform the operation, and as shown in FIG. A winning ball switch 7 is provided. On the front surface of the winning device 1, light emitting diodes 8a to 8g are arranged as part of the notification means.

FIG. 3 shows the control circuit for the solenoids 2a and 2b, with reference numeral 9 a flip-flop circuit, 10 an 8-bit binary counter circuit, 11 a Schmitt circuit, 12 a delay circuit, 13 a reset release control circuit, and 14 a shift circuit. A register 15 is a reset timing circuit as a control circuit, 16 is a clock oscillation circuit, 17 is a light emitting diode blinking circuit as a notification means, and 18 is a sound effect generation circuit as a notification means. The bit binary counter circuit 10, the Schmitt circuit 11, the delay circuit 12, the shift register 14, the reset timing circuit 15, and the clock oscillation circuit 16 generally constitute a winning probability increase control device.

The configuration and function of each of these circuits will be explained below.

The flip-flop circuit 9 has set terminals S0,
S1, S2, S3 and output terminals Q0, Q1, Q
2, Q3 and reset terminals R0, R1, R2, R
3 and a ground terminal E0, and here,
Set terminal S3, reset terminal R3, output terminal Q
3 is not used. The power supply voltage V _DD is connected to the set terminals S0, S1 and the Schmitt circuit 11 via a group of resistors. The power supply voltage V _DD is set to the high potential side, and when the switches 6, 7, and 5 are in the open state as shown in FIG. 3, the set terminals S0, S1, and S2 are inputted at an H level. When the switch 6 is closed, the set terminal S0 changes from H to L.
The set terminal S1 changes from H to L when the switch 7 is closed, and the set terminal S2 changes from H to L when the switch 5 closes.
It is designed to be. Each output terminal Q0~Q2
is an L output when each set terminal S0 to S2 is H, and outputs H when each set terminal S0 to S2 is L
It is considered an output. 19 and 20 are OR circuits. The OR circuit 19 outputs an H signal when at least one of the output terminals Q0 to Q2 of the flip-flop 9 is H.
These OR circuits 19 and 20 have the function of inhibiting the output of each component of the reset timing circuit 15. The Schmitt circuit 11 has an OR gate 21, and the reset release control circuit 13 that controls the winning probability increase control device is composed of a NAND gate, and the output of the Schmitt circuit 11 is inputted to one input terminal of the NAND gate 13.
The output of the OR circuit 19 is input to the other input terminal of the NAND gate 13 via the delay circuit 12. The delay circuit 12 is composed of a group of resistive capacitors, and the function of the delay circuit 12 will be explained together with the configuration of the 8-bit binary counter circuit 10.

The 8-bit binary counter circuit 10 has reset terminals Ra, Rb and output terminals Q0a to Q3a, Q.
0b to Q3b, and input terminals Ea and Eb. The input terminal Ea is connected to a clock oscillation circuit 16 that generates a clock signal as shown in FIG. 4, and each of the output terminals Q0a to Q3a generates a rectangular signal as shown in FIG. There is.

The output terminal Q0a has a period twice that of the clock signal, has a function of outputting when the first clock signal is input, and has the function of outputting when the first clock signal is input.
has a period four times the period of the clock signal and has a function of outputting when the second clock signal is input, and the output terminal Q2a has a period eight times the period of the clock signal. It has a function of outputting when the fourth clock signal is input, and the output terminal Q3a has a period 16 times the period of the clock signal, and outputs when the eighth clock signal is input. It has the function of outputting to.

The output of the output terminal Q3a is input to the input terminal Eb, and the output terminal Q0b has a period twice that of the rectangular signal from the output terminal Q3a, as shown in FIG. The output terminal Q1b is not used here, and the output terminal Q2b has a period eight times that of the rectangular signal from the output terminal Q3a. It has an output terminal Q3
It has a function of outputting when the fourth output signal of the rectangular signal from a is input, and the output terminal Q3b
has a period 16 times that of the rectangular signal from the output terminal Q3a, has a function of outputting when the eighth output signal of the rectangular signals from the output terminal Q3a is input, and outputs the signal from the output terminal Q3b. The output of is inputted to the input terminal CP of the shift register 14 via the inverter element 22.

The shift register 14 has the input terminal CP, the reset terminal R, the power supply potential terminal D, the output terminal Q0,
Q1 and Q2, and the reset terminal R has
The output from the NAND gate 13 is input, and the power supply potential terminal D is connected to the power supply _VDD .

The output terminal Q0 of the shift register 14 receives the rectangular signal from the output terminal Q3a, as shown in FIG.
It has a cycle that is 32 times longer and has a function of outputting when the 16th rectangular signal from output terminal Q3a is input, but it is not used here, and output terminal Q1 is It has a period 64 times that of the rectangular signal from terminal Q3a, and output terminal Q3
It has a function of outputting when the 32nd rectangular signal from a is input, and the output terminal Q2 is not used here.

The reset terminal Ra of the 8-bit binary counter circuit 10 is connected to the delay circuit 12, and the output from the OR circuit 19 is input to the reset terminal Ra with a delay of 0.5 seconds.
This reset terminal Ra releases the output from the output terminal Q0a when its input is L.
This inhibits the output of Q0a when its input is H.

The output of the NAND gate 13 is input to the reset terminal Rb of the 8-bit binary counter circuit 10, and when the input to the reset terminal Rb is H, the output from the output terminal Q0b is prohibited, and the input to the reset terminal Rb is disabled. is L, the output terminal Q0
The output from b is what is released. and,
The input to the reset terminal Rb is set to L at the same time as the input to the reset terminal Ra becomes H.

The light emitting diode blinking circuit 17 includes two shift registers 23 and 24, an OR circuit group 25, a light emitting diode drive circuit 26, and a light emitting diode group 27.
It is roughly composed of.

The shift register 23 has input terminals D and CP, a reset terminal R, and output terminals Q0 to Q3, and the output from the output terminal Q2 of the flip-flop circuit 9 is input to the input terminal CP.
Output terminal Q0 of bit binary counter circuit 10
The output from a is input.

The outputs from the output terminals Q0 to Q3 of the shift register 23 are fed back to the input terminal D of the shift register 23 via the NOR circuit 28, and the output from the output terminal Q0 is input to the OR circuit 29 and the OR circuit 35. The output from the output terminal Q1 is input to the OR circuit 30 and the OR circuit 34, the output from the output terminal Q2 is input to the OR circuit 31 and the OR circuit 33,
The output from the output terminal Q3 is input to the OR circuit 32.

The light emitting diode drive circuit 26 has an input terminal I0.
~ I6 and output terminals Q0 to Q6, the OR circuit 29 controls the output from the output terminal Q0, the OR circuit 30 controls the output from the output terminal Q1, and the OR circuit 29 controls the output from the output terminal Q1. The circuit 31 controls the output from the output terminal Q2, the OR circuit 32 controls the output from the output terminal Q3, and the OR circuit 33 controls the output from the output terminal Q4. The OR circuit 34 controls the output from the output terminal Q5, the OR circuit 35 controls the output from the output terminal Q6, and the light emitting diodes 8a and 8g control the output from the output terminal Q0 of the shift register 23. The light-emitting diodes 8b and 8f are controlled to blink by the output from the output terminal Q1 of the shift register 23, and the light-emitting diodes 8c and 8e are blinked by the output from the output terminal Q2 of the shift register 23. 8d is controlled to blink by the output from the output terminal Q3 of the shift register 23, and the light emitting diode group 27 is configured so that each diode row is blinked from the top and bottom toward the center as shown in FIG. Noah Gate 28 is
Each diode array has a function of repeating the blinking state from the top to the center from the beginning after the blinking state is completed.

Note that the reset terminal R of the shift register 23 is
When the input is H, the light emitting diode group 27 has a function of inhibiting output from the output terminals Q0 to Q3 of the shift register 23, and when the output from the output terminal Q2 of the flip-flop circuit 9 is H, , all lights are turned off.

The shift register 24 has reset terminals Ra and Rb.
, input terminals Ca, Cb, Db and output terminals Q0a~Q
3a, Q0b to Q2b.

The reset terminals Ra and Rb of the shift register 24 are inputted with the output of a NOR gate 36, which will be described later, and the output from the output terminal Q2 of the flip-flop circuit 9 is inputted into the NOR gate 36. When the output from the output terminal Q2 of the NOR gate 36 is L, the output becomes H, and the shift register 24 is reset. When the output from the output terminal Q2 of the flip-flop circuit 9 is H, the output of the NOR gate 36 becomes H. The output becomes L, and the reset of the shift register 24 is released. Therefore, when the shift register 23 is in the reset release state, the shift register 24
is in the reset state, and when the shift register 23 is in the reset state, the shift register 24 is in the reset state.
is set in a reset release state.

The Schmitt circuit 11 is connected to the input terminals Ca and Cb of the shift register 24 via an inverter element 37.
The output from is input. shift register 2
4 output terminals Q0a to Q3a, Q4b to Q6b
are connected to the OR circuits 29 to 35 in order, respectively, and the output from the output terminal Q3a is connected to the input terminal
Db, the output terminals Q4b to Q6b receive and output the output from the output terminal Q3a, and the output from the output terminal Q6b is fed back to the other input terminals of the OR gate 21 forming a part of the Schmitt circuit 11. has been entered.

When the output from the output terminal Q6b of the shift register 24 is L and the input terminal of the OR gate 21 is H, the output of the OR gate 21 becomes H, and the output from the output terminal Q6b of the shift register 24 becomes L. When one input terminal of the OR gate 21 is L, the output becomes L, and when the output of the output terminal Q6b of the shift register 24 is H, regardless of whether the input to the one input terminal of the OR gate 21 is L or H. The output becomes H.

ORGATE 21 is the 18th operation winning ball switch 5
When is opened and closed once, the output changes from H to L, and the output terminal Q0a of the shift register 24 changes from L to H. Along with this, the light emitting diode 8
A is now lit.

When the 18-time operation winning ball switch 5 is repeatedly opened and closed 8 times, the light emitting diodes 8a to 8g are turned on in this order. When all the light emitting diodes 8a to 8g are turned on, the output from the output terminal Q6b of the shift register 24 becomes H, and the inputs of the other input terminals of the OR gate 21 become H, so that the 18th operation winning ball switch 5 becomes 8. After opening and closing the 18-time winning ball switch 5, the output of the OR gate 21 becomes H, and the light-emitting diode group 27 is no longer lit.

The reset timing circuit 15 is the AND circuit 3
8, a NAND circuit 39, a NOR gate 40, an inverter element 41, a NOR gate 42, an AND circuit 43, and a NOR circuit 44. The AND circuit 38 includes an 8-bit binary counter circuit 1
The outputs of output terminal Q1a and output terminal Q3a of 0 are input. The output from the AND circuit 38 and the output from the output terminal Q0b of the 8-bit binary counter circuit 10 are input to the NAND circuit 39. The output from the NAND circuit 39 and the output from the OR circuit 20 are input to the NOR gate 40 . The inverter element 4 is connected to the NOR gate 42.
1, the output from the output terminal Q2b of the 8-bit binary counter circuit 10 and the output from the output terminal Q2 of the flip-flop circuit 9 are inputted. The output from the output terminal Q2b of the 8-bit binary counter circuit 10 and the output from the output terminal Q1 of the shift register 14 are input to the AND circuit 43, and the NOR gate 40 is input to the NOR circuit 44.
, the outputs of the NOR gate 42, the AND circuit 43, and the power supply voltage are input. Noah circuit 44
The output from the flip-flop circuit 9 is input to each reset terminal R0, R1, R2, and when the output from the NOR circuit 44 is L, the output from each output terminal Q0 to Q2 of the flip-flop circuit 9 is prohibited. When the output of the NOR circuit 44 is H, the outputs from the respective output terminals Q0 to Q2 of the flip-flop circuit 9 are released. Noah circuit 44
When the power supply voltage of the NOR gates 40 and 42 and the AND circuit 43 is L, the output becomes H, and the flip-flop circuit 9 is released from reset.

The AND circuit 38, the NAND circuit 39, and the NOR gate 40 are used as a reset timing circuit that operates the solenoids 2a and 2b once, and the inverter element 41 and the NOR gate 42 serve as a reset timing circuit that operates the solenoids 2a and 2b twice. The AND circuit 43 is a reset timing circuit that operates the solenoids 2a and 2b 18 times.

The output of the NOR gate 40 is always L when the outputs of the output terminals Q1 and Q2 of the flip-flop circuit 9 are H, and the output of the NOR gate 42 is always L when the output from the output terminal Q2 of the flip-flop circuit 9 is H. Its output is set to be L.

The solenoids 2a and 2b are connected to the switching circuit 4.
5 and 46, respectively, and the switching circuit 4
5 and 46 are connected to OR gates 47 and 48, respectively, and OR gates 47 and 48 are connected to the output terminal Q0b of the 8-bit binary counter circuit 10. The output terminal Q0b of the 8-bit binary counter circuit 10 is connected to an AND circuit 49, and the NOR gate 36 and the AND circuit 49 have a function of controlling the sound effect generation circuit 18. , here solenoids 2a and 2b are
A sound effect is generated during the 18th movement. 50 is a display circuit that displays that the solenoids 2a and 2b are operating 18 times, and a lamp 5
2 and an AND circuit 53.

Such a winning probability increase control device includes a one-time winning ball switch 6, a two-time winning ball switch 7,
18 times the winning ball switches 5 are all open, and the set terminals S0, S0, of the flip-flop circuit 9 are open.
When the inputs of S1 and S2 are H, the input of one input terminal of the OR gate 21 is H, and the input of the other input terminal is L, the following operation is performed.

Output terminals Q0 to Q2 of flip-flop circuit 9
The output of is L, and the output of OR gate 21 is H, so H is input to one input terminal of NAND gate 13, L is input to the other input terminal, and H is output from NAND gate 13. be done. Therefore, the input to the reset terminal Ra of the 8-bit binary counter circuit 10 is set to L, and the input to the reset terminal Rb of the 8-bit binary counter circuit 10 is set to L.
The input of is set to H. Therefore, the reset of the reset terminal Ra of the 8-bit binary counter circuit 10 is released, the output from the output terminal Q0a is released, and the clock oscillation circuit 16 is released.
The clock signal is outputted from the output terminal Q0a, and the light emitting diode group 27 repeatedly blinks from the top to the center from the top to the center as shown in FIG.

On the other hand, the reset terminal Rb of the 8-bit binary counter circuit 10 is reset, output from the output terminals Q0b to Q3b is prohibited, and the solenoids 2a and 2b are not driven.

In addition, the one-time operation winning ball switch 6 is closed,
When the input to the other input terminal of the OR gate 21 is L, the following operation is performed.

When the one-time winning ball switch 6 is closed, the set terminal S0 of the flip-flop circuit 9 is changed from H to L, and the output from the output terminal Q0 is changed from L to H. The output is sent to the reset terminal of the 8-bit binary counter circuit 10 via the delay circuit 12.
The signal is input to Ra and is also input to other input terminals of the NAND gate 13. On the other hand, ORGATE 21 is
At this time, H is output, and the output is input to one input terminal of the NAND gate 13, and from the NAND gate 13, L is input to the reset terminal Rb of the 8-bit binary counter circuit 10. still,
The input to the reset terminal Rb is set to L when the output of the output terminal Q0 of the flip-flop circuit 9 changes from L to H. When the output of the output terminal Q0 of the flip-flop circuit 9 changes from L to H, the reset terminal Ra of the 8-bit binary counter circuit 10 is reset by the time constant of the differential circuit of the delay circuit 12, and the outputs from the output terminals Q0a to Q3a are reset. is prohibited. Further, the reset terminal Rb of the 8-bit binary counter circuit 10 is released from reset after the delay time due to the time constant of the integrating circuit of the delay circuit 12 has elapsed, and the fifth counter is output from the output terminals Q0b to Q3b.
A rectangular signal as shown in the figure is output.

Therefore, the solenoids 2a and 2b are driven, but due to the one-time operation reset timing circuit of the AND circuit 38, NAND circuit 39, and NOR gate 40, when L is output from the NAND circuit 39, L is output from the NOR circuit 44. The reset terminals R0, R1, and R2 of the flip-flop circuit 9 are reset (see FIG. 6).

Therefore, output from the output terminals Q0, Q1, and Q2 of the flip-flop circuit 9 is prohibited, and the solenoids 2a and 2b are driven for only 0.5 seconds as shown in FIG.

Furthermore, when the two-time operation winning ball switch 7 is closed and the input to the other input terminal of the OR gate 21 is L, the following operation is performed.

When the double-operation winning ball switch 7 is closed, the set terminal S1 of the flip-flop circuit 9 changes from H to L, and the output from the output terminal Q1 changes from L to H. The output thereof is input to the reset terminal Ra of the 8-bit binary counter circuit 10 via the delay circuit 12 in the same manner as described above, and is also input to the NAND gate 1.
3 is input to the other input terminal. On the other hand, the OR gate 21 is outputting H at this time, and its output is input to one input terminal of the NAND gate 13.
From the NAND gate 13, L is input to the reset terminal Rb of the 8-bit binary counter circuit 10. Also, at this time, the input to the reset terminal Rb is
When the output of the output terminal Q1 of the flip-flop circuit 9 changes from L to H, it is set to L.

When the output of the output terminal Q1 of the flip-flop circuit 9 changes from L to H, the reset terminal Ra of the 8-bit binary counter circuit 10 is reset for a time equal to the time constant by the differential circuit of the delay circuit 12, and the outputs from the output terminals Q0a to Q3a are reset. is prohibited. Further, the reset terminal Rb of the 8-bit binary counter circuit 10 is released from reset, and rectangular signals as shown in FIG. 5 are output from the output terminals Q0b to Q3b.

Therefore, the solenoids 2a and 2b are driven, but due to the two-time reset timing circuit of the inverter element 41 and the NOR gate 42, when the NOR gate 42 outputs an H level, the NOR circuit 44 outputs an L level, and the flip-flop circuit The reset terminals R0, R1, and R2 of 9 are reset (see FIG. 7).

Therefore, output from the output terminals Q0, Q1, and Q2 of the flip-flop circuit 9 is prohibited, and the reset terminal Rb of the 8-bit binary counter circuit 10 becomes H and is reset.
The solenoids 2a and 2b are arranged as shown in FIG.
It is driven only twice for 0.8 seconds each. As described above, the one or two operations of the guide vanes 1c and 1d are in the first state.

Furthermore, when the 18th operation winning ball switch 5 is closed, the following operation is performed.

When the 18th operation winning ball switch 5 is closed, L is momentarily input to one input terminal of the OR gate 21, and at this time, L is input from the output terminal Q6b of the shift register 24 to the other input terminal of the OR gate 21. is input, and L is output from the OR gate 21. The output is input to one input terminal of the NAND gate 13, and at this time, if the guide vanes 1c and 1d are in the middle of the first and second operations, the NAND gate 1
Since H is input to the other input terminal of 3, the NAND gate 13 momentarily outputs H, and the output is sent to the 8-bit binary counter circuit 1.
0 reset terminal Rb. Therefore, the reset terminal Rb is instantaneously reset, and the output from the output terminal Q0b of the 8-bit binary counter circuit 10 is prohibited.

Therefore, if the 18th action winning ball switch 5 is closed during the 1st and 2nd action, the 1st and 2nd action will immediately end at that point. The output from the OR gate 21 is input to the set terminal S2 of the flip-flop circuit 9, and H is output from the output terminal Q2. The output H is OR circuit 2
0, is input to the reset terminal Ra of the 8-bit binary counter circuit 10 via the OR circuit 19 and the delay circuit 12, and is also input to the NAND gate 13.
input to other input terminals. On the other hand, at this time, the 18th operation winning ball switch 5 has been opened,
H is input to one input terminal of the OR gate 21,
The OR gate 21 outputs H, one input terminal of the NAND gate 13 is set to H, and the output of L from the NAND gate 13 is input to the reset terminal Rb of the 8-bit binary counter circuit 10.

In addition, at this time as well, the reset terminal Rb
The input of is the output terminal Q of the flip-flop circuit 9.
When the output of 2 changes from L to H, it is set to L.

When the output of the output terminal Q2 of the flip-flop circuit 9 changes from L to H, the reset terminal Ra of the 8-bit binary counter circuit 10 is reset, and output from the output terminals Q0a to Q3a is prohibited. In addition, 8-bit binary counter circuit 1
0 reset terminal Rb is released from reset,
A rectangular signal as shown in FIG. 5 is output from the output terminals Q0b to Q3b.

Therefore, the solenoids 2a and 2b are driven, but due to the 18-time operation reset timing circuit of the AND circuit 43, when the AND circuit 43 outputs H, the NOR circuit 44 outputs L, and the flip-flop circuit 9 Reset terminal R0, R
1 and R2 are reset (see FIG. 8).

Therefore, output from the output terminals Q0, Q1, and Q2 of the flip-flop circuit 9 is prohibited, and the solenoids 2a and 2b are driven 18 times for 0.8 seconds each as shown in FIG. In this way, the 18 opening and closing operations of the guide members 1c and 1d are performed in the second
state. Therefore, even if you have an advantageous right, you will not be able to get the prize ball when the winning device 1 is closed, and you will have to adjust the batting force and timing to aim the ball when the winning device 1 is opened. It won't happen.

In addition, during the 18th operation of the guide blades 1c and 1d, the output of the OR circuit 19 is H, and even if there is a win in the 1st or 2nd operation to the specific winning opening during the 18th operation, the OR circuit will not be activated. The output of 19 remains at H and does not change, so the binary counter circuit 10 is not reset, and the winnings between the 1st and 2nd actions by the 1st action winning ball switch 6 and the 2nd action winning ball switch 7 are not reset. The signal is ignored and the operation continues 18 times.

Since the output from the NOR circuit 44 is input to the reset terminals R0, R1, and R2 of the flip-flop circuit 9, the output from the specific winning opening is 18 times during the 18th operation.
Even if there is a winning prize for the 18th and 2nd operation, the output terminal Q of the flip-flop circuit 9 will be
Since 0, Q1, and Q2 are all reset, after the 18th operation is completed, the 1st and 2nd operations will not be performed due to the winning of the 1st and 2nd operations during the relevant operation.

In addition, when the 18th operation winning ball switch 5 is closed again while the solenoids 2a and 2b are being driven,
L is momentarily input to the input terminal of the OR gate 21 upon closing of the 18-time winning ball switch 5, and L is momentarily outputted from the OR gate 21 accordingly. The output is input to one input terminal of the NAND gate 13, and at this time, since H is input to the other input terminal of the NAND gate 13, H is momentarily output from the NAND gate 13, and the output is 8 bits. Binary counter circuit 1
0 reset terminal Rb. Therefore,
The reset terminal Rb is momentarily reset, and the output terminal Q0b of the 8-bit binary counter circuit 10 is reset.
output is momentarily inhibited (see Figure 9).

Therefore, 8-bit binary counter circuit 1
The 18-time operation rectangular signal from output terminal Q0b of
As shown in FIG. 9, the process starts again from the beginning.

The H output from the output terminal Q2 of the flip-flop circuit 9 is further input to the reset terminal R of the shift register 23 and to the NOR gate 36. Therefore, the output from the set terminals S0 to Q3 of the shift register 23 is prohibited, and the light emitting diodes 8a to 8g are all turned off, while L is output from the NOR gate 36, and the output is sent to the reset terminals Ra and Q3 of the shift register 24. The signal is input to Rb, and the reset terminals Ra and Rb are released from reset. At this time, the input terminals Ca and Cb of the shift register 24 are connected to the input terminals Ca and Cb through the inverter element 37.
The output from the OR gate 21 accompanying the closing of the 18th operation winning ball switch 5 is input, and H is output from the output terminal Q0a of the shift register 24. Along with this, the light emitting diode 8a is turned on. Similarly, 18 of solenoids 2a and 2b
18 times during the rotation, the winning ball switch 5 repeats 8
When the light emitting diode 8b is opened and closed twice, the light emitting diode 8b
~8g is lit.

When all the light emitting diodes 8a to 8g are turned on, H is output from the output terminal Q6b of the shift register 24, and the inputs of the other input terminals of the OR gate 21 are set to H. Therefore, after the 18-time winning ball switch 5 opens and closes 8 times, the output of the OR gate 21 becomes H regardless of whether the 18-time winning ball switch 5 is opened or closed, and the light emitting diode group 27 does not light up after that. do not have. This ends the second type pachinko game.

In addition, in the winning probability increase state, if the winning ball switch 5 does not win the winning ball, the winning ball switch 5 operates 18 times, and as described above, the guide blade moves once and twice, and although it ends after the 18th movement, the winning ball enters the winning area of the winning device. The game may end when a predetermined number of pachinko balls (for example, 10 balls) win.

In the pachinko machine configured in this way, when the solenoids 2a, 2b are energized and de-energized, the solenoids 2a, 2b and the rods 2c, 2d slide and generate foreign matter. After falling, it is discharged to the outside through the opening of the insertion port. This prevents such foreign matter from accumulating inside the solenoids 2a, 2b.

(Effects of the Invention) As is clear from the above, the present invention has the following advantages:
Since foreign matter due to the sliding movement between the rod and the solenoid is not accumulated inside the solenoid, there is no malfunction of the winning device due to the generation of the foreign matter. In addition, since the drive plate equalizes the amount of movement of the pair of crank mechanisms, the movable pieces are reliably opened and closed regardless of the presence or absence of impact caused by the collision between the pachinko balls and the movable pieces, and the opening/closing accuracy is stable. Decrease in player's desire to play due to malfunction of the player is suppressed.

Furthermore, the elongated hole absorbs the impact caused by the collision between the pachinko ball and the movable piece due to its shape, thereby alleviating unnecessary external force transmitted to the solenoid and crank mechanism. This can extend the life of the device. This facilitates maintenance work on the drive system for movable parts, including solenoids, and improves work efficiency. In addition, since the winning device can reliably generate the above-mentioned winning probability increasing state, the player can effectively utilize advantageous rights, and the player's desire to play is promoted.

In addition, the solenoid does not protrude from the side, bottom, or top of the winning device, and other components of the pachinko machine can be installed on the side, bottom, or top of the winning device. The above restrictions will be relaxed. Furthermore, since the solenoid and the opening/closing mechanism are integrally provided in the winning device, handling of the winning device becomes easier.

Furthermore, even if there is an advantageous right, the ball cannot be won when the winning device is closed, and the ball hitting force and timing must be adjusted to aim at the ball when the winning device is opened. To improve game variation and playability by preventing the game from becoming monotonous.

[Brief explanation of the drawing]

FIG. 1 is a schematic perspective view showing one embodiment of the present invention, FIG. 2 is a schematic front view showing one embodiment of the present invention, FIG. 3 is a control circuit diagram used in the present invention, and FIG. 5 is a signal waveform diagram of the clock signal output from the 8-bit binary counter circuit, FIG. 6 is a series of signal waveform diagrams when the solenoid is made to open and close once, and FIG. , a series of signal waveform diagrams when the solenoid is made to open and close twice, Figure 8 is a series of signal waveform diagrams when the solenoid is made to open and close 18 times, and Figure 9 is a series of signal waveform diagrams when the solenoid opens and closes 18 times. It is a series of signal waveform diagrams when the 18-time operation winning ball switch is closed during operation. 1... winning device, 1c, 1d... movable piece (guide vane), 2a, 2b... solenoid (electric drive unit), 2c, 2d... rod, 53... opening/closing mechanism.

Claims (1)

[Scope of Claims] 1. A winning device that allows pachinko balls launched onto a game board to fly in from both sides, and a winning device that is fixed to one end of a pair of pivots provided on both sides of the winning device and that allows the rotation of each pivot to a pair of movable pieces for forming an open state in which pachinko balls can enter the prize winning device and a closed state in which pachinko balls cannot enter the prize winning device; a solenoid each having an insertion port facing downward for insertion of a rod to be moved; and a pair of elongated holes connected to the rod and having long axes perpendicular to the drive axis of each rod and each pivot axis of the movable piece. a formed drive plate; an elastic member for biasing the drive plate in a direction against the suction of the rod; and a base end fixed to the other end of the pivot shaft and a distal end movable within the elongated hole. a pair of crank mechanisms, and the solenoid is driven to open and close a predetermined number of times based on winnings to a specific winning opening provided on the game board, and when the winning ball enters the winning device in the open state based on the opening/closing drive, the winning ball enters the winning device. A pachinko machine comprising: a control circuit for continuously driving the solenoid to open and close a number of times greater than the number of times the solenoid is driven to open and close when a prize is won in a continuous winning slot provided in the machine.